[POWERPC] pasemi: Minor iommu cleanup
Clean up the pwrficient iommu code a bit. It was using u32 *-based offsets for registers, which can be a bit confusing when comparing to the manual. Generated binaries from the code is unchanged from before. Signed-off-by: Olof Johansson <olof@lixom.net>
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6e62040c55
Коммит
f724bf7781
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2005-2007, PA Semi, Inc
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* Copyright (C) 2005-2008, PA Semi, Inc
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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@ -27,7 +27,6 @@
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#include <asm/abs_addr.h>
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#include <asm/firmware.h>
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#define IOBMAP_PAGE_SHIFT 12
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#define IOBMAP_PAGE_SIZE (1 << IOBMAP_PAGE_SHIFT)
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#define IOBMAP_PAGE_MASK (IOBMAP_PAGE_SIZE - 1)
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@ -35,13 +34,13 @@
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#define IOB_BASE 0xe0000000
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#define IOB_SIZE 0x3000
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/* Configuration registers */
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#define IOBCAP_REG 0x10
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#define IOBCOM_REG 0x40
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#define IOBCAP_REG 0x40
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#define IOBCOM_REG 0x100
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/* Enable IOB address translation */
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#define IOBCOM_ATEN 0x00000100
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/* Address decode configuration register */
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#define IOB_AD_REG 0x53
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#define IOB_AD_REG 0x14c
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/* IOBCOM_AD_REG fields */
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#define IOB_AD_VGPRT 0x00000e00
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#define IOB_AD_VGAEN 0x00000100
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@ -56,13 +55,13 @@
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#define IOB_AD_TRNG_2G 0x00000001
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#define IOB_AD_TRNG_128G 0x00000003
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#define IOB_TABLEBASE_REG 0x55
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#define IOB_TABLEBASE_REG 0x154
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/* Base of the 64 4-byte L1 registers */
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#define IOB_XLT_L1_REGBASE 0xac0
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#define IOB_XLT_L1_REGBASE 0x2b00
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/* Register to invalidate TLB entries */
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#define IOB_AT_INVAL_TLB_REG 0xb40
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#define IOB_AT_INVAL_TLB_REG 0x2d00
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/* The top two bits of the level 1 entry contains valid and type flags */
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#define IOBMAP_L1E_V 0x40000000
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@ -76,7 +75,7 @@
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#define IOBMAP_L2E_V 0x80000000
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#define IOBMAP_L2E_V_CACHED 0xc0000000
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static u32 __iomem *iob;
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static void __iomem *iob;
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static u32 iob_l1_emptyval;
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static u32 iob_l2_emptyval;
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static u32 *iob_l2_base;
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@ -219,7 +218,7 @@ int __init iob_init(struct device_node *dn)
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for (i = 0; i < 64; i++) {
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/* Each L1 covers 32MB, i.e. 8K entries = 32K of ram */
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regword = IOBMAP_L1E_V | (__pa(iob_l2_base + i*0x2000) >> 12);
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out_le32(iob+IOB_XLT_L1_REGBASE+i, regword);
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out_le32(iob+IOB_XLT_L1_REGBASE+i*4, regword);
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}
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/* set 2GB translation window, based at 0 */
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