da8xx-fb: adopt fb_videomode data for panel information
Adopt fb_videomode data instead of defining driver private structure to hold panel information. This is the way standard FB drivers maintain the panel information. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Manjunathappa, Prakash
Tomi Valkeinen
Родитель
38ab331aa2
Коммит
f772fabdf7
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@ -213,62 +213,50 @@ static struct fb_fix_screeninfo da8xx_fb_fix __devinitdata = {
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.accel = FB_ACCEL_NONE
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};
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struct da8xx_panel {
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const char name[25]; /* Full name <vendor>_<model> */
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unsigned short width;
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unsigned short height;
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int hfp; /* Horizontal front porch */
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int hbp; /* Horizontal back porch */
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int hsw; /* Horizontal Sync Pulse Width */
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int vfp; /* Vertical front porch */
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int vbp; /* Vertical back porch */
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int vsw; /* Vertical Sync Pulse Width */
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unsigned int pxl_clk; /* Pixel clock */
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unsigned char invert_pxl_clk; /* Invert Pixel clock */
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};
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static struct da8xx_panel known_lcd_panels[] = {
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static struct fb_videomode known_lcd_panels[] = {
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/* Sharp LCD035Q3DG01 */
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[0] = {
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.name = "Sharp_LCD035Q3DG01",
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.width = 320,
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.height = 240,
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.hfp = 8,
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.hbp = 6,
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.hsw = 0,
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.vfp = 2,
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.vbp = 2,
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.vsw = 0,
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.pxl_clk = 4608000,
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.invert_pxl_clk = 1,
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.xres = 320,
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.yres = 240,
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.pixclock = 4608000,
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.left_margin = 6,
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.right_margin = 8,
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.upper_margin = 2,
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.lower_margin = 2,
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.hsync_len = 0,
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.vsync_len = 0,
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.sync = FB_SYNC_CLK_INVERT,
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},
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/* Sharp LK043T1DG01 */
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[1] = {
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.name = "Sharp_LK043T1DG01",
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.width = 480,
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.height = 272,
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.hfp = 2,
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.hbp = 2,
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.hsw = 41,
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.vfp = 2,
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.vbp = 2,
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.vsw = 10,
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.pxl_clk = 7833600,
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.invert_pxl_clk = 0,
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.xres = 480,
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.yres = 272,
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.pixclock = 7833600,
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.left_margin = 2,
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.right_margin = 2,
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.upper_margin = 2,
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.lower_margin = 2,
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.hsync_len = 41,
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.vsync_len = 10,
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.sync = 0,
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.flag = 0,
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},
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[2] = {
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/* Hitachi SP10Q010 */
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.name = "SP10Q010",
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.width = 320,
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.height = 240,
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.hfp = 10,
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.hbp = 10,
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.hsw = 10,
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.vfp = 10,
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.vbp = 10,
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.vsw = 10,
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.pxl_clk = 7833600,
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.invert_pxl_clk = 0,
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.xres = 320,
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.yres = 240,
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.pixclock = 7833600,
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.left_margin = 10,
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.right_margin = 10,
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.upper_margin = 10,
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.lower_margin = 10,
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.hsync_len = 10,
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.vsync_len = 10,
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.sync = 0,
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.flag = 0,
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},
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};
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@ -728,7 +716,7 @@ static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
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}
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static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
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struct da8xx_panel *panel)
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struct fb_videomode *panel)
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{
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u32 bpp;
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int ret = 0;
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@ -738,7 +726,7 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
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/* Calculate the divider */
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lcd_calc_clk_divider(par);
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if (panel->invert_pxl_clk)
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if (panel->sync & FB_SYNC_CLK_INVERT)
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lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |
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LCD_INVERT_PIXEL_CLOCK), LCD_RASTER_TIMING_2_REG);
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else
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@ -754,8 +742,10 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
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lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt);
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/* Configure the vertical and horizontal sync properties. */
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lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp);
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lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp);
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lcd_cfg_vertical_sync(panel->lower_margin, panel->vsync_len,
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panel->upper_margin);
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lcd_cfg_horizontal_sync(panel->right_margin, panel->hsync_len,
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panel->left_margin);
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/* Configure for disply */
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ret = lcd_cfg_display(cfg);
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@ -772,8 +762,8 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
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bpp = cfg->p_disp_panel->max_bpp;
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if (bpp == 12)
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bpp = 16;
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ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->width,
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(unsigned int)panel->height, bpp,
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ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->xres,
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(unsigned int)panel->yres, bpp,
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cfg->raster_order);
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if (ret < 0)
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return ret;
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@ -1235,7 +1225,7 @@ static int __devinit fb_probe(struct platform_device *device)
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struct da8xx_lcdc_platform_data *fb_pdata =
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device->dev.platform_data;
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struct lcd_ctrl_config *lcd_cfg;
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struct da8xx_panel *lcdc_info;
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struct fb_videomode *lcdc_info;
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struct fb_info *da8xx_fb_info;
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struct clk *fb_clk = NULL;
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struct da8xx_fb_par *par;
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@ -1323,7 +1313,7 @@ static int __devinit fb_probe(struct platform_device *device)
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#ifdef CONFIG_CPU_FREQ
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par->lcd_fck_rate = clk_get_rate(fb_clk);
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#endif
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par->pxl_clk = lcdc_info->pxl_clk;
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par->pxl_clk = lcdc_info->pixclock;
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if (fb_pdata->panel_power_ctrl) {
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par->panel_power_ctrl = fb_pdata->panel_power_ctrl;
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par->panel_power_ctrl(1);
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@ -1336,8 +1326,8 @@ static int __devinit fb_probe(struct platform_device *device)
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}
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/* allocate frame buffer */
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par->vram_size = lcdc_info->width * lcdc_info->height * lcd_cfg->bpp;
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ulcm = lcm((lcdc_info->width * lcd_cfg->bpp)/8, PAGE_SIZE);
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par->vram_size = lcdc_info->xres * lcdc_info->yres * lcd_cfg->bpp;
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ulcm = lcm((lcdc_info->xres * lcd_cfg->bpp)/8, PAGE_SIZE);
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par->vram_size = roundup(par->vram_size/8, ulcm);
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par->vram_size = par->vram_size * LCD_NUM_BUFFERS;
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@ -1355,10 +1345,10 @@ static int __devinit fb_probe(struct platform_device *device)
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da8xx_fb_info->screen_base = (char __iomem *) par->vram_virt;
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da8xx_fb_fix.smem_start = par->vram_phys;
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da8xx_fb_fix.smem_len = par->vram_size;
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da8xx_fb_fix.line_length = (lcdc_info->width * lcd_cfg->bpp) / 8;
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da8xx_fb_fix.line_length = (lcdc_info->xres * lcd_cfg->bpp) / 8;
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par->dma_start = par->vram_phys;
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par->dma_end = par->dma_start + lcdc_info->height *
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par->dma_end = par->dma_start + lcdc_info->yres *
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da8xx_fb_fix.line_length - 1;
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/* allocate palette buffer */
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@ -1384,22 +1374,22 @@ static int __devinit fb_probe(struct platform_device *device)
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/* Initialize par */
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da8xx_fb_info->var.bits_per_pixel = lcd_cfg->bpp;
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da8xx_fb_var.xres = lcdc_info->width;
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da8xx_fb_var.xres_virtual = lcdc_info->width;
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da8xx_fb_var.xres = lcdc_info->xres;
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da8xx_fb_var.xres_virtual = lcdc_info->xres;
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da8xx_fb_var.yres = lcdc_info->height;
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da8xx_fb_var.yres_virtual = lcdc_info->height * LCD_NUM_BUFFERS;
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da8xx_fb_var.yres = lcdc_info->yres;
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da8xx_fb_var.yres_virtual = lcdc_info->yres * LCD_NUM_BUFFERS;
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da8xx_fb_var.grayscale =
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lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0;
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da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp;
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da8xx_fb_var.hsync_len = lcdc_info->hsw;
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da8xx_fb_var.vsync_len = lcdc_info->vsw;
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da8xx_fb_var.right_margin = lcdc_info->hfp;
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da8xx_fb_var.left_margin = lcdc_info->hbp;
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da8xx_fb_var.lower_margin = lcdc_info->vfp;
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da8xx_fb_var.upper_margin = lcdc_info->vbp;
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da8xx_fb_var.hsync_len = lcdc_info->hsync_len;
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da8xx_fb_var.vsync_len = lcdc_info->vsync_len;
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da8xx_fb_var.right_margin = lcdc_info->right_margin;
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da8xx_fb_var.left_margin = lcdc_info->left_margin;
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da8xx_fb_var.lower_margin = lcdc_info->lower_margin;
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da8xx_fb_var.upper_margin = lcdc_info->upper_margin;
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da8xx_fb_var.pixclock = da8xxfb_pixel_clk_period(par);
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/* Initialize fbinfo */
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@ -103,5 +103,8 @@ struct lcd_sync_arg {
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#define FBIPUT_HSYNC _IOW('F', 9, int)
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#define FBIPUT_VSYNC _IOW('F', 10, int)
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/* Proprietary FB_SYNC_ flags */
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#define FB_SYNC_CLK_INVERT 0x40000000
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#endif /* ifndef DA8XX_FB_H */
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