staging: comedi: ni_65xx: use the comedi_device 'mmio' member
Use the new 'mmio' member in the comedi_device for the ioremap'ed base address. Since this was the only member in the private data, remove the struct and its allocation. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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78b469387d
Коммит
f7be5ad9a4
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@ -292,10 +292,6 @@ module_param_named(legacy_invert_outputs, ni_65xx_legacy_invert_outputs,
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MODULE_PARM_DESC(legacy_invert_outputs,
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"invert outputs of PCI/PXI-6513/6514/6515/6516/6517/6518/6519 for compatibility with old user code");
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struct ni_65xx_private {
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void __iomem *mmio;
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};
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static unsigned int ni_65xx_num_ports(struct comedi_device *dev)
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{
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const struct ni_65xx_board *board = comedi_board(dev);
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@ -305,16 +301,15 @@ static unsigned int ni_65xx_num_ports(struct comedi_device *dev)
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static void ni_65xx_disable_input_filters(struct comedi_device *dev)
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{
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struct ni_65xx_private *devpriv = dev->private;
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unsigned int num_ports = ni_65xx_num_ports(dev);
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int i;
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/* disable input filtering on all ports */
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for (i = 0; i < num_ports; ++i)
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writeb(0x00, devpriv->mmio + NI_65XX_FILTER_ENA(i));
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writeb(0x00, dev->mmio + NI_65XX_FILTER_ENA(i));
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/* set filter interval to 0 (32bit reg) */
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writel(0x00000000, devpriv->mmio + NI_65XX_FILTER_REG);
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writel(0x00000000, dev->mmio + NI_65XX_FILTER_REG);
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}
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/* updates edge detection for base_chan to base_chan+31 */
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@ -323,7 +318,6 @@ static void ni_65xx_update_edge_detection(struct comedi_device *dev,
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unsigned int rising,
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unsigned int falling)
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{
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struct ni_65xx_private *devpriv = dev->private;
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unsigned int num_ports = ni_65xx_num_ports(dev);
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unsigned int port;
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@ -349,18 +343,18 @@ static void ni_65xx_update_edge_detection(struct comedi_device *dev,
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if (port_mask & 0xff) {
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if (~port_mask & 0xff) {
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port_rising |=
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readb(devpriv->mmio +
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readb(dev->mmio +
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NI_65XX_RISE_EDGE_ENA_REG(port)) &
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~port_mask;
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port_falling |=
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readb(devpriv->mmio +
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readb(dev->mmio +
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NI_65XX_FALL_EDGE_ENA_REG(port)) &
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~port_mask;
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}
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writeb(port_rising & 0xff,
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devpriv->mmio + NI_65XX_RISE_EDGE_ENA_REG(port));
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dev->mmio + NI_65XX_RISE_EDGE_ENA_REG(port));
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writeb(port_falling & 0xff,
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devpriv->mmio + NI_65XX_FALL_EDGE_ENA_REG(port));
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dev->mmio + NI_65XX_FALL_EDGE_ENA_REG(port));
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}
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}
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}
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@ -380,7 +374,6 @@ static int ni_65xx_dio_insn_config(struct comedi_device *dev,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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struct ni_65xx_private *devpriv = dev->private;
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unsigned long base_port = (unsigned long)s->private;
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unsigned int chan = CR_CHAN(insn->chanspec);
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unsigned int chan_mask = NI_65XX_CHAN_TO_MASK(chan);
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@ -405,34 +398,34 @@ static int ni_65xx_dio_insn_config(struct comedi_device *dev,
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* that the filter interval is never set to '0'. This is done
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* because other channels might still be enabled for filtering.
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*/
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val = readb(devpriv->mmio + NI_65XX_FILTER_ENA(port));
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val = readb(dev->mmio + NI_65XX_FILTER_ENA(port));
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if (interval) {
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writel(interval, devpriv->mmio + NI_65XX_FILTER_REG);
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writel(interval, dev->mmio + NI_65XX_FILTER_REG);
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val |= chan_mask;
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} else {
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val &= ~chan_mask;
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}
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writeb(val, devpriv->mmio + NI_65XX_FILTER_ENA(port));
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writeb(val, dev->mmio + NI_65XX_FILTER_ENA(port));
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break;
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case INSN_CONFIG_DIO_OUTPUT:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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writeb(NI_65XX_IO_SEL_OUTPUT,
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devpriv->mmio + NI_65XX_IO_SEL_REG(port));
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dev->mmio + NI_65XX_IO_SEL_REG(port));
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break;
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case INSN_CONFIG_DIO_INPUT:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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writeb(NI_65XX_IO_SEL_INPUT,
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devpriv->mmio + NI_65XX_IO_SEL_REG(port));
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dev->mmio + NI_65XX_IO_SEL_REG(port));
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break;
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case INSN_CONFIG_DIO_QUERY:
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if (s->type != COMEDI_SUBD_DIO)
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return -EINVAL;
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val = readb(devpriv->mmio + NI_65XX_IO_SEL_REG(port));
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val = readb(dev->mmio + NI_65XX_IO_SEL_REG(port));
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data[1] = (val == NI_65XX_IO_SEL_INPUT) ? COMEDI_INPUT
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: COMEDI_OUTPUT;
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break;
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@ -449,7 +442,6 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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struct ni_65xx_private *devpriv = dev->private;
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unsigned long base_port = (unsigned long)s->private;
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unsigned int base_chan = CR_CHAN(insn->chanspec);
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int last_port_offset = NI_65XX_CHAN_TO_PORT(s->n_chan - 1);
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@ -479,16 +471,16 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
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/* update the outputs */
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if (port_mask) {
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bits = readb(devpriv->mmio + NI_65XX_IO_DATA_REG(port));
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bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
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bits ^= s->io_bits; /* invert if necessary */
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bits &= ~port_mask;
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bits |= (port_data & port_mask);
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bits ^= s->io_bits; /* invert back */
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writeb(bits, devpriv->mmio + NI_65XX_IO_DATA_REG(port));
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writeb(bits, dev->mmio + NI_65XX_IO_DATA_REG(port));
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}
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/* read back the actual state */
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bits = readb(devpriv->mmio + NI_65XX_IO_DATA_REG(port));
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bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
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bits ^= s->io_bits; /* invert if necessary */
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if (bitshift > 0)
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bits <<= bitshift;
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@ -504,18 +496,17 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
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static irqreturn_t ni_65xx_interrupt(int irq, void *d)
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{
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struct comedi_device *dev = d;
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struct ni_65xx_private *devpriv = dev->private;
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struct comedi_subdevice *s = dev->read_subdev;
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unsigned int status;
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status = readb(devpriv->mmio + NI_65XX_STATUS_REG);
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status = readb(dev->mmio + NI_65XX_STATUS_REG);
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if ((status & NI_65XX_STATUS_INT) == 0)
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return IRQ_NONE;
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if ((status & NI_65XX_STATUS_EDGE_INT) == 0)
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return IRQ_NONE;
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writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
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devpriv->mmio + NI_65XX_CLR_REG);
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dev->mmio + NI_65XX_CLR_REG);
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comedi_buf_put(s, 0);
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s->async->events |= COMEDI_CB_EOS;
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@ -568,13 +559,11 @@ static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
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static int ni_65xx_intr_cmd(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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struct ni_65xx_private *devpriv = dev->private;
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writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
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devpriv->mmio + NI_65XX_CLR_REG);
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dev->mmio + NI_65XX_CLR_REG);
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writeb(NI_65XX_CTRL_FALL_EDGE_ENA | NI_65XX_CTRL_RISE_EDGE_ENA |
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NI_65XX_CTRL_INT_ENA | NI_65XX_CTRL_EDGE_ENA,
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devpriv->mmio + NI_65XX_CTRL_REG);
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dev->mmio + NI_65XX_CTRL_REG);
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return 0;
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}
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@ -582,9 +571,7 @@ static int ni_65xx_intr_cmd(struct comedi_device *dev,
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static int ni_65xx_intr_cancel(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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struct ni_65xx_private *devpriv = dev->private;
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writeb(0x00, devpriv->mmio + NI_65XX_CTRL_REG);
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writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
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return 0;
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}
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@ -672,7 +659,6 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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{
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struct pci_dev *pcidev = comedi_to_pci_dev(dev);
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const struct ni_65xx_board *board = NULL;
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struct ni_65xx_private *devpriv;
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struct comedi_subdevice *s;
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unsigned i;
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int ret;
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@ -688,21 +674,17 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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if (ret)
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return ret;
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devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
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if (!devpriv)
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return -ENOMEM;
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ret = ni_65xx_mite_init(pcidev);
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if (ret)
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return ret;
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devpriv->mmio = pci_ioremap_bar(pcidev, 1);
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if (!devpriv->mmio)
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dev->mmio = pci_ioremap_bar(pcidev, 1);
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if (!dev->mmio)
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return -ENOMEM;
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writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
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devpriv->mmio + NI_65XX_CLR_REG);
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writeb(0x00, devpriv->mmio + NI_65XX_CTRL_REG);
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dev->mmio + NI_65XX_CLR_REG);
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writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
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if (pcidev->irq) {
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ret = request_irq(pcidev->irq, ni_65xx_interrupt, IRQF_SHARED,
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@ -712,7 +694,7 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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}
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dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
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readb(devpriv->mmio + NI_65XX_ID_REG));
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readb(dev->mmio + NI_65XX_ID_REG));
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ret = comedi_alloc_subdevices(dev, 4);
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if (ret)
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@ -757,7 +739,7 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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/* reset all output ports to comedi '0' */
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for (i = 0; i < board->num_do_ports; ++i) {
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writeb(s->io_bits, /* inverted if necessary */
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devpriv->mmio +
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dev->mmio +
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NI_65XX_IO_DATA_REG(board->num_di_ports + i));
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}
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} else {
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@ -780,7 +762,7 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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/* configure all ports for input */
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for (i = 0; i < board->num_dio_ports; ++i) {
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writeb(NI_65XX_IO_SEL_INPUT,
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devpriv->mmio + NI_65XX_IO_SEL_REG(i));
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dev->mmio + NI_65XX_IO_SEL_REG(i));
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}
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} else {
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s->type = COMEDI_SUBD_UNUSED;
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@ -811,11 +793,9 @@ static int ni_65xx_auto_attach(struct comedi_device *dev,
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static void ni_65xx_detach(struct comedi_device *dev)
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{
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struct ni_65xx_private *devpriv = dev->private;
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if (devpriv && devpriv->mmio) {
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writeb(0x00, devpriv->mmio + NI_65XX_CTRL_REG);
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iounmap(devpriv->mmio);
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if (dev->mmio) {
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writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
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iounmap(dev->mmio);
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}
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if (dev->irq)
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free_irq(dev->irq, dev);
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