[PATCH] m32r: support a synthesizable M32700 core
This patch is for supporting a synthesizable M32700 core for the Mappi-II FPGA board. On the core, location of MFT (Multi-Function Timer) registers is slightly different from the M32700 chip. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -104,7 +104,8 @@
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#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
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#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
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#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32104)
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#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
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|| defined(CONFIG_CHIP_M32104)
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#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
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#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
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#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
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@ -117,7 +118,7 @@
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#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
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#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
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#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
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#else /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */
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#else
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#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
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#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
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#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
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@ -130,7 +131,7 @@
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#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
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#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
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#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
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#endif /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */
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#endif
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#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
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#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
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