ixgbe: enable extremely low latency
82598/82599 can support EITR == 0, which allows for the absolutely lowest latency setting in the hardware. This disables writeback batching and anything else that relies upon a delayed interrupt. This patch enables the feature of "override" when a user sets rx-usecs to zero, the driver will respect that setting over using RSC, and automatically disable RSC. If rx-usecs is used to set the EITR value to 0, then the driver should disable LRO (aka RSC) internally until EITR is set to non-zero again. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2079,6 +2079,27 @@ static int ixgbe_get_coalesce(struct net_device *netdev,
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return 0;
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}
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/*
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* this function must be called before setting the new value of
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* rx_itr_setting
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*/
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static void ixgbe_reenable_rsc(struct ixgbe_adapter *adapter,
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struct ethtool_coalesce *ec)
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{
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/* check the old value and enable RSC if necessary */
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if ((adapter->rx_itr_setting == 0) &&
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(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) {
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adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
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adapter->netdev->features |= NETIF_F_LRO;
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DPRINTK(PROBE, INFO, "rx-usecs set to %d, re-enabling RSC\n",
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ec->rx_coalesce_usecs);
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if (netif_running(adapter->netdev))
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ixgbe_reinit_locked(adapter);
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else
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ixgbe_reset(adapter);
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}
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}
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static int ixgbe_set_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *ec)
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{
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@ -2095,11 +2116,20 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
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adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
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if (ec->rx_coalesce_usecs > 1) {
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u32 max_int;
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if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
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max_int = IXGBE_MAX_RSC_INT_RATE;
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else
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max_int = IXGBE_MAX_INT_RATE;
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/* check the limits */
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if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
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if ((1000000/ec->rx_coalesce_usecs > max_int) ||
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(1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
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return -EINVAL;
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/* check the old value and enable RSC if necessary */
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ixgbe_reenable_rsc(adapter, ec);
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/* store the value in ints/second */
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adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
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@ -2108,6 +2138,9 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
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/* clear the lower bit as its used for dynamic state */
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adapter->rx_itr_setting &= ~1;
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} else if (ec->rx_coalesce_usecs == 1) {
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/* check the old value and enable RSC if necessary */
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ixgbe_reenable_rsc(adapter, ec);
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/* 1 means dynamic mode */
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adapter->rx_eitr_param = 20000;
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adapter->rx_itr_setting = 1;
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@ -2116,14 +2149,34 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
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* any other value means disable eitr, which is best
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* served by setting the interrupt rate very high
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*/
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if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
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adapter->rx_eitr_param = IXGBE_MAX_RSC_INT_RATE;
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else
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adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
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adapter->rx_itr_setting = 0;
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/*
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* if hardware RSC is enabled, disable it when
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* setting low latency mode, to avoid errata, assuming
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* that when the user set low latency mode they want
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* it at the cost of anything else
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*/
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if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
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adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
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netdev->features &= ~NETIF_F_LRO;
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DPRINTK(PROBE, INFO,
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"rx-usecs set to 0, disabling RSC\n");
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if (netif_running(netdev))
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ixgbe_reinit_locked(adapter);
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else
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ixgbe_reset(adapter);
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return 0;
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}
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}
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if (ec->tx_coalesce_usecs > 1) {
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/*
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* don't have to worry about max_int as above because
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* tx vectors don't do hardware RSC (an rx function)
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*/
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/* check the limits */
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if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
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(1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
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@ -2178,10 +2231,26 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data)
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ethtool_op_set_flags(netdev, data);
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/* if state changes we need to update adapter->flags and reset */
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if ((!!(data & ETH_FLAG_LRO)) !=
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(!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
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if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
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/*
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* cast both to bool and verify if they are set the same
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* but only enable RSC if itr is non-zero, as
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* itr=0 and RSC are mutually exclusive
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*/
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if (((!!(data & ETH_FLAG_LRO)) !=
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(!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) &&
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adapter->rx_itr_setting) {
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adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82599EB:
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need_reset = true;
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break;
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default:
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break;
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}
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} else if (!adapter->rx_itr_setting) {
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netdev->features &= ~ETH_FLAG_LRO;
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}
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}
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/*
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@ -1189,6 +1189,15 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
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/* must write high and low 16 bits to reset counter */
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itr_reg |= (itr_reg << 16);
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} else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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/*
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* 82599 can support a value of zero, so allow it for
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* max interrupt rate, but there is an errata where it can
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* not be zero with RSC
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*/
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if (itr_reg == 8 &&
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!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
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itr_reg = 0;
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/*
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* set the WDIS bit to not clear the timer bits and cause an
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* immediate assertion of the interrupt
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