powerpc/oprofile: G4 oprofile has variable number of counters
For ppc750 processors which use 4 performance counters instead of the 6 G4 uses but otherwise is compatible with G4. Signed-off-by: Octavian Purdila <opurdila@ixiacom.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -29,7 +29,7 @@
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static unsigned long reset_value[OP_MAX_COUNTER];
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static int oprofile_running;
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static u32 mmcr0_val, mmcr1_val, mmcr2_val;
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static u32 mmcr0_val, mmcr1_val, mmcr2_val, num_pmcs;
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#define MMCR0_PMC1_SHIFT 6
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#define MMCR0_PMC2_SHIFT 0
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@ -88,13 +88,12 @@ static int fsl7450_cpu_setup(struct op_counter_config *ctr)
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mtspr(SPRN_MMCR0, mmcr0_val);
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mtspr(SPRN_MMCR1, mmcr1_val);
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mtspr(SPRN_MMCR2, mmcr2_val);
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if (num_pmcs > 4)
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mtspr(SPRN_MMCR2, mmcr2_val);
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return 0;
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}
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#define NUM_CTRS 6
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/* Configures the global settings for the countes on all CPUs. */
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static int fsl7450_reg_setup(struct op_counter_config *ctr,
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struct op_system_config *sys,
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@ -102,12 +101,13 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
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{
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int i;
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num_pmcs = num_ctrs;
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/* Our counters count up, and "count" refers to
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* how much before the next interrupt, and we interrupt
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* on overflow. So we calculate the starting value
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* which will give us "count" until overflow.
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* Then we set the events on the enabled counters */
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for (i = 0; i < NUM_CTRS; ++i)
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for (i = 0; i < num_ctrs; ++i)
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reset_value[i] = 0x80000000UL - ctr[i].count;
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/* Set events for Counters 1 & 2 */
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@ -123,9 +123,10 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
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/* Set events for Counters 3-6 */
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mmcr1_val = mmcr1_event3(ctr[2].event)
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| mmcr1_event4(ctr[3].event)
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| mmcr1_event5(ctr[4].event)
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| mmcr1_event6(ctr[5].event);
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| mmcr1_event4(ctr[3].event);
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if (num_ctrs > 4)
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mmcr1_val |= mmcr1_event5(ctr[4].event)
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| mmcr1_event6(ctr[5].event);
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mmcr2_val = 0;
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@ -139,7 +140,7 @@ static int fsl7450_start(struct op_counter_config *ctr)
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mtmsr(mfmsr() | MSR_PMM);
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for (i = 0; i < NUM_CTRS; ++i) {
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for (i = 0; i < num_pmcs; ++i) {
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if (ctr[i].enabled)
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classic_ctr_write(i, reset_value[i]);
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else
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@ -184,7 +185,7 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
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pc = mfspr(SPRN_SIAR);
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is_kernel = is_kernel_addr(pc);
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for (i = 0; i < NUM_CTRS; ++i) {
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for (i = 0; i < num_pmcs; ++i) {
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val = classic_ctr_read(i);
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if (val < 0) {
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if (oprofile_running && ctr[i].enabled) {
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