iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts. Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com> [will: reworked irq equality checking and added SPI check] Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Geetha Sowjanya
Will Deacon
Родитель
99caf177f6
Коммит
f935448acf
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@ -63,6 +63,7 @@ stable kernels.
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| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
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| Cavium | ThunderX SMMUv2 | #27704 | N/A |
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| Cavium | ThunderX2 SMMUv3| #74 | N/A |
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| Cavium | ThunderX2 SMMUv3| #126 | N/A |
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| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
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@ -26,6 +26,12 @@ the PCIe specification.
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* "priq" - PRI Queue not empty
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* "cmdq-sync" - CMD_SYNC complete
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* "gerror" - Global Error activated
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* "combined" - The combined interrupt is optional,
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and should only be provided if the
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hardware supports just a single,
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combined interrupt line.
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If provided, then the combined interrupt
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will be used in preference to any others.
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- #iommu-cells : See the generic IOMMU binding described in
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devicetree/bindings/pci/pci-iommu.txt
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@ -833,6 +833,24 @@ static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
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return num_res;
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}
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static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
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{
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/*
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* Cavium ThunderX2 implementation doesn't not support unique
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* irq line. Use single irq line for all the SMMUv3 interrupts.
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*/
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if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
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return false;
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/*
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* ThunderX2 doesn't support MSIs from the SMMU, so we're checking
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* SPI numbers here.
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*/
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return smmu->event_gsiv == smmu->pri_gsiv &&
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smmu->event_gsiv == smmu->gerr_gsiv &&
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smmu->event_gsiv == smmu->sync_gsiv;
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}
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static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
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{
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/*
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@ -860,26 +878,33 @@ static void __init arm_smmu_v3_init_resources(struct resource *res,
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res[num_res].flags = IORESOURCE_MEM;
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num_res++;
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if (arm_smmu_v3_is_combined_irq(smmu)) {
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if (smmu->event_gsiv)
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acpi_iort_register_irq(smmu->event_gsiv, "combined",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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} else {
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if (smmu->event_gsiv)
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acpi_iort_register_irq(smmu->event_gsiv, "eventq",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->event_gsiv)
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acpi_iort_register_irq(smmu->event_gsiv, "eventq",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->pri_gsiv)
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acpi_iort_register_irq(smmu->pri_gsiv, "priq",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->pri_gsiv)
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acpi_iort_register_irq(smmu->pri_gsiv, "priq",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->gerr_gsiv)
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acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->gerr_gsiv)
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acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->sync_gsiv)
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acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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if (smmu->sync_gsiv)
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acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
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ACPI_EDGE_SENSITIVE,
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&res[num_res++]);
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}
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}
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static bool __init arm_smmu_v3_is_coherent(struct acpi_iort_node *node)
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@ -615,6 +615,7 @@ struct arm_smmu_device {
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struct arm_smmu_priq priq;
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int gerr_irq;
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int combined_irq;
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unsigned long ias; /* IPA */
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unsigned long oas; /* PA */
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@ -1330,6 +1331,24 @@ static irqreturn_t arm_smmu_gerror_handler(int irq, void *dev)
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return IRQ_HANDLED;
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}
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static irqreturn_t arm_smmu_combined_irq_thread(int irq, void *dev)
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{
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struct arm_smmu_device *smmu = dev;
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arm_smmu_evtq_thread(irq, dev);
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if (smmu->features & ARM_SMMU_FEAT_PRI)
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arm_smmu_priq_thread(irq, dev);
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return IRQ_HANDLED;
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}
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static irqreturn_t arm_smmu_combined_irq_handler(int irq, void *dev)
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{
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arm_smmu_gerror_handler(irq, dev);
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arm_smmu_cmdq_sync_handler(irq, dev);
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return IRQ_WAKE_THREAD;
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}
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/* IO_PGTABLE API */
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static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu)
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{
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@ -2229,18 +2248,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
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devm_add_action(dev, arm_smmu_free_msis, dev);
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}
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static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
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static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu)
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{
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int ret, irq;
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u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
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/* Disable IRQs first */
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ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL,
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ARM_SMMU_IRQ_CTRLACK);
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if (ret) {
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dev_err(smmu->dev, "failed to disable irqs\n");
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return ret;
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}
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int irq, ret;
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arm_smmu_setup_msis(smmu);
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@ -2283,10 +2293,41 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
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if (ret < 0)
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dev_warn(smmu->dev,
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"failed to enable priq irq\n");
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else
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irqen_flags |= IRQ_CTRL_PRIQ_IRQEN;
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}
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}
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}
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static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
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{
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int ret, irq;
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u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
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/* Disable IRQs first */
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ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL,
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ARM_SMMU_IRQ_CTRLACK);
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if (ret) {
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dev_err(smmu->dev, "failed to disable irqs\n");
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return ret;
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}
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irq = smmu->combined_irq;
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if (irq) {
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/*
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* Cavium ThunderX2 implementation doesn't not support unique
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* irq lines. Use single irq line for all the SMMUv3 interrupts.
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*/
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ret = devm_request_threaded_irq(smmu->dev, irq,
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arm_smmu_combined_irq_handler,
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arm_smmu_combined_irq_thread,
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IRQF_ONESHOT,
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"arm-smmu-v3-combined-irq", smmu);
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if (ret < 0)
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dev_warn(smmu->dev, "failed to enable combined irq\n");
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} else
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arm_smmu_setup_unique_irqs(smmu);
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if (smmu->features & ARM_SMMU_FEAT_PRI)
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irqen_flags |= IRQ_CTRL_PRIQ_IRQEN;
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/* Enable interrupt generation on the SMMU */
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ret = arm_smmu_write_reg_sync(smmu, irqen_flags,
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@ -2729,22 +2770,27 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
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return PTR_ERR(smmu->base);
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/* Interrupt lines */
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irq = platform_get_irq_byname(pdev, "eventq");
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if (irq > 0)
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smmu->evtq.q.irq = irq;
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irq = platform_get_irq_byname(pdev, "priq");
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irq = platform_get_irq_byname(pdev, "combined");
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if (irq > 0)
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smmu->priq.q.irq = irq;
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smmu->combined_irq = irq;
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else {
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irq = platform_get_irq_byname(pdev, "eventq");
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if (irq > 0)
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smmu->evtq.q.irq = irq;
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irq = platform_get_irq_byname(pdev, "cmdq-sync");
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if (irq > 0)
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smmu->cmdq.q.irq = irq;
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irq = platform_get_irq_byname(pdev, "priq");
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if (irq > 0)
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smmu->priq.q.irq = irq;
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irq = platform_get_irq_byname(pdev, "gerror");
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if (irq > 0)
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smmu->gerr_irq = irq;
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irq = platform_get_irq_byname(pdev, "cmdq-sync");
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if (irq > 0)
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smmu->cmdq.q.irq = irq;
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irq = platform_get_irq_byname(pdev, "gerror");
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if (irq > 0)
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smmu->gerr_irq = irq;
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}
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/* Probe the h/w */
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ret = arm_smmu_device_hw_probe(smmu);
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if (ret)
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