drm/i915/display: remove explicit CNL handling from intel_combo_phy.c
The only real platform with DISPLAY_VER == 10 is GLK, that doesn't have combo phys. We don't need to handle CNL explicitly in intel_combo_phy.c. Remove code and rename functions/macros accordingly to use ICL prefix. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210728215946.1573015-5-lucas.demarchi@intel.com
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@ -23,9 +23,9 @@ enum {
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PROCMON_1_05V_DOT_1,
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};
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static const struct cnl_procmon {
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static const struct icl_procmon {
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u32 dw1, dw9, dw10;
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} cnl_procmon_values[] = {
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} icl_procmon_values[] = {
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[PROCMON_0_85V_DOT_0] =
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{ .dw1 = 0x00000000, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96, },
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[PROCMON_0_95V_DOT_0] =
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@ -38,15 +38,10 @@ static const struct cnl_procmon {
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{ .dw1 = 0x00440000, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1, },
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};
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/*
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* CNL has just one set of registers, while gen11 has a set for each combo PHY.
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* The CNL registers are equivalent to the gen11 PHY A registers, that's why we
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* call the ICL macros even though the function has CNL on its name.
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*/
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static const struct cnl_procmon *
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cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
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static const struct icl_procmon *
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icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
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{
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const struct cnl_procmon *procmon;
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const struct icl_procmon *procmon;
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u32 val;
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val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy));
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@ -55,32 +50,32 @@ cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
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MISSING_CASE(val);
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fallthrough;
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case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
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procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
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procmon = &icl_procmon_values[PROCMON_0_85V_DOT_0];
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break;
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case VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_0:
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procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_0];
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procmon = &icl_procmon_values[PROCMON_0_95V_DOT_0];
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break;
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case VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_1:
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procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_1];
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procmon = &icl_procmon_values[PROCMON_0_95V_DOT_1];
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break;
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case VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_0:
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procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_0];
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procmon = &icl_procmon_values[PROCMON_1_05V_DOT_0];
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break;
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case VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_1:
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procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_1];
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procmon = &icl_procmon_values[PROCMON_1_05V_DOT_1];
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break;
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}
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return procmon;
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}
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static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
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static void icl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
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enum phy phy)
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{
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const struct cnl_procmon *procmon;
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const struct icl_procmon *procmon;
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u32 val;
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procmon = cnl_get_procmon_ref_values(dev_priv, phy);
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procmon = icl_get_procmon_ref_values(dev_priv, phy);
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val = intel_de_read(dev_priv, ICL_PORT_COMP_DW1(phy));
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val &= ~((0xff << 16) | 0xff);
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@ -109,13 +104,13 @@ static bool check_phy_reg(struct drm_i915_private *dev_priv,
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return true;
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}
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static bool cnl_verify_procmon_ref_values(struct drm_i915_private *dev_priv,
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static bool icl_verify_procmon_ref_values(struct drm_i915_private *dev_priv,
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enum phy phy)
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{
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const struct cnl_procmon *procmon;
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const struct icl_procmon *procmon;
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bool ret;
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procmon = cnl_get_procmon_ref_values(dev_priv, phy);
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procmon = icl_get_procmon_ref_values(dev_priv, phy);
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ret = check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW1(phy),
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(0xff << 16) | 0xff, procmon->dw1);
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@ -127,61 +122,6 @@ static bool cnl_verify_procmon_ref_values(struct drm_i915_private *dev_priv,
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return ret;
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}
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static bool cnl_combo_phy_enabled(struct drm_i915_private *dev_priv)
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{
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return !(intel_de_read(dev_priv, CHICKEN_MISC_2) & CNL_COMP_PWR_DOWN) &&
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(intel_de_read(dev_priv, CNL_PORT_COMP_DW0) & COMP_INIT);
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}
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static bool cnl_combo_phy_verify_state(struct drm_i915_private *dev_priv)
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{
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enum phy phy = PHY_A;
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bool ret;
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if (!cnl_combo_phy_enabled(dev_priv))
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return false;
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ret = cnl_verify_procmon_ref_values(dev_priv, phy);
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ret &= check_phy_reg(dev_priv, phy, CNL_PORT_CL1CM_DW5,
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CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE);
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return ret;
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}
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static void cnl_combo_phys_init(struct drm_i915_private *dev_priv)
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{
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u32 val;
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val = intel_de_read(dev_priv, CHICKEN_MISC_2);
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val &= ~CNL_COMP_PWR_DOWN;
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intel_de_write(dev_priv, CHICKEN_MISC_2, val);
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/* Dummy PORT_A to get the correct CNL register from the ICL macro */
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cnl_set_procmon_ref_values(dev_priv, PHY_A);
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val = intel_de_read(dev_priv, CNL_PORT_COMP_DW0);
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val |= COMP_INIT;
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intel_de_write(dev_priv, CNL_PORT_COMP_DW0, val);
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val = intel_de_read(dev_priv, CNL_PORT_CL1CM_DW5);
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val |= CL_POWER_DOWN_ENABLE;
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intel_de_write(dev_priv, CNL_PORT_CL1CM_DW5, val);
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}
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static void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv)
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{
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u32 val;
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if (!cnl_combo_phy_verify_state(dev_priv))
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drm_warn(&dev_priv->drm,
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"Combo PHY HW state changed unexpectedly.\n");
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val = intel_de_read(dev_priv, CHICKEN_MISC_2);
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val |= CNL_COMP_PWR_DOWN;
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intel_de_write(dev_priv, CHICKEN_MISC_2, val);
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}
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static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)
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{
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/*
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@ -291,7 +231,7 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
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DCC_MODE_SELECT_CONTINUOSLY);
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}
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ret &= cnl_verify_procmon_ref_values(dev_priv, phy);
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ret &= icl_verify_procmon_ref_values(dev_priv, phy);
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if (phy_is_master(dev_priv, phy)) {
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ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),
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@ -415,7 +355,7 @@ skip_phy_misc:
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intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val);
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}
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cnl_set_procmon_ref_values(dev_priv, phy);
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icl_set_procmon_ref_values(dev_priv, phy);
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if (phy_is_master(dev_priv, phy)) {
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val = intel_de_read(dev_priv, ICL_PORT_COMP_DW8(phy));
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@ -474,16 +414,10 @@ skip_phy_misc:
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void intel_combo_phy_init(struct drm_i915_private *i915)
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{
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if (DISPLAY_VER(i915) >= 11)
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icl_combo_phys_init(i915);
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else if (IS_CANNONLAKE(i915))
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cnl_combo_phys_init(i915);
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icl_combo_phys_init(i915);
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}
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void intel_combo_phy_uninit(struct drm_i915_private *i915)
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{
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if (DISPLAY_VER(i915) >= 11)
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icl_combo_phys_uninit(i915);
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else if (IS_CANNONLAKE(i915))
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cnl_combo_phys_uninit(i915);
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icl_combo_phys_uninit(i915);
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}
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