ARM: OMAP2+: Drop i2c platform data for omap4
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
Родитель
9216847868
Коммит
f9d34da303
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@ -22,7 +22,6 @@
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#include <linux/io.h>
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#include <linux/power/smartreflex.h>
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#include <linux/platform_data/i2c-omap.h>
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#include <linux/omap-dma.h>
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@ -32,7 +31,6 @@
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#include "cm2_44xx.h"
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#include "prm44xx.h"
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#include "prm-regbits-44xx.h"
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#include "i2c.h"
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#include "wd_timer.h"
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/* Base offset for all OMAP4 interrupts external to MPUSS */
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@ -1352,93 +1350,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
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},
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};
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/*
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* 'i2c' class
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* multimaster high-speed i2c controller
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
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.rev_offs = 0,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0090,
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.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
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.name = "i2c",
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.sysc = &omap44xx_i2c_sysc,
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.reset = &omap_i2c_reset,
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};
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/* i2c1 */
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static struct omap_hwmod omap44xx_i2c1_hwmod = {
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.name = "i2c1",
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.class = &omap44xx_i2c_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "func_96m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* i2c2 */
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static struct omap_hwmod omap44xx_i2c2_hwmod = {
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.name = "i2c2",
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.class = &omap44xx_i2c_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "func_96m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* i2c3 */
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static struct omap_hwmod omap44xx_i2c3_hwmod = {
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.name = "i2c3",
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.class = &omap44xx_i2c_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "func_96m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* i2c4 */
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static struct omap_hwmod omap44xx_i2c4_hwmod = {
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.name = "i2c4",
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.class = &omap44xx_i2c_hwmod_class,
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.clkdm_name = "l4_per_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "func_96m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'ipu' class
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* imaging processor unit
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@ -3512,38 +3423,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> i2c1 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c1_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> i2c2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c2_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> i2c3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c3_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> i2c4 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c4_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_2 -> ipu */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = {
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.master = &omap44xx_l3_main_2_hwmod,
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@ -4068,10 +3947,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l3_main_2__gpu,
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&omap44xx_l4_per__hdq1w,
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&omap44xx_l4_cfg__hsi,
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&omap44xx_l4_per__i2c1,
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&omap44xx_l4_per__i2c2,
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&omap44xx_l4_per__i2c3,
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&omap44xx_l4_per__i2c4,
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&omap44xx_l3_main_2__ipu,
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&omap44xx_l3_main_2__iss,
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/* &omap44xx_iva__sl2if, */
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