Merge branch 'peter/topic/for-mark/mcpdm_for-3.2' of git://gitorious.org/omap-audio/linux-audio into for-3.2
This commit is contained in:
Коммит
fadd81b52c
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@ -330,6 +330,38 @@ static void omap_init_audio(void)
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static inline void omap_init_audio(void) {}
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static inline void omap_init_audio(void) {}
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#endif
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#endif
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#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
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defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
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static struct omap_device_pm_latency omap_mcpdm_latency[] = {
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{
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.deactivate_func = omap_device_idle_hwmods,
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.activate_func = omap_device_enable_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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static void omap_init_mcpdm(void)
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{
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struct omap_hwmod *oh;
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struct omap_device *od;
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oh = omap_hwmod_lookup("mcpdm");
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if (!oh) {
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printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
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return;
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}
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od = omap_device_build("omap-mcpdm", -1, oh, NULL, 0,
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omap_mcpdm_latency,
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ARRAY_SIZE(omap_mcpdm_latency), 0);
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if (IS_ERR(od))
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printk(KERN_ERR "Could not build omap_device for omap-mcpdm-dai\n");
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}
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#else
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static inline void omap_init_mcpdm(void) {}
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#endif
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#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
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#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
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#include <plat/mcspi.h>
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#include <plat/mcspi.h>
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@ -683,6 +715,7 @@ static int __init omap2_init_devices(void)
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* in alphabetical order so they're easier to sort through.
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* in alphabetical order so they're easier to sort through.
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*/
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*/
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omap_init_audio();
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omap_init_audio();
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omap_init_mcpdm();
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omap_init_camera();
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omap_init_camera();
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omap_init_mbox();
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omap_init_mbox();
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omap_init_mcspi();
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omap_init_mcspi();
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@ -5430,7 +5430,7 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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&omap44xx_mcbsp4_hwmod,
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&omap44xx_mcbsp4_hwmod,
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/* mcpdm class */
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/* mcpdm class */
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/* &omap44xx_mcpdm_hwmod, */
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&omap44xx_mcpdm_hwmod,
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/* mcspi class */
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/* mcspi class */
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&omap44xx_mcspi1_hwmod,
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&omap44xx_mcspi1_hwmod,
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@ -74,41 +74,6 @@ void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
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/*-------------------------------------------------------------------------*/
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
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defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
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static struct resource mcpdm_resources[] = {
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{
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.name = "mcpdm_mem",
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.start = OMAP44XX_MCPDM_BASE,
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.end = OMAP44XX_MCPDM_BASE + SZ_4K,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "mcpdm_irq",
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.start = OMAP44XX_IRQ_MCPDM,
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.end = OMAP44XX_IRQ_MCPDM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device omap_mcpdm_device = {
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.name = "omap-mcpdm",
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.id = -1,
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.num_resources = ARRAY_SIZE(mcpdm_resources),
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.resource = mcpdm_resources,
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};
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static void omap_init_mcpdm(void)
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{
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(void) platform_device_register(&omap_mcpdm_device);
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}
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#else
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static inline void omap_init_mcpdm(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
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defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
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defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
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@ -291,7 +256,6 @@ static int __init omap_init_devices(void)
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* in alphabetical order so they're easier to sort through.
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* in alphabetical order so they're easier to sort through.
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*/
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*/
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omap_init_rng();
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omap_init_rng();
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omap_init_mcpdm();
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omap_init_uwire();
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omap_init_uwire();
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return 0;
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return 0;
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}
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}
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@ -1,7 +1,7 @@
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# OMAP Platform Support
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# OMAP Platform Support
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snd-soc-omap-objs := omap-pcm.o
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snd-soc-omap-objs := omap-pcm.o
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snd-soc-omap-mcbsp-objs := omap-mcbsp.o
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snd-soc-omap-mcbsp-objs := omap-mcbsp.o
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snd-soc-omap-mcpdm-objs := omap-mcpdm.o mcpdm.o
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snd-soc-omap-mcpdm-objs := omap-mcpdm.o
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snd-soc-omap-hdmi-objs := omap-hdmi.o
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snd-soc-omap-hdmi-objs := omap-hdmi.o
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obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o
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obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o
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@ -1,470 +0,0 @@
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/*
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* mcpdm.c -- McPDM interface driver
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*
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* Author: Jorge Eduardo Candelaria <x0107209@ti.com>
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* Copyright (C) 2009 - Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/wait.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include "mcpdm.h"
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static struct omap_mcpdm *mcpdm;
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static inline void omap_mcpdm_write(u16 reg, u32 val)
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{
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__raw_writel(val, mcpdm->io_base + reg);
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}
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static inline int omap_mcpdm_read(u16 reg)
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{
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return __raw_readl(mcpdm->io_base + reg);
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}
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static void omap_mcpdm_reg_dump(void)
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{
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dev_dbg(mcpdm->dev, "***********************\n");
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dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQSTATUS_RAW));
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dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQSTATUS));
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dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQENABLE_SET));
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dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQENABLE_CLR));
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dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_IRQWAKE_EN));
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dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAENABLE_SET));
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dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAENABLE_CLR));
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dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DMAWAKEEN));
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dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
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omap_mcpdm_read(MCPDM_CTRL));
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dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DN_DATA));
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dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
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omap_mcpdm_read(MCPDM_UP_DATA));
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dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
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omap_mcpdm_read(MCPDM_FIFO_CTRL_DN));
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dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
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omap_mcpdm_read(MCPDM_FIFO_CTRL_UP));
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dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n",
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omap_mcpdm_read(MCPDM_DN_OFFSET));
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dev_dbg(mcpdm->dev, "***********************\n");
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}
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/*
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* Takes the McPDM module in and out of reset state.
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* Uplink and downlink can be reset individually.
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*/
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static void omap_mcpdm_reset_capture(int reset)
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{
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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if (reset)
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ctrl |= SW_UP_RST;
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else
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ctrl &= ~SW_UP_RST;
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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}
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static void omap_mcpdm_reset_playback(int reset)
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{
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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if (reset)
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ctrl |= SW_DN_RST;
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else
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ctrl &= ~SW_DN_RST;
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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}
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/*
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* Enables the transfer through the PDM interface to/from the Phoenix
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* codec by enabling the corresponding UP or DN channels.
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*/
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void omap_mcpdm_start(int stream)
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{
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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if (stream)
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ctrl |= mcpdm->up_channels;
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else
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ctrl |= mcpdm->dn_channels;
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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}
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/*
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* Disables the transfer through the PDM interface to/from the Phoenix
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* codec by disabling the corresponding UP or DN channels.
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*/
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void omap_mcpdm_stop(int stream)
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{
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int ctrl = omap_mcpdm_read(MCPDM_CTRL);
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if (stream)
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ctrl &= ~mcpdm->up_channels;
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else
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ctrl &= ~mcpdm->dn_channels;
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omap_mcpdm_write(MCPDM_CTRL, ctrl);
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}
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|
||||||
/*
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|
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* Configures McPDM uplink for audio recording.
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|
||||||
* This function should be called before omap_mcpdm_start.
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*/
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int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
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{
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int irq_mask = 0;
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int ctrl;
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if (!uplink)
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return -EINVAL;
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mcpdm->uplink = uplink;
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||||||
/* Enable irq request generation */
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|
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irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
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omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
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||||||
/* Configure uplink threshold */
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|
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if (uplink->threshold > UP_THRES_MAX)
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|
||||||
uplink->threshold = UP_THRES_MAX;
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|
||||||
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|
||||||
omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold);
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|
||||||
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|
||||||
/* Configure DMA controller */
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|
||||||
omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE);
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|
||||||
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|
||||||
/* Set pdm out format */
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|
||||||
ctrl = omap_mcpdm_read(MCPDM_CTRL);
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|
||||||
ctrl &= ~PDMOUTFORMAT;
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|
||||||
ctrl |= uplink->format & PDMOUTFORMAT;
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|
||||||
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|
||||||
/* Uplink channels */
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|
||||||
mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK);
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|
||||||
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|
||||||
omap_mcpdm_write(MCPDM_CTRL, ctrl);
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|
||||||
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|
||||||
return 0;
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|
||||||
}
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|
||||||
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|
||||||
/*
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|
||||||
* Configures McPDM downlink for audio playback.
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|
||||||
* This function should be called before omap_mcpdm_start.
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|
||||||
*/
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|
||||||
int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
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|
||||||
{
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|
||||||
int irq_mask = 0;
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|
||||||
int ctrl;
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|
||||||
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|
||||||
if (!downlink)
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|
||||||
return -EINVAL;
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|
||||||
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|
||||||
mcpdm->downlink = downlink;
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|
||||||
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|
||||||
/* Enable irq request generation */
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|
||||||
irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
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|
||||||
omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
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|
||||||
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|
||||||
/* Configure uplink threshold */
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|
||||||
if (downlink->threshold > DN_THRES_MAX)
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|
||||||
downlink->threshold = DN_THRES_MAX;
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|
||||||
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|
||||||
omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold);
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|
||||||
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|
||||||
/* Enable DMA request generation */
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|
||||||
omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE);
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||||||
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|
||||||
/* Set pdm out format */
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|
||||||
ctrl = omap_mcpdm_read(MCPDM_CTRL);
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|
||||||
ctrl &= ~PDMOUTFORMAT;
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|
||||||
ctrl |= downlink->format & PDMOUTFORMAT;
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|
||||||
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|
||||||
/* Downlink channels */
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|
||||||
mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK);
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|
||||||
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|
||||||
omap_mcpdm_write(MCPDM_CTRL, ctrl);
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|
||||||
|
|
||||||
return 0;
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|
||||||
}
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|
||||||
|
|
||||||
/*
|
|
||||||
* Cleans McPDM uplink configuration.
|
|
||||||
* This function should be called when the stream is closed.
|
|
||||||
*/
|
|
||||||
int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
|
|
||||||
{
|
|
||||||
int irq_mask = 0;
|
|
||||||
|
|
||||||
if (!uplink)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
/* Disable irq request generation */
|
|
||||||
irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
|
|
||||||
omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
|
|
||||||
|
|
||||||
/* Disable DMA request generation */
|
|
||||||
omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE);
|
|
||||||
|
|
||||||
/* Clear Downlink channels */
|
|
||||||
mcpdm->up_channels = 0;
|
|
||||||
|
|
||||||
mcpdm->uplink = NULL;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Cleans McPDM downlink configuration.
|
|
||||||
* This function should be called when the stream is closed.
|
|
||||||
*/
|
|
||||||
int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink)
|
|
||||||
{
|
|
||||||
int irq_mask = 0;
|
|
||||||
|
|
||||||
if (!downlink)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
/* Disable irq request generation */
|
|
||||||
irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
|
|
||||||
omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
|
|
||||||
|
|
||||||
/* Disable DMA request generation */
|
|
||||||
omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE);
|
|
||||||
|
|
||||||
/* clear Downlink channels */
|
|
||||||
mcpdm->dn_channels = 0;
|
|
||||||
|
|
||||||
mcpdm->downlink = NULL;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
|
|
||||||
{
|
|
||||||
struct omap_mcpdm *mcpdm_irq = dev_id;
|
|
||||||
int irq_status;
|
|
||||||
|
|
||||||
irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS);
|
|
||||||
|
|
||||||
/* Acknowledge irq event */
|
|
||||||
omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status);
|
|
||||||
|
|
||||||
if (irq & MCPDM_DN_IRQ_FULL) {
|
|
||||||
dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
|
|
||||||
omap_mcpdm_reset_playback(1);
|
|
||||||
omap_mcpdm_playback_open(mcpdm_irq->downlink);
|
|
||||||
omap_mcpdm_reset_playback(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (irq & MCPDM_DN_IRQ_EMPTY) {
|
|
||||||
dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
|
|
||||||
omap_mcpdm_reset_playback(1);
|
|
||||||
omap_mcpdm_playback_open(mcpdm_irq->downlink);
|
|
||||||
omap_mcpdm_reset_playback(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (irq & MCPDM_DN_IRQ) {
|
|
||||||
dev_dbg(mcpdm_irq->dev, "DN write request\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
if (irq & MCPDM_UP_IRQ_FULL) {
|
|
||||||
dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
|
|
||||||
omap_mcpdm_reset_capture(1);
|
|
||||||
omap_mcpdm_capture_open(mcpdm_irq->uplink);
|
|
||||||
omap_mcpdm_reset_capture(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (irq & MCPDM_UP_IRQ_EMPTY) {
|
|
||||||
dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
|
|
||||||
omap_mcpdm_reset_capture(1);
|
|
||||||
omap_mcpdm_capture_open(mcpdm_irq->uplink);
|
|
||||||
omap_mcpdm_reset_capture(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (irq & MCPDM_UP_IRQ) {
|
|
||||||
dev_dbg(mcpdm_irq->dev, "UP write request\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
|
||||||
}
|
|
||||||
|
|
||||||
int omap_mcpdm_request(void)
|
|
||||||
{
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
clk_enable(mcpdm->clk);
|
|
||||||
|
|
||||||
spin_lock(&mcpdm->lock);
|
|
||||||
|
|
||||||
if (!mcpdm->free) {
|
|
||||||
dev_err(mcpdm->dev, "McPDM interface is in use\n");
|
|
||||||
spin_unlock(&mcpdm->lock);
|
|
||||||
ret = -EBUSY;
|
|
||||||
goto err;
|
|
||||||
}
|
|
||||||
mcpdm->free = 0;
|
|
||||||
|
|
||||||
spin_unlock(&mcpdm->lock);
|
|
||||||
|
|
||||||
/* Disable lines while request is ongoing */
|
|
||||||
omap_mcpdm_write(MCPDM_CTRL, 0x00);
|
|
||||||
|
|
||||||
ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
|
|
||||||
0, "McPDM", (void *)mcpdm);
|
|
||||||
if (ret) {
|
|
||||||
dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n");
|
|
||||||
goto err;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
err:
|
|
||||||
clk_disable(mcpdm->clk);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
void omap_mcpdm_free(void)
|
|
||||||
{
|
|
||||||
spin_lock(&mcpdm->lock);
|
|
||||||
if (mcpdm->free) {
|
|
||||||
dev_err(mcpdm->dev, "McPDM interface is already free\n");
|
|
||||||
spin_unlock(&mcpdm->lock);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
mcpdm->free = 1;
|
|
||||||
spin_unlock(&mcpdm->lock);
|
|
||||||
|
|
||||||
clk_disable(mcpdm->clk);
|
|
||||||
|
|
||||||
free_irq(mcpdm->irq, (void *)mcpdm);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Enable/disable DC offset cancelation for the analog
|
|
||||||
* headset path (PDM channels 1 and 2).
|
|
||||||
*/
|
|
||||||
int omap_mcpdm_set_offset(int offset1, int offset2)
|
|
||||||
{
|
|
||||||
int offset;
|
|
||||||
|
|
||||||
if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX))
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2);
|
|
||||||
|
|
||||||
/* offset cancellation for channel 1 */
|
|
||||||
if (offset1)
|
|
||||||
offset |= DN_OFST_RX1_EN;
|
|
||||||
else
|
|
||||||
offset &= ~DN_OFST_RX1_EN;
|
|
||||||
|
|
||||||
/* offset cancellation for channel 2 */
|
|
||||||
if (offset2)
|
|
||||||
offset |= DN_OFST_RX2_EN;
|
|
||||||
else
|
|
||||||
offset &= ~DN_OFST_RX2_EN;
|
|
||||||
|
|
||||||
omap_mcpdm_write(MCPDM_DN_OFFSET, offset);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int __devinit omap_mcpdm_probe(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct resource *res;
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
|
|
||||||
if (!mcpdm) {
|
|
||||||
ret = -ENOMEM;
|
|
||||||
goto exit;
|
|
||||||
}
|
|
||||||
|
|
||||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
||||||
if (res == NULL) {
|
|
||||||
dev_err(&pdev->dev, "no resource\n");
|
|
||||||
goto err_resource;
|
|
||||||
}
|
|
||||||
|
|
||||||
spin_lock_init(&mcpdm->lock);
|
|
||||||
mcpdm->free = 1;
|
|
||||||
mcpdm->io_base = ioremap(res->start, resource_size(res));
|
|
||||||
if (!mcpdm->io_base) {
|
|
||||||
ret = -ENOMEM;
|
|
||||||
goto err_resource;
|
|
||||||
}
|
|
||||||
|
|
||||||
mcpdm->irq = platform_get_irq(pdev, 0);
|
|
||||||
|
|
||||||
mcpdm->clk = clk_get(&pdev->dev, "pdm_ck");
|
|
||||||
if (IS_ERR(mcpdm->clk)) {
|
|
||||||
ret = PTR_ERR(mcpdm->clk);
|
|
||||||
dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret);
|
|
||||||
goto err_clk;
|
|
||||||
}
|
|
||||||
|
|
||||||
mcpdm->dev = &pdev->dev;
|
|
||||||
platform_set_drvdata(pdev, mcpdm);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
err_clk:
|
|
||||||
iounmap(mcpdm->io_base);
|
|
||||||
err_resource:
|
|
||||||
kfree(mcpdm);
|
|
||||||
exit:
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
int __devexit omap_mcpdm_remove(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev);
|
|
||||||
|
|
||||||
platform_set_drvdata(pdev, NULL);
|
|
||||||
|
|
||||||
clk_put(mcpdm_ptr->clk);
|
|
||||||
|
|
||||||
iounmap(mcpdm_ptr->io_base);
|
|
||||||
|
|
||||||
mcpdm_ptr->clk = NULL;
|
|
||||||
mcpdm_ptr->free = 0;
|
|
||||||
mcpdm_ptr->dev = NULL;
|
|
||||||
|
|
||||||
kfree(mcpdm_ptr);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
|
@ -1,153 +0,0 @@
|
||||||
/*
|
|
||||||
* mcpdm.h -- Defines for McPDM driver
|
|
||||||
*
|
|
||||||
* Author: Jorge Eduardo Candelaria <x0107209@ti.com>
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License
|
|
||||||
* version 2 as published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but
|
|
||||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
||||||
* General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
|
||||||
* 02110-1301 USA
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* McPDM registers */
|
|
||||||
|
|
||||||
#define MCPDM_REVISION 0x00
|
|
||||||
#define MCPDM_SYSCONFIG 0x10
|
|
||||||
#define MCPDM_IRQSTATUS_RAW 0x24
|
|
||||||
#define MCPDM_IRQSTATUS 0x28
|
|
||||||
#define MCPDM_IRQENABLE_SET 0x2C
|
|
||||||
#define MCPDM_IRQENABLE_CLR 0x30
|
|
||||||
#define MCPDM_IRQWAKE_EN 0x34
|
|
||||||
#define MCPDM_DMAENABLE_SET 0x38
|
|
||||||
#define MCPDM_DMAENABLE_CLR 0x3C
|
|
||||||
#define MCPDM_DMAWAKEEN 0x40
|
|
||||||
#define MCPDM_CTRL 0x44
|
|
||||||
#define MCPDM_DN_DATA 0x48
|
|
||||||
#define MCPDM_UP_DATA 0x4C
|
|
||||||
#define MCPDM_FIFO_CTRL_DN 0x50
|
|
||||||
#define MCPDM_FIFO_CTRL_UP 0x54
|
|
||||||
#define MCPDM_DN_OFFSET 0x58
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MCPDM_IRQ bit fields
|
|
||||||
* IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define MCPDM_DN_IRQ (1 << 0)
|
|
||||||
#define MCPDM_DN_IRQ_EMPTY (1 << 1)
|
|
||||||
#define MCPDM_DN_IRQ_ALMST_EMPTY (1 << 2)
|
|
||||||
#define MCPDM_DN_IRQ_FULL (1 << 3)
|
|
||||||
|
|
||||||
#define MCPDM_UP_IRQ (1 << 8)
|
|
||||||
#define MCPDM_UP_IRQ_EMPTY (1 << 9)
|
|
||||||
#define MCPDM_UP_IRQ_ALMST_FULL (1 << 10)
|
|
||||||
#define MCPDM_UP_IRQ_FULL (1 << 11)
|
|
||||||
|
|
||||||
#define MCPDM_DOWNLINK_IRQ_MASK 0x00F
|
|
||||||
#define MCPDM_UPLINK_IRQ_MASK 0xF00
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MCPDM_DMAENABLE bit fields
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define DMA_DN_ENABLE 0x1
|
|
||||||
#define DMA_UP_ENABLE 0x2
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MCPDM_CTRL bit fields
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define PDM_UP1_EN 0x0001
|
|
||||||
#define PDM_UP2_EN 0x0002
|
|
||||||
#define PDM_UP3_EN 0x0004
|
|
||||||
#define PDM_DN1_EN 0x0008
|
|
||||||
#define PDM_DN2_EN 0x0010
|
|
||||||
#define PDM_DN3_EN 0x0020
|
|
||||||
#define PDM_DN4_EN 0x0040
|
|
||||||
#define PDM_DN5_EN 0x0080
|
|
||||||
#define PDMOUTFORMAT 0x0100
|
|
||||||
#define CMD_INT 0x0200
|
|
||||||
#define STATUS_INT 0x0400
|
|
||||||
#define SW_UP_RST 0x0800
|
|
||||||
#define SW_DN_RST 0x1000
|
|
||||||
#define PDM_UP_MASK 0x007
|
|
||||||
#define PDM_DN_MASK 0x0F8
|
|
||||||
#define PDM_CMD_MASK 0x200
|
|
||||||
#define PDM_STATUS_MASK 0x400
|
|
||||||
|
|
||||||
|
|
||||||
#define PDMOUTFORMAT_LJUST (0 << 8)
|
|
||||||
#define PDMOUTFORMAT_RJUST (1 << 8)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MCPDM_FIFO_CTRL bit fields
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define UP_THRES_MAX 0xF
|
|
||||||
#define DN_THRES_MAX 0xF
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MCPDM_DN_OFFSET bit fields
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define DN_OFST_RX1_EN 0x0001
|
|
||||||
#define DN_OFST_RX2_EN 0x0100
|
|
||||||
|
|
||||||
#define DN_OFST_RX1 1
|
|
||||||
#define DN_OFST_RX2 9
|
|
||||||
#define DN_OFST_MAX 0x1F
|
|
||||||
|
|
||||||
#define MCPDM_UPLINK 1
|
|
||||||
#define MCPDM_DOWNLINK 2
|
|
||||||
|
|
||||||
struct omap_mcpdm_link {
|
|
||||||
int irq_mask;
|
|
||||||
int threshold;
|
|
||||||
int format;
|
|
||||||
int channels;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct omap_mcpdm_platform_data {
|
|
||||||
unsigned long phys_base;
|
|
||||||
u16 irq;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct omap_mcpdm {
|
|
||||||
struct device *dev;
|
|
||||||
unsigned long phys_base;
|
|
||||||
void __iomem *io_base;
|
|
||||||
u8 free;
|
|
||||||
int irq;
|
|
||||||
|
|
||||||
spinlock_t lock;
|
|
||||||
struct omap_mcpdm_platform_data *pdata;
|
|
||||||
struct clk *clk;
|
|
||||||
struct omap_mcpdm_link *downlink;
|
|
||||||
struct omap_mcpdm_link *uplink;
|
|
||||||
struct completion irq_completion;
|
|
||||||
|
|
||||||
int dn_channels;
|
|
||||||
int up_channels;
|
|
||||||
};
|
|
||||||
|
|
||||||
extern void omap_mcpdm_start(int stream);
|
|
||||||
extern void omap_mcpdm_stop(int stream);
|
|
||||||
extern int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink);
|
|
||||||
extern int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink);
|
|
||||||
extern int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink);
|
|
||||||
extern int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink);
|
|
||||||
extern int omap_mcpdm_request(void);
|
|
||||||
extern void omap_mcpdm_free(void);
|
|
||||||
extern int omap_mcpdm_set_offset(int offset1, int offset2);
|
|
||||||
int __devinit omap_mcpdm_probe(struct platform_device *pdev);
|
|
||||||
int __devexit omap_mcpdm_remove(struct platform_device *pdev);
|
|
|
@ -1,11 +1,12 @@
|
||||||
/*
|
/*
|
||||||
* omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
|
* omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
|
||||||
*
|
*
|
||||||
* Copyright (C) 2009 Texas Instruments
|
* Copyright (C) 2009 - 2011 Texas Instruments
|
||||||
*
|
*
|
||||||
* Author: Misael Lopez Cruz <x0052729@ti.com>
|
* Author: Misael Lopez Cruz <misael.lopez@ti.com>
|
||||||
* Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
|
* Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
|
||||||
* Margarita Olaya <magi.olaya@ti.com>
|
* Margarita Olaya <magi.olaya@ti.com>
|
||||||
|
* Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or
|
* This program is free software; you can redistribute it and/or
|
||||||
* modify it under the terms of the GNU General Public License
|
* modify it under the terms of the GNU General Public License
|
||||||
|
@ -25,41 +26,39 @@
|
||||||
|
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/device.h>
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/interrupt.h>
|
||||||
|
#include <linux/err.h>
|
||||||
|
#include <linux/io.h>
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
|
#include <linux/pm_runtime.h>
|
||||||
|
|
||||||
#include <sound/core.h>
|
#include <sound/core.h>
|
||||||
#include <sound/pcm.h>
|
#include <sound/pcm.h>
|
||||||
#include <sound/pcm_params.h>
|
#include <sound/pcm_params.h>
|
||||||
#include <sound/initval.h>
|
|
||||||
#include <sound/soc.h>
|
#include <sound/soc.h>
|
||||||
|
|
||||||
#include <plat/dma.h>
|
#include <plat/dma.h>
|
||||||
#include <plat/mcbsp.h>
|
#include <plat/omap_hwmod.h>
|
||||||
#include "mcpdm.h"
|
#include "omap-mcpdm.h"
|
||||||
#include "omap-pcm.h"
|
#include "omap-pcm.h"
|
||||||
|
|
||||||
struct omap_mcpdm_data {
|
struct omap_mcpdm {
|
||||||
struct omap_mcpdm_link *links;
|
struct device *dev;
|
||||||
int active;
|
unsigned long phys_base;
|
||||||
};
|
void __iomem *io_base;
|
||||||
|
int irq;
|
||||||
|
|
||||||
static struct omap_mcpdm_link omap_mcpdm_links[] = {
|
struct mutex mutex;
|
||||||
/* downlink */
|
|
||||||
{
|
|
||||||
.irq_mask = MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL,
|
|
||||||
.threshold = 1,
|
|
||||||
.format = PDMOUTFORMAT_LJUST,
|
|
||||||
},
|
|
||||||
/* uplink */
|
|
||||||
{
|
|
||||||
.irq_mask = MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL,
|
|
||||||
.threshold = 1,
|
|
||||||
.format = PDMOUTFORMAT_LJUST,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct omap_mcpdm_data mcpdm_data = {
|
/* channel data */
|
||||||
.links = omap_mcpdm_links,
|
u32 dn_channels;
|
||||||
.active = 0,
|
u32 up_channels;
|
||||||
|
|
||||||
|
/* McPDM FIFO thresholds */
|
||||||
|
u32 dn_threshold;
|
||||||
|
u32 up_threshold;
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -71,76 +70,232 @@ static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
|
||||||
.dma_req = OMAP44XX_DMA_MCPDM_DL,
|
.dma_req = OMAP44XX_DMA_MCPDM_DL,
|
||||||
.data_type = OMAP_DMA_DATA_TYPE_S32,
|
.data_type = OMAP_DMA_DATA_TYPE_S32,
|
||||||
.sync_mode = OMAP_DMA_SYNC_PACKET,
|
.sync_mode = OMAP_DMA_SYNC_PACKET,
|
||||||
.packet_size = 16,
|
.port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_DN_DATA,
|
||||||
.port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_DN_DATA,
|
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.name = "Audio capture",
|
.name = "Audio capture",
|
||||||
.dma_req = OMAP44XX_DMA_MCPDM_UP,
|
.dma_req = OMAP44XX_DMA_MCPDM_UP,
|
||||||
.data_type = OMAP_DMA_DATA_TYPE_S32,
|
.data_type = OMAP_DMA_DATA_TYPE_S32,
|
||||||
.sync_mode = OMAP_DMA_SYNC_PACKET,
|
.sync_mode = OMAP_DMA_SYNC_PACKET,
|
||||||
.packet_size = 16,
|
.port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_UP_DATA,
|
||||||
.port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_UP_DATA,
|
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
|
||||||
|
{
|
||||||
|
__raw_writel(val, mcpdm->io_base + reg);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
|
||||||
|
{
|
||||||
|
return __raw_readl(mcpdm->io_base + reg);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
dev_dbg(mcpdm->dev, "***********************\n");
|
||||||
|
dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
|
||||||
|
dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
|
||||||
|
dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
|
||||||
|
dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
|
||||||
|
dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
|
||||||
|
dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
|
||||||
|
dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
|
||||||
|
dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
|
||||||
|
dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
|
||||||
|
dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
|
||||||
|
dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
|
||||||
|
dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
|
||||||
|
dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
|
||||||
|
omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
|
||||||
|
dev_dbg(mcpdm->dev, "***********************\n");
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enables the transfer through the PDM interface to/from the Phoenix
|
||||||
|
* codec by enabling the corresponding UP or DN channels.
|
||||||
|
*/
|
||||||
|
static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
|
||||||
|
|
||||||
|
ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
|
||||||
|
ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
|
||||||
|
ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Disables the transfer through the PDM interface to/from the Phoenix
|
||||||
|
* codec by disabling the corresponding UP or DN channels.
|
||||||
|
*/
|
||||||
|
static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
|
||||||
|
|
||||||
|
ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
|
||||||
|
ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
|
||||||
|
ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Is the physical McPDM interface active.
|
||||||
|
*/
|
||||||
|
static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
|
||||||
|
(MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Configures McPDM uplink, and downlink for audio.
|
||||||
|
* This function should be called before omap_mcpdm_start.
|
||||||
|
*/
|
||||||
|
static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
|
||||||
|
MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
|
||||||
|
MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
|
||||||
|
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
|
||||||
|
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
|
||||||
|
MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Cleans McPDM uplink, and downlink configuration.
|
||||||
|
* This function should be called when the stream is closed.
|
||||||
|
*/
|
||||||
|
static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
|
||||||
|
{
|
||||||
|
/* Disable irq request generation for downlink */
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
|
||||||
|
MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
|
||||||
|
|
||||||
|
/* Disable DMA request generation for downlink */
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
|
||||||
|
|
||||||
|
/* Disable irq request generation for uplink */
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
|
||||||
|
MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
|
||||||
|
|
||||||
|
/* Disable DMA request generation for uplink */
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
|
||||||
|
{
|
||||||
|
struct omap_mcpdm *mcpdm = dev_id;
|
||||||
|
int irq_status;
|
||||||
|
|
||||||
|
irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
|
||||||
|
|
||||||
|
/* Acknowledge irq event */
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_DN_IRQ_FULL)
|
||||||
|
dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_DN_IRQ_EMPTY)
|
||||||
|
dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_DN_IRQ)
|
||||||
|
dev_dbg(mcpdm->dev, "DN (playback) write request\n");
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_UP_IRQ_FULL)
|
||||||
|
dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_UP_IRQ_EMPTY)
|
||||||
|
dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
|
||||||
|
|
||||||
|
if (irq_status & MCPDM_UP_IRQ)
|
||||||
|
dev_dbg(mcpdm->dev, "UP (capture) write request\n");
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
|
||||||
static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
|
static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
|
||||||
struct snd_soc_dai *dai)
|
struct snd_soc_dai *dai)
|
||||||
{
|
{
|
||||||
int err = 0;
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
|
|
||||||
if (!dai->active)
|
mutex_lock(&mcpdm->mutex);
|
||||||
err = omap_mcpdm_request();
|
|
||||||
|
|
||||||
return err;
|
if (!dai->active) {
|
||||||
|
pm_runtime_get_sync(mcpdm->dev);
|
||||||
|
|
||||||
|
/* Enable watch dog for ES above ES 1.0 to avoid saturation */
|
||||||
|
if (omap_rev() != OMAP4430_REV_ES1_0) {
|
||||||
|
u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
|
||||||
|
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
|
||||||
|
ctrl | MCPDM_WD_EN);
|
||||||
|
}
|
||||||
|
omap_mcpdm_open_streams(mcpdm);
|
||||||
|
}
|
||||||
|
|
||||||
|
mutex_unlock(&mcpdm->mutex);
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
|
static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
|
||||||
struct snd_soc_dai *dai)
|
struct snd_soc_dai *dai)
|
||||||
{
|
{
|
||||||
if (!dai->active)
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
omap_mcpdm_free();
|
|
||||||
|
mutex_lock(&mcpdm->mutex);
|
||||||
|
|
||||||
|
if (!dai->active) {
|
||||||
|
if (omap_mcpdm_active(mcpdm)) {
|
||||||
|
omap_mcpdm_stop(mcpdm);
|
||||||
|
omap_mcpdm_close_streams(mcpdm);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int omap_mcpdm_dai_trigger(struct snd_pcm_substream *substream, int cmd,
|
if (!omap_mcpdm_active(mcpdm))
|
||||||
struct snd_soc_dai *dai)
|
pm_runtime_put_sync(mcpdm->dev);
|
||||||
{
|
|
||||||
struct omap_mcpdm_data *mcpdm_priv = snd_soc_dai_get_drvdata(dai);
|
|
||||||
int stream = substream->stream;
|
|
||||||
int err = 0;
|
|
||||||
|
|
||||||
switch (cmd) {
|
|
||||||
case SNDRV_PCM_TRIGGER_START:
|
|
||||||
case SNDRV_PCM_TRIGGER_RESUME:
|
|
||||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
|
||||||
if (!mcpdm_priv->active++)
|
|
||||||
omap_mcpdm_start(stream);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case SNDRV_PCM_TRIGGER_STOP:
|
|
||||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
|
||||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
|
||||||
if (!--mcpdm_priv->active)
|
|
||||||
omap_mcpdm_stop(stream);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
err = -EINVAL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
mutex_unlock(&mcpdm->mutex);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
|
static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
|
||||||
struct snd_pcm_hw_params *params,
|
struct snd_pcm_hw_params *params,
|
||||||
struct snd_soc_dai *dai)
|
struct snd_soc_dai *dai)
|
||||||
{
|
{
|
||||||
struct omap_mcpdm_data *mcpdm_priv = snd_soc_dai_get_drvdata(dai);
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links;
|
|
||||||
int stream = substream->stream;
|
int stream = substream->stream;
|
||||||
int channels, err, link_mask = 0;
|
struct omap_pcm_dma_data *dma_data;
|
||||||
|
int channels;
|
||||||
snd_soc_dai_set_dma_data(dai, substream,
|
int link_mask = 0;
|
||||||
&omap_mcpdm_dai_dma_params[stream]);
|
|
||||||
|
|
||||||
channels = params_channels(params);
|
channels = params_channels(params);
|
||||||
switch (channels) {
|
switch (channels) {
|
||||||
|
@ -164,52 +319,88 @@ static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
dma_data = &omap_mcpdm_dai_dma_params[stream];
|
||||||
|
|
||||||
|
/* Configure McPDM channels, and DMA packet size */
|
||||||
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||||
mcpdm_links[stream].channels = link_mask << 3;
|
mcpdm->dn_channels = link_mask << 3;
|
||||||
err = omap_mcpdm_playback_open(&mcpdm_links[stream]);
|
dma_data->packet_size =
|
||||||
|
(MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
|
||||||
} else {
|
} else {
|
||||||
mcpdm_links[stream].channels = link_mask << 0;
|
mcpdm->up_channels = link_mask << 0;
|
||||||
err = omap_mcpdm_capture_open(&mcpdm_links[stream]);
|
dma_data->packet_size = mcpdm->up_threshold * channels;
|
||||||
}
|
}
|
||||||
|
|
||||||
return err;
|
snd_soc_dai_set_dma_data(dai, substream, dma_data);
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int omap_mcpdm_dai_hw_free(struct snd_pcm_substream *substream,
|
static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
|
||||||
struct snd_soc_dai *dai)
|
struct snd_soc_dai *dai)
|
||||||
{
|
{
|
||||||
struct omap_mcpdm_data *mcpdm_priv = snd_soc_dai_get_drvdata(dai);
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links;
|
|
||||||
int stream = substream->stream;
|
|
||||||
int err;
|
|
||||||
|
|
||||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
if (!omap_mcpdm_active(mcpdm)) {
|
||||||
err = omap_mcpdm_playback_close(&mcpdm_links[stream]);
|
omap_mcpdm_start(mcpdm);
|
||||||
else
|
omap_mcpdm_reg_dump(mcpdm);
|
||||||
err = omap_mcpdm_capture_close(&mcpdm_links[stream]);
|
}
|
||||||
|
|
||||||
return err;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
|
static struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
|
||||||
.startup = omap_mcpdm_dai_startup,
|
.startup = omap_mcpdm_dai_startup,
|
||||||
.shutdown = omap_mcpdm_dai_shutdown,
|
.shutdown = omap_mcpdm_dai_shutdown,
|
||||||
.trigger = omap_mcpdm_dai_trigger,
|
|
||||||
.hw_params = omap_mcpdm_dai_hw_params,
|
.hw_params = omap_mcpdm_dai_hw_params,
|
||||||
.hw_free = omap_mcpdm_dai_hw_free,
|
.prepare = omap_mcpdm_prepare,
|
||||||
};
|
};
|
||||||
|
|
||||||
#define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
|
static int omap_mcpdm_probe(struct snd_soc_dai *dai)
|
||||||
#define OMAP_MCPDM_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
|
|
||||||
|
|
||||||
static int omap_mcpdm_dai_probe(struct snd_soc_dai *dai)
|
|
||||||
{
|
{
|
||||||
snd_soc_dai_set_drvdata(dai, &mcpdm_data);
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
pm_runtime_enable(mcpdm->dev);
|
||||||
|
|
||||||
|
/* Disable lines while request is ongoing */
|
||||||
|
pm_runtime_get_sync(mcpdm->dev);
|
||||||
|
omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
|
||||||
|
|
||||||
|
ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
|
||||||
|
0, "McPDM", (void *)mcpdm);
|
||||||
|
|
||||||
|
pm_runtime_put_sync(mcpdm->dev);
|
||||||
|
|
||||||
|
if (ret) {
|
||||||
|
dev_err(mcpdm->dev, "Request for IRQ failed\n");
|
||||||
|
pm_runtime_disable(mcpdm->dev);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure McPDM threshold values */
|
||||||
|
mcpdm->dn_threshold = 2;
|
||||||
|
mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int omap_mcpdm_remove(struct snd_soc_dai *dai)
|
||||||
|
{
|
||||||
|
struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
|
||||||
|
|
||||||
|
free_irq(mcpdm->irq, (void *)mcpdm);
|
||||||
|
pm_runtime_disable(mcpdm->dev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
|
||||||
|
#define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
|
||||||
|
|
||||||
static struct snd_soc_dai_driver omap_mcpdm_dai = {
|
static struct snd_soc_dai_driver omap_mcpdm_dai = {
|
||||||
.probe = omap_mcpdm_dai_probe,
|
.probe = omap_mcpdm_probe,
|
||||||
|
.remove = omap_mcpdm_remove,
|
||||||
|
.probe_order = SND_SOC_COMP_ORDER_LATE,
|
||||||
|
.remove_order = SND_SOC_COMP_ORDER_EARLY,
|
||||||
.playback = {
|
.playback = {
|
||||||
.channels_min = 1,
|
.channels_min = 1,
|
||||||
.channels_max = 4,
|
.channels_max = 4,
|
||||||
|
@ -227,27 +418,74 @@ static struct snd_soc_dai_driver omap_mcpdm_dai = {
|
||||||
|
|
||||||
static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
|
static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
int ret;
|
struct omap_mcpdm *mcpdm;
|
||||||
|
struct resource *res;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
|
||||||
|
if (!mcpdm)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
platform_set_drvdata(pdev, mcpdm);
|
||||||
|
|
||||||
|
mutex_init(&mcpdm->mutex);
|
||||||
|
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (res == NULL) {
|
||||||
|
dev_err(&pdev->dev, "no resource\n");
|
||||||
|
goto err_res;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!request_mem_region(res->start, resource_size(res), "McPDM")) {
|
||||||
|
ret = -EBUSY;
|
||||||
|
goto err_res;
|
||||||
|
}
|
||||||
|
|
||||||
|
mcpdm->io_base = ioremap(res->start, resource_size(res));
|
||||||
|
if (!mcpdm->io_base) {
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto err_iomap;
|
||||||
|
}
|
||||||
|
|
||||||
|
mcpdm->irq = platform_get_irq(pdev, 0);
|
||||||
|
if (mcpdm->irq < 0) {
|
||||||
|
ret = mcpdm->irq;
|
||||||
|
goto err_irq;
|
||||||
|
}
|
||||||
|
|
||||||
|
mcpdm->dev = &pdev->dev;
|
||||||
|
|
||||||
ret = omap_mcpdm_probe(pdev);
|
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
ret = snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
|
ret = snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
|
||||||
if (ret < 0)
|
if (!ret)
|
||||||
omap_mcpdm_remove(pdev);
|
return 0;
|
||||||
|
|
||||||
|
err_irq:
|
||||||
|
iounmap(mcpdm->io_base);
|
||||||
|
err_iomap:
|
||||||
|
release_mem_region(res->start, resource_size(res));
|
||||||
|
err_res:
|
||||||
|
kfree(mcpdm);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
|
static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
|
struct omap_mcpdm *mcpdm = platform_get_drvdata(pdev);
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
snd_soc_unregister_dai(&pdev->dev);
|
snd_soc_unregister_dai(&pdev->dev);
|
||||||
omap_mcpdm_remove(pdev);
|
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
iounmap(mcpdm->io_base);
|
||||||
|
release_mem_region(res->start, resource_size(res));
|
||||||
|
|
||||||
|
kfree(mcpdm);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct platform_driver asoc_mcpdm_driver = {
|
static struct platform_driver asoc_mcpdm_driver = {
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "omap-mcpdm-dai",
|
.name = "omap-mcpdm",
|
||||||
.owner = THIS_MODULE,
|
.owner = THIS_MODULE,
|
||||||
},
|
},
|
||||||
|
|
||||||
|
@ -267,6 +505,6 @@ static void __exit snd_omap_mcpdm_exit(void)
|
||||||
}
|
}
|
||||||
module_exit(snd_omap_mcpdm_exit);
|
module_exit(snd_omap_mcpdm_exit);
|
||||||
|
|
||||||
MODULE_AUTHOR("Misael Lopez Cruz <x0052729@ti.com>");
|
MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
|
||||||
MODULE_DESCRIPTION("OMAP PDM SoC Interface");
|
MODULE_DESCRIPTION("OMAP PDM SoC Interface");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
|
@ -0,0 +1,95 @@
|
||||||
|
/*
|
||||||
|
* omap-mcpdm.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2009 - 2011 Texas Instruments
|
||||||
|
*
|
||||||
|
* Contact: Misael Lopez Cruz <misael.lopez@ti.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* version 2 as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
* General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||||
|
* 02110-1301 USA
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __OMAP_MCPDM_H__
|
||||||
|
#define __OMAP_MCPDM_H__
|
||||||
|
|
||||||
|
#define MCPDM_REG_REVISION 0x00
|
||||||
|
#define MCPDM_REG_SYSCONFIG 0x10
|
||||||
|
#define MCPDM_REG_IRQSTATUS_RAW 0x24
|
||||||
|
#define MCPDM_REG_IRQSTATUS 0x28
|
||||||
|
#define MCPDM_REG_IRQENABLE_SET 0x2C
|
||||||
|
#define MCPDM_REG_IRQENABLE_CLR 0x30
|
||||||
|
#define MCPDM_REG_IRQWAKE_EN 0x34
|
||||||
|
#define MCPDM_REG_DMAENABLE_SET 0x38
|
||||||
|
#define MCPDM_REG_DMAENABLE_CLR 0x3C
|
||||||
|
#define MCPDM_REG_DMAWAKEEN 0x40
|
||||||
|
#define MCPDM_REG_CTRL 0x44
|
||||||
|
#define MCPDM_REG_DN_DATA 0x48
|
||||||
|
#define MCPDM_REG_UP_DATA 0x4C
|
||||||
|
#define MCPDM_REG_FIFO_CTRL_DN 0x50
|
||||||
|
#define MCPDM_REG_FIFO_CTRL_UP 0x54
|
||||||
|
#define MCPDM_REG_DN_OFFSET 0x58
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MCPDM_IRQ bit fields
|
||||||
|
* IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define MCPDM_DN_IRQ (1 << 0)
|
||||||
|
#define MCPDM_DN_IRQ_EMPTY (1 << 1)
|
||||||
|
#define MCPDM_DN_IRQ_ALMST_EMPTY (1 << 2)
|
||||||
|
#define MCPDM_DN_IRQ_FULL (1 << 3)
|
||||||
|
|
||||||
|
#define MCPDM_UP_IRQ (1 << 8)
|
||||||
|
#define MCPDM_UP_IRQ_EMPTY (1 << 9)
|
||||||
|
#define MCPDM_UP_IRQ_ALMST_FULL (1 << 10)
|
||||||
|
#define MCPDM_UP_IRQ_FULL (1 << 11)
|
||||||
|
|
||||||
|
#define MCPDM_DOWNLINK_IRQ_MASK 0x00F
|
||||||
|
#define MCPDM_UPLINK_IRQ_MASK 0xF00
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MCPDM_DMAENABLE bit fields
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define MCPDM_DMA_DN_ENABLE (1 << 0)
|
||||||
|
#define MCPDM_DMA_UP_ENABLE (1 << 1)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MCPDM_CTRL bit fields
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define MCPDM_PDM_UPLINK_EN(x) (1 << (x - 1)) /* ch1 is at bit 0 */
|
||||||
|
#define MCPDM_PDM_DOWNLINK_EN(x) (1 << (x + 2)) /* ch1 is at bit 3 */
|
||||||
|
#define MCPDM_PDMOUTFORMAT (1 << 8)
|
||||||
|
#define MCPDM_CMD_INT (1 << 9)
|
||||||
|
#define MCPDM_STATUS_INT (1 << 10)
|
||||||
|
#define MCPDM_SW_UP_RST (1 << 11)
|
||||||
|
#define MCPDM_SW_DN_RST (1 << 12)
|
||||||
|
#define MCPDM_WD_EN (1 << 14)
|
||||||
|
#define MCPDM_PDM_UP_MASK 0x7
|
||||||
|
#define MCPDM_PDM_DN_MASK (0x1f << 3)
|
||||||
|
|
||||||
|
|
||||||
|
#define MCPDM_PDMOUTFORMAT_LJUST (0 << 8)
|
||||||
|
#define MCPDM_PDMOUTFORMAT_RJUST (1 << 8)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MCPDM_FIFO_CTRL bit fields
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define MCPDM_UP_THRES_MAX 0xF
|
||||||
|
#define MCPDM_DN_THRES_MAX 0xF
|
||||||
|
|
||||||
|
#endif /* End of __OMAP_MCPDM_H__ */
|
|
@ -32,7 +32,7 @@
|
||||||
#include <plat/hardware.h>
|
#include <plat/hardware.h>
|
||||||
#include <plat/mux.h>
|
#include <plat/mux.h>
|
||||||
|
|
||||||
#include "mcpdm.h"
|
#include "omap-mcpdm.h"
|
||||||
#include "omap-pcm.h"
|
#include "omap-pcm.h"
|
||||||
#include "../codecs/twl6040.h"
|
#include "../codecs/twl6040.h"
|
||||||
|
|
||||||
|
@ -165,7 +165,7 @@ static int sdp4430_twl6040_init(struct snd_soc_pcm_runtime *rtd)
|
||||||
static struct snd_soc_dai_link sdp4430_dai = {
|
static struct snd_soc_dai_link sdp4430_dai = {
|
||||||
.name = "TWL6040",
|
.name = "TWL6040",
|
||||||
.stream_name = "TWL6040",
|
.stream_name = "TWL6040",
|
||||||
.cpu_dai_name ="omap-mcpdm-dai",
|
.cpu_dai_name = "omap-mcpdm",
|
||||||
.codec_dai_name = "twl6040-hifi",
|
.codec_dai_name = "twl6040-hifi",
|
||||||
.platform_name = "omap-pcm-audio",
|
.platform_name = "omap-pcm-audio",
|
||||||
.codec_name = "twl6040-codec",
|
.codec_name = "twl6040-codec",
|
||||||
|
|
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