iommu/amd: Introduce function to check and enable SNP
To support SNP, IOMMU needs to be enabled, and prohibits IOMMU configurations where DTE[Mode]=0, which means it cannot be supported with IOMMU passthrough domain (a.k.a IOMMU_DOMAIN_IDENTITY), and when AMD IOMMU driver is configured to not use the IOMMU host (v1) page table. Otherwise, RMP table initialization could cause the system to crash. The request to enable SNP support in IOMMU must be done before PCI initialization state of the IOMMU driver because enabling SNP affects how IOMMU driver sets up IOMMU data structures (i.e. DTE). Unlike other IOMMU features, SNP feature does not have an enable bit in the IOMMU control register. Instead, the IOMMU driver introduces an amd_iommu_snp_en variable to track enabling state of SNP. Introduce amd_iommu_snp_enable() for other drivers to request enabling the SNP support in IOMMU, which checks all prerequisites and determines if the feature can be safely enabled. Please see the IOMMU spec section 2.12 for further details. Reviewed-by: Robin Murphy <robin.murphy@arm.com> Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Link: https://lore.kernel.org/r/20220713225651.20758-7-suravee.suthikulpanit@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -140,4 +140,6 @@ extern struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
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extern u64 amd_iommu_efr;
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extern u64 amd_iommu_efr2;
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extern bool amd_iommu_snp_en;
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#endif
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@ -168,6 +168,10 @@ static int amd_iommu_target_ivhd_type;
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u64 amd_iommu_efr;
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u64 amd_iommu_efr2;
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/* SNP is enabled on the system? */
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bool amd_iommu_snp_en;
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EXPORT_SYMBOL(amd_iommu_snp_en);
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LIST_HEAD(amd_iommu_pci_seg_list); /* list of all PCI segments */
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LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
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system */
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@ -3556,3 +3560,41 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64
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return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true);
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}
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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int amd_iommu_snp_enable(void)
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{
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/*
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* The SNP support requires that IOMMU must be enabled, and is
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* not configured in the passthrough mode.
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*/
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if (no_iommu || iommu_default_passthrough()) {
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pr_err("SNP: IOMMU is disabled or configured in passthrough mode, SNP cannot be supported");
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return -EINVAL;
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}
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/*
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* Prevent enabling SNP after IOMMU_ENABLED state because this process
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* affect how IOMMU driver sets up data structures and configures
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* IOMMU hardware.
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*/
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if (init_state > IOMMU_ENABLED) {
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pr_err("SNP: Too late to enable SNP for IOMMU.\n");
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return -EINVAL;
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}
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amd_iommu_snp_en = check_feature_on_all_iommus(FEATURE_SNP);
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if (!amd_iommu_snp_en)
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return -EINVAL;
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pr_info("SNP enabled\n");
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/* Enforce IOMMU v1 pagetable when SNP is enabled. */
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if (amd_iommu_pgtable != AMD_IOMMU_V1) {
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pr_warn("Force to using AMD IOMMU v1 page table due to SNP\n");
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amd_iommu_pgtable = AMD_IOMMU_V1;
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}
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return 0;
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}
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#endif
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@ -206,4 +206,8 @@ int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn,
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u64 *value);
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struct amd_iommu *get_amd_iommu(unsigned int idx);
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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int amd_iommu_snp_enable(void);
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#endif
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#endif /* _ASM_X86_AMD_IOMMU_H */
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