ARM: SoC fixes
One more week's worth of fixes. Worth pointing out here are: - A patch fixing detaching of iommu registrations when a device is removed -- earlier the ops pointer wasn't managed properly - Another set of Renesas boards get the same GIC setup fixup as others have in previous -rcs - Serial port aliases fixups for sunxi. We did the same to tegra but we caught that in time before the merge window due to more machines being affected. Here it took longer for anyone to notice. - A couple more DT tweaks on sunxi - A follow-up patch for the mvebu coherency disabling in last -rc batch -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUzl/yAAoJEIwa5zzehBx3/v0P/iU4sCz/HYBwL46lSZZLnFyX RDFiq+I6nQFM3CG6oRn0gEi+/GbdyQ/Q6kMbver216pSfymZ+agRFaA6oj1o4HRD FQ2Dtz2ytvdkO8uSUzIV+nLJ//3MMwxmXTnB7SrDuzy6VeJ6GHlxxp39jrPCWtgi z7eo1bAuEKRQpVqJLBbqaNTsc4+9990zcgz5ChvfCqOvY3rE/AElEF5CMk71TFHW NTZQGM/HWteehA3/vTODICrd5SqV3peNAe3n6OMnZEEniUCesnug6IamUMwqKWVb y8rgobVV6ow5F0Cr3Zxc9Ufj8R1yayRQoGOdzDfuQ+zPivi2NbseinQgMUVujXYh TE/Ea4j+V1bYSY6EA89pAjw2C6e7fIWPOUJbO9hj5Ywc+uzR+ns+GFR2AaBggpFu 4h0ig0ceOkzTgDWW0fNhH6BysvvczErT1CD0l6B+QgUZQadbSCFcGe8k2pNuJvYG f2lq6zUBIaNY5ZO6gu9inrd8UxjutKZM1p80fZc+tCFrm5YfHLFLwJPqfG7+8iEW R5OoQ1Jjb5SdO7u1yH2znQtlM9Z1u7bGQ7BkWPfZ0XbkHqiVgCpBUigzlRSgFO0+ 1rITIcwKgfdv8Sw4yngO6C3zFzn9Jz/cvGtW+gEjmSDV0BlhWCfWkTWys3ocdO79 JSToPOtd87iekn7nHLBY =nw2v -----END PGP SIGNATURE----- Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "One more week's worth of fixes. Worth pointing out here are: - A patch fixing detaching of iommu registrations when a device is removed -- earlier the ops pointer wasn't managed properly - Another set of Renesas boards get the same GIC setup fixup as others have in previous -rcs - Serial port aliases fixups for sunxi. We did the same to tegra but we caught that in time before the merge window due to more machines being affected. Here it took longer for anyone to notice. - A couple more DT tweaks on sunxi - A follow-up patch for the mvebu coherency disabling in last -rc batch" * tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm: dma-mapping: Set DMA IOMMU ops in arm_iommu_attach_device() ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled ARM: sunxi: dt: Fix aliases ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipeline ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i
This commit is contained in:
Коммит
fba7e99458
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@ -17,14 +17,6 @@
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aliases {
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ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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serial6 = &uart6;
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serial7 = &uart7;
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};
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chosen {
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@ -39,6 +31,14 @@
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<&ahb_gates 44>;
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status = "disabled";
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};
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framebuffer@1 {
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compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
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allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
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clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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<&ahb_gates 44>, <&ahb_gates 46>;
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status = "disabled";
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};
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};
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cpus {
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@ -438,8 +438,8 @@
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reg-names = "phy_ctrl", "pmu1", "pmu2";
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clocks = <&usb_clk 8>;
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clock-names = "usb_phy";
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resets = <&usb_clk 1>, <&usb_clk 2>;
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reset-names = "usb1_reset", "usb2_reset";
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resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
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reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
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status = "disabled";
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};
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@ -55,6 +55,12 @@
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model = "Olimex A10s-Olinuxino Micro";
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compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
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aliases {
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serial0 = &uart0;
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serial1 = &uart2;
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serial2 = &uart3;
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};
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soc@01c00000 {
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emac: ethernet@01c0b000 {
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pinctrl-names = "default";
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@ -18,10 +18,6 @@
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aliases {
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ethernet0 = &emac;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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};
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chosen {
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@ -390,8 +386,8 @@
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reg-names = "phy_ctrl", "pmu1";
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clocks = <&usb_clk 8>;
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clock-names = "usb_phy";
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resets = <&usb_clk 1>;
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reset-names = "usb1_reset";
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resets = <&usb_clk 0>, <&usb_clk 1>;
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reset-names = "usb0_reset", "usb1_reset";
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status = "disabled";
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};
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@ -53,6 +53,10 @@
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model = "HSG H702";
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compatible = "hsg,h702", "allwinner,sun5i-a13";
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aliases {
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serial0 = &uart1;
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};
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soc@01c00000 {
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default";
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@ -54,6 +54,10 @@
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model = "Olimex A13-Olinuxino Micro";
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compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
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aliases {
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serial0 = &uart1;
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};
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soc@01c00000 {
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default";
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@ -55,6 +55,10 @@
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model = "Olimex A13-Olinuxino";
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compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13";
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aliases {
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serial0 = &uart1;
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};
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soc@01c00000 {
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default";
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@ -16,11 +16,6 @@
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/ {
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interrupt-parent = <&intc>;
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aliases {
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serial0 = &uart1;
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serial1 = &uart3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -349,8 +344,8 @@
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reg-names = "phy_ctrl", "pmu1";
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clocks = <&usb_clk 8>;
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clock-names = "usb_phy";
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resets = <&usb_clk 1>;
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reset-names = "usb1_reset";
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resets = <&usb_clk 0>, <&usb_clk 1>;
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reset-names = "usb0_reset", "usb1_reset";
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status = "disabled";
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};
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|
|
|
@ -53,12 +53,6 @@
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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ethernet0 = &gmac;
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};
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|
|
|
@ -55,6 +55,12 @@
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model = "LeMaker Banana Pi";
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compatible = "lemaker,bananapi", "allwinner,sun7i-a20";
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aliases {
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serial0 = &uart0;
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serial1 = &uart3;
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serial2 = &uart7;
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};
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soc@01c00000 {
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spi0: spi@01c05000 {
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pinctrl-names = "default";
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@ -19,6 +19,14 @@
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model = "Merrii A20 Hummingbird";
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compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20";
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aliases {
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serial0 = &uart0;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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};
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soc@01c00000 {
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default";
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@ -20,6 +20,9 @@
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compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
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aliases {
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serial0 = &uart0;
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serial1 = &uart6;
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serial2 = &uart7;
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spi0 = &spi1;
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spi1 = &spi2;
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};
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@ -54,14 +54,6 @@
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aliases {
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ethernet0 = &gmac;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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serial6 = &uart6;
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serial7 = &uart7;
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};
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chosen {
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@ -55,6 +55,10 @@
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model = "Ippo Q8H Dual Core Tablet (v5)";
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compatible = "ippo,q8h-v5", "allwinner,sun8i-a23";
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aliases {
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serial0 = &r_uart;
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};
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chosen {
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bootargs = "earlyprintk console=ttyS0,115200";
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};
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|
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|
@ -52,15 +52,6 @@
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/ {
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &r_uart;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -54,6 +54,11 @@
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model = "Merrii A80 Optimus Board";
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compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
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aliases {
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serial0 = &uart0;
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serial1 = &uart4;
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};
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chosen {
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bootargs = "earlyprintk console=ttyS0,115200";
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};
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@ -52,16 +52,6 @@
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/ {
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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serial6 = &r_uart;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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|
|
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@ -189,6 +189,13 @@ static void __init armada_375_380_coherency_init(struct device_node *np)
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coherency_cpu_base = of_iomap(np, 0);
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arch_ioremap_caller = armada_pcie_wa_ioremap_caller;
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/*
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* We should switch the PL310 to I/O coherency mode only if
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* I/O coherency is actually enabled.
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*/
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if (!coherency_available())
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return;
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/*
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* Add the PL310 property "arm,io-coherent". This makes sure the
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* outer sync operation is not used, which allows to
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|
|
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@ -18,6 +18,8 @@
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/kernel.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mmc/host.h>
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|
@ -273,6 +275,22 @@ static void __init ape6evm_add_standard_devices(void)
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sizeof(ape6evm_leds_pdata));
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}
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||||
|
||||
static void __init ape6evm_legacy_init_time(void)
|
||||
{
|
||||
/* Do not invoke DT-based timers via clocksource_of_init() */
|
||||
}
|
||||
|
||||
static void __init ape6evm_legacy_init_irq(void)
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{
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void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
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void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
|
||||
|
||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
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||||
|
||||
/* Do not invoke DT-based interrupt code via irqchip_init() */
|
||||
}
|
||||
|
||||
|
||||
static const char *ape6evm_boards_compat_dt[] __initdata = {
|
||||
"renesas,ape6evm",
|
||||
NULL,
|
||||
|
@ -280,7 +298,9 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
|
|||
|
||||
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
|
||||
.init_early = shmobile_init_delay,
|
||||
.init_irq = ape6evm_legacy_init_irq,
|
||||
.init_machine = ape6evm_add_standard_devices,
|
||||
.init_late = shmobile_init_late,
|
||||
.dt_compat = ape6evm_boards_compat_dt,
|
||||
.init_time = ape6evm_legacy_init_time,
|
||||
MACHINE_END
|
||||
|
|
|
@ -21,6 +21,8 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/mfd/tmio.h>
|
||||
|
@ -811,6 +813,16 @@ static void __init lager_init(void)
|
|||
lager_ksz8041_fixup);
|
||||
}
|
||||
|
||||
static void __init lager_legacy_init_irq(void)
|
||||
{
|
||||
void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
|
||||
void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
|
||||
|
||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
||||
|
||||
/* Do not invoke DT-based interrupt code via irqchip_init() */
|
||||
}
|
||||
|
||||
static const char * const lager_boards_compat_dt[] __initconst = {
|
||||
"renesas,lager",
|
||||
NULL,
|
||||
|
@ -819,6 +831,7 @@ static const char * const lager_boards_compat_dt[] __initconst = {
|
|||
DT_MACHINE_START(LAGER_DT, "lager")
|
||||
.smp = smp_ops(r8a7790_smp_ops),
|
||||
.init_early = shmobile_init_delay,
|
||||
.init_irq = lager_legacy_init_irq,
|
||||
.init_time = rcar_gen2_timer_init,
|
||||
.init_machine = lager_init,
|
||||
.init_late = shmobile_init_late,
|
||||
|
|
|
@ -133,7 +133,9 @@ void __init rcar_gen2_timer_init(void)
|
|||
#ifdef CONFIG_COMMON_CLK
|
||||
rcar_gen2_clocks_init(mode);
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_MULTI
|
||||
clocksource_of_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
struct memory_reserve_config {
|
||||
|
|
|
@ -70,6 +70,18 @@ void __init shmobile_init_delay(void)
|
|||
if (!max_freq)
|
||||
return;
|
||||
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
/* Non-multiplatform r8a73a4 SoC cannot use arch timer due
|
||||
* to GIC being initialized from C and arch timer via DT */
|
||||
if (of_machine_is_compatible("renesas,r8a73a4"))
|
||||
has_arch_timer = false;
|
||||
|
||||
/* Non-multiplatform r8a7790 SoC cannot use arch timer due
|
||||
* to GIC being initialized from C and arch timer via DT */
|
||||
if (of_machine_is_compatible("renesas,r8a7790"))
|
||||
has_arch_timer = false;
|
||||
#endif
|
||||
|
||||
if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
|
||||
if (is_a7_a8_a9)
|
||||
shmobile_setup_delay_hz(max_freq, 1, 3);
|
||||
|
|
|
@ -1940,18 +1940,8 @@ void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
|
||||
|
||||
/**
|
||||
* arm_iommu_attach_device
|
||||
* @dev: valid struct device pointer
|
||||
* @mapping: io address space mapping structure (returned from
|
||||
* arm_iommu_create_mapping)
|
||||
*
|
||||
* Attaches specified io address space mapping to the provided device,
|
||||
* More than one client might be attached to the same io address space
|
||||
* mapping.
|
||||
*/
|
||||
int arm_iommu_attach_device(struct device *dev,
|
||||
struct dma_iommu_mapping *mapping)
|
||||
static int __arm_iommu_attach_device(struct device *dev,
|
||||
struct dma_iommu_mapping *mapping)
|
||||
{
|
||||
int err;
|
||||
|
||||
|
@ -1965,15 +1955,35 @@ int arm_iommu_attach_device(struct device *dev,
|
|||
pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
|
||||
|
||||
/**
|
||||
* arm_iommu_detach_device
|
||||
* arm_iommu_attach_device
|
||||
* @dev: valid struct device pointer
|
||||
* @mapping: io address space mapping structure (returned from
|
||||
* arm_iommu_create_mapping)
|
||||
*
|
||||
* Detaches the provided device from a previously attached map.
|
||||
* Attaches specified io address space mapping to the provided device.
|
||||
* This replaces the dma operations (dma_map_ops pointer) with the
|
||||
* IOMMU aware version.
|
||||
*
|
||||
* More than one client might be attached to the same io address space
|
||||
* mapping.
|
||||
*/
|
||||
void arm_iommu_detach_device(struct device *dev)
|
||||
int arm_iommu_attach_device(struct device *dev,
|
||||
struct dma_iommu_mapping *mapping)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = __arm_iommu_attach_device(dev, mapping);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
set_dma_ops(dev, &iommu_ops);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
|
||||
|
||||
static void __arm_iommu_detach_device(struct device *dev)
|
||||
{
|
||||
struct dma_iommu_mapping *mapping;
|
||||
|
||||
|
@ -1989,6 +1999,19 @@ void arm_iommu_detach_device(struct device *dev)
|
|||
|
||||
pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
|
||||
}
|
||||
|
||||
/**
|
||||
* arm_iommu_detach_device
|
||||
* @dev: valid struct device pointer
|
||||
*
|
||||
* Detaches the provided device from a previously attached map.
|
||||
* This voids the dma operations (dma_map_ops pointer)
|
||||
*/
|
||||
void arm_iommu_detach_device(struct device *dev)
|
||||
{
|
||||
__arm_iommu_detach_device(dev);
|
||||
set_dma_ops(dev, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
|
||||
|
||||
static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
|
||||
|
@ -2011,7 +2034,7 @@ static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|||
return false;
|
||||
}
|
||||
|
||||
if (arm_iommu_attach_device(dev, mapping)) {
|
||||
if (__arm_iommu_attach_device(dev, mapping)) {
|
||||
pr_warn("Failed to attached device %s to IOMMU_mapping\n",
|
||||
dev_name(dev));
|
||||
arm_iommu_release_mapping(mapping);
|
||||
|
@ -2025,7 +2048,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev)
|
|||
{
|
||||
struct dma_iommu_mapping *mapping = dev->archdata.mapping;
|
||||
|
||||
arm_iommu_detach_device(dev);
|
||||
__arm_iommu_detach_device(dev);
|
||||
arm_iommu_release_mapping(mapping);
|
||||
}
|
||||
|
||||
|
|
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