[POWERPC] vdso: Fixes for cache block sizes
The current VDSO implementation is hardcoded to 128 byte cache blocks, which are only used on IBM's 64-bit processors. Convert it to get the cache block sizes out of vdso_data instead, similar to how the ppc64 in-kernel cache flush does it. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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fbe481756d
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@ -284,6 +284,10 @@ int main(void)
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DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
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DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
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DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
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DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
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DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
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DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
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DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
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#ifdef CONFIG_PPC64
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DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
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DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
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@ -699,11 +699,22 @@ static int __init vdso_init(void)
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vdso_data->icache_size = ppc64_caches.isize;
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vdso_data->icache_line_size = ppc64_caches.iline_size;
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/* XXXOJN: Blocks should be added to ppc64_caches and used instead */
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vdso_data->dcache_block_size = ppc64_caches.dline_size;
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vdso_data->icache_block_size = ppc64_caches.iline_size;
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vdso_data->dcache_log_block_size = ppc64_caches.log_dline_size;
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vdso_data->icache_log_block_size = ppc64_caches.log_iline_size;
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/*
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* Calculate the size of the 64 bits vDSO
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*/
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vdso64_pages = (&vdso64_end - &vdso64_start) >> PAGE_SHIFT;
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DBG("vdso64_kbase: %p, 0x%x pages\n", vdso64_kbase, vdso64_pages);
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#else
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vdso_data->dcache_block_size = L1_CACHE_BYTES;
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vdso_data->dcache_log_block_size = L1_CACHE_SHIFT;
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vdso_data->icache_block_size = L1_CACHE_BYTES;
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vdso_data->icache_log_block_size = L1_CACHE_SHIFT;
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#endif /* CONFIG_PPC64 */
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@ -23,29 +23,46 @@
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*
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* Flushes the data cache & invalidate the instruction cache for the
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* provided range [start, end[
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*
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* Note: all CPUs supported by this kernel have a 128 bytes cache
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* line size so we don't have to peek that info from the datapage
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*/
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V_FUNCTION_BEGIN(__kernel_sync_dicache)
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.cfi_startproc
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li r5,127
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andc r6,r3,r5 /* round low to line bdy */
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mflr r12
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.cfi_register lr,r12
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mr r11,r3
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bl __get_datapage@local
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mtlr r12
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mr r10,r3
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lwz r7,CFG_DCACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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andc r6,r11,r5 /* round low to line bdy */
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5 /* ensure we get enough */
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srwi. r8,r8,7 /* compute line count */
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lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10)
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srw. r8,r8,r9 /* compute line count */
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crclr cr0*4+so
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beqlr /* nothing to do? */
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mtctr r8
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mr r3,r6
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1: dcbst 0,r3
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addi r3,r3,128
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1: dcbst 0,r6
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add r6,r6,r7
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bdnz 1b
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sync
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/* Now invalidate the instruction cache */
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lwz r7,CFG_ICACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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andc r6,r11,r5 /* round low to line bdy */
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5
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lwz r9,CFG_ICACHE_LOGBLOCKSZ(r10)
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srw. r8,r8,r9 /* compute line count */
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crclr cr0*4+so
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beqlr /* nothing to do? */
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mtctr r8
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1: icbi 0,r6
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addi r6,r6,128
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bdnz 1b
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2: icbi 0,r6
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add r6,r6,r7
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bdnz 2b
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isync
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li r3,0
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blr
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@ -23,29 +23,46 @@
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*
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* Flushes the data cache & invalidate the instruction cache for the
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* provided range [start, end[
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*
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* Note: all CPUs supported by this kernel have a 128 bytes cache
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* line size so we don't have to peek that info from the datapage
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*/
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V_FUNCTION_BEGIN(__kernel_sync_dicache)
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.cfi_startproc
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li r5,127
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andc r6,r3,r5 /* round low to line bdy */
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mflr r12
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.cfi_register lr,r12
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mr r11,r3
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bl V_LOCAL_FUNC(__get_datapage)
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mtlr r12
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mr r10,r3
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lwz r7,CFG_DCACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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andc r6,r11,r5 /* round low to line bdy */
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5 /* ensure we get enough */
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srwi. r8,r8,7 /* compute line count */
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lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10)
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srw. r8,r8,r9 /* compute line count */
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crclr cr0*4+so
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beqlr /* nothing to do? */
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mtctr r8
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mr r3,r6
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1: dcbst 0,r3
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addi r3,r3,128
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1: dcbst 0,r6
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add r6,r6,r7
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bdnz 1b
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sync
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/* Now invalidate the instruction cache */
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lwz r7,CFG_ICACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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andc r6,r11,r5 /* round low to line bdy */
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5
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lwz r9,CFG_ICACHE_LOGBLOCKSZ(r10)
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srw. r8,r8,r9 /* compute line count */
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crclr cr0*4+so
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beqlr /* nothing to do? */
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mtctr r8
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1: icbi 0,r6
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addi r6,r6,128
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bdnz 1b
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2: icbi 0,r6
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add r6,r6,r7
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bdnz 2b
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isync
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li r3,0
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blr
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@ -77,6 +77,10 @@ struct vdso_data {
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/* those additional ones don't have to be located anywhere
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* special as they were not part of the original systemcfg
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*/
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__u32 dcache_block_size; /* L1 d-cache block size */
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__u32 icache_block_size; /* L1 i-cache block size */
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__u32 dcache_log_block_size; /* L1 d-cache log block size */
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__u32 icache_log_block_size; /* L1 i-cache log block size */
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__s32 wtom_clock_sec; /* Wall to monotonic clock */
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__s32 wtom_clock_nsec;
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__u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
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@ -99,6 +103,10 @@ struct vdso_data {
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__s32 wtom_clock_sec; /* Wall to monotonic clock */
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__s32 wtom_clock_nsec;
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__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
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__u32 dcache_block_size; /* L1 d-cache block size */
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__u32 icache_block_size; /* L1 i-cache block size */
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__u32 dcache_log_block_size; /* L1 d-cache log block size */
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__u32 icache_log_block_size; /* L1 i-cache log block size */
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};
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#endif /* CONFIG_PPC64 */
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