ASoC: topology: Modify clock gating parameter parsing to switch
This improves the coding style of this piece of code. Signed-off-by: Kirill Marinushkin <k.marinushkin@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.de> Cc: Pan Xiuli <xiuli.pan@linux.intel.com> Cc: Liam Girdwood <liam.r.girdwood@linux.intel.com> Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -2007,11 +2007,19 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
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link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
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/* clock gating */
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if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED)
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switch (hw_config->clock_gated) {
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case SND_SOC_TPLG_DAI_CLK_GATE_GATED:
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link->dai_fmt |= SND_SOC_DAIFMT_GATED;
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else if (hw_config->clock_gated ==
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SND_SOC_TPLG_DAI_CLK_GATE_CONT)
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break;
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case SND_SOC_TPLG_DAI_CLK_GATE_CONT:
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link->dai_fmt |= SND_SOC_DAIFMT_CONT;
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break;
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default:
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/* ignore the value */
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break;
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}
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/* clock signal polarity */
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invert_bclk = hw_config->invert_bclk;
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