gpu: ipu-v3: image-convert: move tile burst alignment out of loop
Burst aligned input and output width can be calculated once per column, instead of repeatedly for each tile in the column. The same goes for input and output height per row. Also don't round up the same values repeatedly. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -1121,6 +1121,7 @@ static void calc_tile_resize_coefficients(struct ipu_image_convert_ctx *ctx)
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!(ctx->rot_mode & IPU_ROT_BIT_HFLIP);
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u32 resized_width;
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u32 resize_coeff_h;
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u32 in_width;
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tile_idx = col;
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in_tile = &ctx->in.tile[tile_idx];
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@ -1138,33 +1139,35 @@ static void calc_tile_resize_coefficients(struct ipu_image_convert_ctx *ctx)
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dev_dbg(priv->ipu->dev, "%s: column %u hscale: *8192/%u\n",
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__func__, col, resize_coeff_h);
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/*
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* With the horizontal scaling factor known, round up resized
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* width (output width or height) to burst size.
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*/
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resized_width = round_up(resized_width, 8);
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/*
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* Calculate input width from the last accessed input pixel
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* given resized width and scaling coefficients. Round up to
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* burst size.
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*/
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last_output = resized_width - 1;
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if (closest)
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last_output++;
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in_width = round_up(
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(DIV_ROUND_UP(last_output * resize_coeff_h, 8192) + 1)
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<< ctx->downsize_coeff_h, 8);
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for (row = 0; row < ctx->in.num_rows; row++) {
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tile_idx = row * ctx->in.num_cols + col;
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in_tile = &ctx->in.tile[tile_idx];
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out_tile = &ctx->out.tile[ctx->out_tile_map[tile_idx]];
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/*
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* With the horizontal scaling factor known, round up
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* resized width (output width or height) to burst size.
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*/
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if (ipu_rot_mode_is_irt(ctx->rot_mode))
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out_tile->height = round_up(resized_width, 8);
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out_tile->height = resized_width;
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else
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out_tile->width = round_up(resized_width, 8);
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out_tile->width = resized_width;
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/*
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* Calculate input width from the last accessed input
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* pixel given resized width and scaling coefficients.
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* Round up to burst size.
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*/
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last_output = round_up(resized_width, 8) - 1;
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if (closest)
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last_output++;
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in_tile->width = round_up(
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(DIV_ROUND_UP(last_output * resize_coeff_h,
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8192) + 1)
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<< ctx->downsize_coeff_h, 8);
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in_tile->width = in_width;
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}
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ctx->resize_coeffs_h[col] = resize_coeff_h;
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@ -1175,6 +1178,7 @@ static void calc_tile_resize_coefficients(struct ipu_image_convert_ctx *ctx)
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!(ctx->rot_mode & IPU_ROT_BIT_VFLIP);
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u32 resized_height;
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u32 resize_coeff_v;
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u32 in_height;
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tile_idx = row * ctx->in.num_cols;
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in_tile = &ctx->in.tile[tile_idx];
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@ -1192,33 +1196,35 @@ static void calc_tile_resize_coefficients(struct ipu_image_convert_ctx *ctx)
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dev_dbg(priv->ipu->dev, "%s: row %u vscale: *8192/%u\n",
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__func__, row, resize_coeff_v);
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/*
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* With the vertical scaling factor known, round up resized
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* height (output width or height) to IDMAC limitations.
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*/
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resized_height = round_up(resized_height, 2);
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/*
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* Calculate input width from the last accessed input pixel
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* given resized height and scaling coefficients. Align to
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* IDMAC restrictions.
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*/
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last_output = resized_height - 1;
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if (closest)
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last_output++;
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in_height = round_up(
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(DIV_ROUND_UP(last_output * resize_coeff_v, 8192) + 1)
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<< ctx->downsize_coeff_v, 2);
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for (col = 0; col < ctx->in.num_cols; col++) {
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tile_idx = row * ctx->in.num_cols + col;
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in_tile = &ctx->in.tile[tile_idx];
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out_tile = &ctx->out.tile[ctx->out_tile_map[tile_idx]];
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/*
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* With the vertical scaling factor known, round up
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* resized height (output width or height) to IDMAC
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* limitations.
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*/
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if (ipu_rot_mode_is_irt(ctx->rot_mode))
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out_tile->width = round_up(resized_height, 2);
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out_tile->width = resized_height;
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else
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out_tile->height = round_up(resized_height, 2);
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out_tile->height = resized_height;
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/*
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* Calculate input width from the last accessed input
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* pixel given resized height and scaling coefficients.
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* Align to IDMAC restrictions.
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*/
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last_output = round_up(resized_height, 2) - 1;
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if (closest)
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last_output++;
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in_tile->height = round_up(
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(DIV_ROUND_UP(last_output * resize_coeff_v,
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8192) + 1)
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<< ctx->downsize_coeff_v, 2);
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in_tile->height = in_height;
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}
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ctx->resize_coeffs_v[row] = resize_coeff_v;
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