m68k: mvme147: Convert to clocksource API
Add a platform clocksource by adapting the existing arch_gettimeoffset implementation. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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@ -66,7 +66,6 @@ struct pcc_regs {
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#define PCC_INT_ENAB 0x08
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#define PCC_TIMER_INT_CLR 0x80
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#define PCC_TIMER_PRELOAD 63936l
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#define PCC_LEVEL_ABORT 0x07
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#define PCC_LEVEL_SERIAL 0x04
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@ -17,6 +17,7 @@
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/clocksource.h>
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#include <linux/console.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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@ -92,6 +93,21 @@ void __init config_mvme147(void)
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vme_brdtype = VME_TYPE_MVME147;
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}
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static u64 mvme147_read_clk(struct clocksource *cs);
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static struct clocksource mvme147_clk = {
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.name = "pcc",
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.rating = 250,
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.read = mvme147_read_clk,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static u32 clk_total;
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#define PCC_TIMER_CLOCK_FREQ 160000
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#define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
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#define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES)
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/* Using pcc tick timer 1 */
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@ -103,6 +119,7 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
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local_irq_save(flags);
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m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
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m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
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clk_total += PCC_TIMER_CYCLES;
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timer_routine(0, NULL);
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local_irq_restore(flags);
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@ -112,32 +129,39 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
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void mvme147_sched_init (irq_handler_t timer_routine)
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{
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if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1",
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timer_routine))
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if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
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"timer 1", timer_routine))
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pr_err("Couldn't register timer interrupt\n");
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/* Init the clock with a value */
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/* our clock goes off every 6.25us */
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/* The clock counter increments until 0xFFFF then reloads */
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m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
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m147_pcc->t1_cntrl = 0x0; /* clear timer */
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m147_pcc->t1_cntrl = 0x3; /* start timer */
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m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */
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m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
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clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ);
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}
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/* This is always executed with interrupts disabled. */
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/* XXX There are race hazards in this code XXX */
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u32 mvme147_gettimeoffset(void)
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static u64 mvme147_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012;
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unsigned short n;
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u32 ticks;
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local_irq_save(flags);
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n = *cp;
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while (n != *cp)
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n = *cp;
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n -= PCC_TIMER_PRELOAD;
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return ((unsigned long)n * 25 / 4) * 1000;
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ticks = clk_total + n;
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local_irq_restore(flags);
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return ticks;
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}
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static int bcd2int (unsigned char b)
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