powerpc/64s/exception: unwind exception-64s.h macros
Many of these macros just specify 1-4 lines which are only called a few times each at most, and often just once. Remove this indirection. No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
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47169fba3a
Коммит
fc557537f2
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@ -230,17 +230,6 @@
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#endif
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.endm
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/*
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* As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
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* rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_VIRT will be using CTR.
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*/
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#define EXCEPTION_RELON_PROLOG(area, label, hsrr, kvm, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 area ; \
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT label, hsrr
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/* Exception register prefixes */
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#define EXC_HV 1
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#define EXC_STD 0
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@ -351,12 +340,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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std r10,\area\()+EX_R13(r13)
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.endm
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#define EXCEPTION_PROLOG(area, label, hsrr, kvm, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 area ; \
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 1
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/*
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* If hv is possible, interrupts come into to the hv version
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@ -420,12 +403,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#endif
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/* Do not enable RI */
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#define EXCEPTION_PROLOG_NORI(area, label, hsrr, kvm, vec) \
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EXCEPTION_PROLOG_0 area ; \
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EXCEPTION_PROLOG_1 hsrr, area, kvm, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 0
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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.macro KVMTEST hsrr, n
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lbz r10,HSTATE_IN_GUEST(r13)
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@ -562,84 +539,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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std r10,RESULT(r1); /* clear regs->result */ \
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std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
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/*
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* Exception vectors.
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*/
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#define STD_EXCEPTION(vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_STD, 1, vec);
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/* Version of above for when we have to branch out-of-line */
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#define __OOL_EXCEPTION(vec, label, hdlr) \
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SET_SCRATCH0(r13); \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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b hdlr
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#define STD_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define STD_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec)
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#define STD_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define STD_RELON_EXCEPTION(loc, vec, label) \
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/* No guest interrupts come through here */ \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_STD, 0, vec)
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#define STD_RELON_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_STD
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, 1, vec)
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#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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#define __MASKABLE_EXCEPTION(vec, label, hsrr, kvm, bitmask) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, hsrr, 1
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#define MASKABLE_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_STD, 1, bitmask)
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#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_HV, 1, bitmask)
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#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define __MASKABLE_RELON_EXCEPTION(vec, label, hsrr, kvm, bitmask) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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EXCEPTION_PROLOG_1 hsrr, PACA_EXGEN, kvm, vec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT label, hsrr
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#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, 0, bitmask)
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#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, 1, bitmask)
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#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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#define RUNLATCH_ON \
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BEGIN_FTR_SECTION \
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ld r3, PACA_THREAD_INFO(r13); \
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@ -258,44 +258,71 @@ name:
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FIXED_SECTION_ENTRY_END_LOCATION(virt_vectors, exc_virt_##start##_##unused, start, size)
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#define EXC_REAL(name, start, size) \
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#define __EXC_REAL(name, start, size, area) \
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EXC_REAL_BEGIN(name, start, size); \
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STD_EXCEPTION(start, name##_common); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 area ; \
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EXCEPTION_PROLOG_1 EXC_STD, area, 1, start, 0 ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \
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EXC_REAL_END(name, start, size)
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#define EXC_VIRT(name, start, size, realvec) \
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#define EXC_REAL(name, start, size) \
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__EXC_REAL(name, start, size, PACA_EXGEN)
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#define __EXC_VIRT(name, start, size, realvec, area) \
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EXC_VIRT_BEGIN(name, start, size); \
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STD_RELON_EXCEPTION(start, realvec, name##_common); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 area ; \
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EXCEPTION_PROLOG_1 EXC_STD, area, 0, realvec, 0; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \
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EXC_VIRT_END(name, start, size)
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#define EXC_VIRT(name, start, size, realvec) \
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__EXC_VIRT(name, start, size, realvec, PACA_EXGEN)
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#define EXC_REAL_MASKABLE(name, start, size, bitmask) \
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EXC_REAL_BEGIN(name, start, size); \
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MASKABLE_EXCEPTION(start, name##_common, bitmask); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, start, bitmask ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \
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EXC_REAL_END(name, start, size)
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#define EXC_VIRT_MASKABLE(name, start, size, realvec, bitmask) \
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EXC_VIRT_BEGIN(name, start, size); \
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MASKABLE_RELON_EXCEPTION(realvec, name##_common, bitmask); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, realvec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \
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EXC_VIRT_END(name, start, size)
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#define EXC_REAL_HV(name, start, size) \
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EXC_REAL_BEGIN(name, start, size); \
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STD_EXCEPTION_HV(start, start, name##_common); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN; \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, start, 0 ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1 ; \
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EXC_REAL_END(name, start, size)
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#define EXC_VIRT_HV(name, start, size, realvec) \
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EXC_VIRT_BEGIN(name, start, size); \
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STD_RELON_EXCEPTION_HV(start, realvec, name##_common); \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0 PACA_EXGEN; \
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV ; \
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EXC_VIRT_END(name, start, size)
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#define __EXC_REAL_OOL(name, start, size) \
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EXC_REAL_BEGIN(name, start, size); \
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__OOL_EXCEPTION(start, label, tramp_real_##name); \
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SET_SCRATCH0(r13); \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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b tramp_real_##name ; \
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EXC_REAL_END(name, start, size)
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#define __TRAMP_REAL_OOL(name, vec) \
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TRAMP_REAL_BEGIN(tramp_real_##name); \
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STD_EXCEPTION_OOL(vec, name##_common)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1
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#define EXC_REAL_OOL(name, start, size) \
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__EXC_REAL_OOL(name, start, size); \
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@ -306,7 +333,8 @@ name:
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#define __TRAMP_REAL_OOL_MASKABLE(name, vec, bitmask) \
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TRAMP_REAL_BEGIN(tramp_real_##name); \
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MASKABLE_EXCEPTION_OOL(vec, name##_common, bitmask)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1
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#define EXC_REAL_OOL_MASKABLE(name, start, size, bitmask) \
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__EXC_REAL_OOL_MASKABLE(name, start, size); \
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@ -314,7 +342,9 @@ name:
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#define __EXC_REAL_OOL_HV_DIRECT(name, start, size, handler) \
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EXC_REAL_BEGIN(name, start, size); \
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__OOL_EXCEPTION(start, label, handler); \
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SET_SCRATCH0(r13); \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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b handler; \
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EXC_REAL_END(name, start, size)
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#define __EXC_REAL_OOL_HV(name, start, size) \
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@ -322,7 +352,8 @@ name:
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#define __TRAMP_REAL_OOL_HV(name, vec) \
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TRAMP_REAL_BEGIN(tramp_real_##name); \
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STD_EXCEPTION_HV_OOL(vec, name##_common)
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, 0 ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1
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#define EXC_REAL_OOL_HV(name, start, size) \
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__EXC_REAL_OOL_HV(name, start, size); \
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@ -333,7 +364,8 @@ name:
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#define __TRAMP_REAL_OOL_MASKABLE_HV(name, vec, bitmask) \
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TRAMP_REAL_BEGIN(tramp_real_##name); \
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MASKABLE_EXCEPTION_HV_OOL(vec, name##_common, bitmask)
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, vec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1
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#define EXC_REAL_OOL_MASKABLE_HV(name, start, size, bitmask) \
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__EXC_REAL_OOL_MASKABLE_HV(name, start, size); \
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@ -341,12 +373,15 @@ name:
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#define __EXC_VIRT_OOL(name, start, size) \
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EXC_VIRT_BEGIN(name, start, size); \
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__OOL_EXCEPTION(start, label, tramp_virt_##name); \
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SET_SCRATCH0(r13); \
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EXCEPTION_PROLOG_0 PACA_EXGEN ; \
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b tramp_virt_##name; \
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EXC_VIRT_END(name, start, size)
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#define __TRAMP_VIRT_OOL(name, realvec) \
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TRAMP_VIRT_BEGIN(tramp_virt_##name); \
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STD_RELON_EXCEPTION_OOL(realvec, name##_common)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, vec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD
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#define EXC_VIRT_OOL(name, start, size, realvec) \
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__EXC_VIRT_OOL(name, start, size); \
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@ -357,7 +392,8 @@ name:
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#define __TRAMP_VIRT_OOL_MASKABLE(name, realvec, bitmask) \
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TRAMP_VIRT_BEGIN(tramp_virt_##name); \
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MASKABLE_RELON_EXCEPTION_OOL(realvec, name##_common, bitmask)
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, realvec, bitmask ; \
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EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1
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#define EXC_VIRT_OOL_MASKABLE(name, start, size, realvec, bitmask) \
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__EXC_VIRT_OOL_MASKABLE(name, start, size); \
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@ -368,7 +404,8 @@ name:
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#define __TRAMP_VIRT_OOL_HV(name, realvec) \
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TRAMP_VIRT_BEGIN(tramp_virt_##name); \
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STD_RELON_EXCEPTION_HV_OOL(realvec, name##_common)
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, 0 ; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV
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#define EXC_VIRT_OOL_HV(name, start, size, realvec) \
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__EXC_VIRT_OOL_HV(name, start, size); \
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@ -379,7 +416,8 @@ name:
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#define __TRAMP_VIRT_OOL_MASKABLE_HV(name, realvec, bitmask) \
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TRAMP_VIRT_BEGIN(tramp_virt_##name); \
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MASKABLE_RELON_EXCEPTION_HV_OOL(realvec, name##_common, bitmask)
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EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, bitmask ; \
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EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV
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#define EXC_VIRT_OOL_MASKABLE_HV(name, start, size, realvec, bitmask) \
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__EXC_VIRT_OOL_MASKABLE_HV(name, start, size); \
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@ -254,9 +254,11 @@ EXC_COMMON_BEGIN(system_reset_common)
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*/
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TRAMP_REAL_BEGIN(system_reset_fwnmi)
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SET_SCRATCH0(r13) /* save r13 */
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/* See comment at system_reset exception */
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EXCEPTION_PROLOG_NORI(PACA_EXNMI, system_reset_common, EXC_STD,
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0, 0x100)
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/* See comment at system_reset exception, don't turn on RI */
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EXCEPTION_PROLOG_0 PACA_EXNMI
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXNMI, 0, 0x100, 0
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EXCEPTION_PROLOG_2_REAL system_reset_common, EXC_STD, 0
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#endif /* CONFIG_PPC_PSERIES */
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@ -714,14 +716,8 @@ MMU_FTR_SECTION_ELSE
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ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
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EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x80)
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EXCEPTION_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 1, 0x480);
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EXC_REAL_END(instruction_access_slb, 0x480, 0x80)
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EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80)
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EXCEPTION_RELON_PROLOG(PACA_EXSLB, instruction_access_slb_common, EXC_STD, 0, 0x480);
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EXC_VIRT_END(instruction_access_slb, 0x4480, 0x80)
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__EXC_REAL(instruction_access_slb, 0x480, 0x80, PACA_EXSLB)
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__EXC_VIRT(instruction_access_slb, 0x4480, 0x80, 0x480, PACA_EXSLB)
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TRAMP_KVM(PACA_EXSLB, 0x480)
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EXC_COMMON_BEGIN(instruction_access_slb_common)
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@ -750,24 +746,34 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
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EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x100)
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.globl hardware_interrupt_hv;
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.globl hardware_interrupt_hv
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hardware_interrupt_hv:
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BEGIN_FTR_SECTION
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MASKABLE_EXCEPTION_HV(0x500, hardware_interrupt_common, IRQS_DISABLED)
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||||
SET_SCRATCH0(r13) /* save r13 */
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||||
EXCEPTION_PROLOG_0 PACA_EXGEN
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||||
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
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EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_HV, 1
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FTR_SECTION_ELSE
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MASKABLE_EXCEPTION(0x500, hardware_interrupt_common, IRQS_DISABLED)
|
||||
SET_SCRATCH0(r13) /* save r13 */
|
||||
EXCEPTION_PROLOG_0 PACA_EXGEN
|
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EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
|
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EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_STD, 1
|
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ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
|
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EXC_REAL_END(hardware_interrupt, 0x500, 0x100)
|
||||
|
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EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x100)
|
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.globl hardware_interrupt_relon_hv;
|
||||
.globl hardware_interrupt_relon_hv
|
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hardware_interrupt_relon_hv:
|
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BEGIN_FTR_SECTION
|
||||
MASKABLE_RELON_EXCEPTION_HV(0x500, hardware_interrupt_common,
|
||||
IRQS_DISABLED)
|
||||
SET_SCRATCH0(r13) /* save r13 */
|
||||
EXCEPTION_PROLOG_0 PACA_EXGEN
|
||||
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
|
||||
EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_HV
|
||||
FTR_SECTION_ELSE
|
||||
__MASKABLE_RELON_EXCEPTION(0x500, hardware_interrupt_common,
|
||||
EXC_STD, 1, IRQS_DISABLED)
|
||||
SET_SCRATCH0(r13) /* save r13 */
|
||||
EXCEPTION_PROLOG_0 PACA_EXGEN
|
||||
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
|
||||
EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_STD
|
||||
ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
|
||||
EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100)
|
||||
|
||||
|
|
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