pci-v6.1-fixes-2
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fd79882ff2
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@ -15849,7 +15849,7 @@ F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
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F: drivers/pci/controller/dwc/*designware*
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PCI DRIVER FOR TI DRA7XX/J721E
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M: Kishon Vijay Abraham I <kishon@ti.com>
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M: Vignesh Raghavendra <vigneshr@ti.com>
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L: linux-omap@vger.kernel.org
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L: linux-pci@vger.kernel.org
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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@ -15866,10 +15866,10 @@ F: Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
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F: drivers/pci/controller/pci-v3-semi.c
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PCI ENDPOINT SUBSYSTEM
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M: Kishon Vijay Abraham I <kishon@ti.com>
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M: Lorenzo Pieralisi <lpieralisi@kernel.org>
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R: Krzysztof Wilczyński <kw@linux.com>
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R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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R: Kishon Vijay Abraham I <kishon@kernel.org>
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L: linux-pci@vger.kernel.org
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S: Supported
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Q: https://patchwork.kernel.org/project/linux-pci/list/
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@ -415,6 +415,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
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* address (access to which generates correct config transaction) falls in
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* this 4 KiB region.
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*/
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static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
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unsigned int where)
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{
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return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
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(PCI_FUNC(devfn) << 8) | (where & 0xff);
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}
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static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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@ -436,9 +443,7 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
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unsigned int offset;
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u32 base;
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offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
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PCI_FUNC(devfn), where) &
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~PCI_CONF1_ENABLE;
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offset = tegra_pcie_conf_offset(bus->number, devfn, where);
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/* move 4 KiB window to offset within the FPCI region */
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base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);
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