ath5k: Fix return codes for eeprom read functions.
Eeprom read functions are of bool type and not int. Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@neratec.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Родитель
8b3f4616d4
Коммит
fda9b7afa7
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@ -31,7 +31,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
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*csz = L1_CACHE_BYTES >> 2;
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}
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bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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static bool
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ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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{
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struct ath5k_softc *sc = common->priv;
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struct platform_device *pdev = to_platform_device(sc->dev);
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@ -46,10 +47,10 @@ bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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eeprom += off;
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if (eeprom > eeprom_end)
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return -EINVAL;
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return false;
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*data = *eeprom;
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return 0;
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return true;
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}
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int ath5k_hw_read_srev(struct ath5k_hw *ah)
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@ -72,7 +72,6 @@ static int
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ath5k_eeprom_init_header(struct ath5k_hw *ah)
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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int ret;
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u16 val;
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u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;
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@ -192,7 +191,7 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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u32 o = *offset;
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u16 val;
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int ret, i = 0;
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int i = 0;
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AR5K_EEPROM_READ(o++, val);
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ee->ee_switch_settling[mode] = (val >> 8) & 0x7f;
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@ -252,7 +251,6 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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u32 o = *offset;
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u16 val;
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int ret;
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ee->ee_n_piers[mode] = 0;
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AR5K_EEPROM_READ(o++, val);
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@ -515,7 +513,6 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max,
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int o = *offset;
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int i = 0;
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u8 freq1, freq2;
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int ret;
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u16 val;
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ee->ee_n_piers[mode] = 0;
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@ -551,7 +548,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset)
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a;
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int i, ret;
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int i;
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u16 val;
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u8 mask;
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@ -970,7 +967,6 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
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u32 offset;
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u8 i, c;
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u16 val;
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int ret;
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u8 pd_gains = 0;
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/* Count how many curves we have and
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@ -1228,7 +1224,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
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struct ath5k_chan_pcal_info *chinfo;
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u8 *pdgain_idx = ee->ee_pdc_to_idx[mode];
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u32 offset;
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int idx, i, ret;
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int idx, i;
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u16 val;
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u8 pd_gains = 0;
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@ -1419,7 +1415,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode)
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u8 *rate_target_pwr_num;
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u32 offset;
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u16 val;
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int ret, i;
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int i;
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offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1);
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rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode];
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@ -1593,7 +1589,7 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah)
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struct ath5k_edge_power *rep;
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unsigned int fmask, pmask;
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unsigned int ctl_mode;
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int ret, i, j;
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int i, j;
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u32 offset;
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u16 val;
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@ -1733,16 +1729,12 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
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u8 mac_d[ETH_ALEN] = {};
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u32 total, offset;
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u16 data;
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int octet, ret;
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int octet;
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ret = ath5k_hw_nvram_read(ah, 0x20, &data);
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if (ret)
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return ret;
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AR5K_EEPROM_READ(0x20, data);
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for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) {
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ret = ath5k_hw_nvram_read(ah, offset, &data);
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if (ret)
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return ret;
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AR5K_EEPROM_READ(offset, data);
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total += data;
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mac_d[octet + 1] = data & 0xff;
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@ -241,9 +241,8 @@ enum ath5k_eeprom_freq_bands{
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#define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250
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#define AR5K_EEPROM_READ(_o, _v) do { \
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ret = ath5k_hw_nvram_read(ah, (_o), &(_v)); \
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if (ret) \
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return ret; \
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if (!ath5k_hw_nvram_read(ah, (_o), &(_v))) \
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return -EIO; \
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} while (0)
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#define AR5K_EEPROM_READ_HDR(_o, _v) \
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@ -69,7 +69,8 @@ static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz)
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/*
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* Read from eeprom
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*/
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bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
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static bool
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ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
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{
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struct ath5k_hw *ah = (struct ath5k_hw *) common->ah;
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u32 status, timeout;
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@ -90,15 +91,15 @@ bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
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status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS);
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if (status & AR5K_EEPROM_STAT_RDDONE) {
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if (status & AR5K_EEPROM_STAT_RDERR)
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return -EIO;
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return false;
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*data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) &
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0xffff);
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return 0;
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return true;
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}
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udelay(15);
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}
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return -ETIMEDOUT;
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return false;
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}
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int ath5k_hw_read_srev(struct ath5k_hw *ah)
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