libata-sff: separate out BMDMA EH
Some of error handling logic in ata_sff_error_handler() and all of ata_sff_post_internal_cmd() are for BMDMA. Create ata_bmdma_error_handler() and ata_bmdma_post_internal_cmd() and move BMDMA part into those. While at it, change DMA protocol check to ata_is_dma(), fix post_internal_cmd to call ap->ops->bmdma_stop instead of directly calling ata_bmdma_stop() and open code hardreset selection so that ata_std_error_handler() doesn't have to know about sff hardreset. As these two functions are BMDMA specific, there's no reason to check for bmdma_addr before calling bmdma methods if the protocol of the failed command is DMA. sata_mv and pata_mpc52xx now don't need to set .post_internal_cmd to ATA_OP_NULL and pata_icside and sata_qstor don't need to set it to their bmdma_stop routines. ata_sff_post_internal_cmd() becomes noop and is removed. This fixes p3 described in clean-up-BMDMA-initialization patch. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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c429137a67
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fe06e5f9b7
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@ -3684,7 +3684,7 @@ void ata_std_error_handler(struct ata_port *ap)
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ata_reset_fn_t hardreset = ops->hardreset;
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/* ignore built-in hardreset if SCR access is not available */
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if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
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if (hardreset == sata_std_hardreset && !sata_scr_valid(&ap->link))
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hardreset = NULL;
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ata_do_eh(ap, ops->prereset, ops->softreset, hardreset, ops->postreset);
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@ -56,7 +56,6 @@ const struct ata_port_operations ata_sff_port_ops = {
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.hardreset = sata_sff_hardreset,
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.postreset = ata_sff_postreset,
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.error_handler = ata_sff_error_handler,
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.post_internal_cmd = ata_sff_post_internal_cmd,
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.sff_dev_select = ata_sff_dev_select,
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.sff_check_status = ata_sff_check_status,
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@ -2361,7 +2360,7 @@ void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
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EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
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/**
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* ata_sff_error_handler - Stock error handler for BMDMA controller
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* ata_sff_error_handler - Stock error handler for SFF controller
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* @ap: port to handle error for
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*
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* Stock error handler for SFF controller. It can handle both
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@ -2378,64 +2377,32 @@ void ata_sff_error_handler(struct ata_port *ap)
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ata_reset_fn_t hardreset = ap->ops->hardreset;
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struct ata_queued_cmd *qc;
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unsigned long flags;
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bool thaw = false;
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qc = __ata_qc_from_tag(ap, ap->link.active_tag);
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if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
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qc = NULL;
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/* reset PIO HSM and stop DMA engine */
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spin_lock_irqsave(ap->lock, flags);
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if (ap->ioaddr.bmdma_addr &&
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qc && (qc->tf.protocol == ATA_PROT_DMA ||
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qc->tf.protocol == ATAPI_PROT_DMA)) {
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u8 host_stat;
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host_stat = ap->ops->bmdma_status(ap);
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/* BMDMA controllers indicate host bus error by
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* setting DMA_ERR bit and timing out. As it wasn't
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* really a timeout event, adjust error mask and
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* cancel frozen state.
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*/
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if (qc->err_mask == AC_ERR_TIMEOUT
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&& (host_stat & ATA_DMA_ERR)) {
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qc->err_mask = AC_ERR_HOST_BUS;
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thaw = true;
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}
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ap->ops->bmdma_stop(qc);
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/* if we're gonna thaw, make sure IRQ is clear */
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if (thaw) {
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ap->ops->sff_check_status(ap);
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ap->ops->sff_irq_clear(ap);
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spin_unlock_irqrestore(ap->lock, flags);
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ata_eh_thaw_port(ap);
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spin_lock_irqsave(ap->lock, flags);
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}
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}
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/* We *MUST* do FIFO draining before we issue a reset as several
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* devices helpfully clear their internal state and will lock solid
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* if we touch the data port post reset. Pass qc in case anyone wants
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* to do different PIO/DMA recovery or has per command fixups
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/*
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* We *MUST* do FIFO draining before we issue a reset as
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* several devices helpfully clear their internal state and
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* will lock solid if we touch the data port post reset. Pass
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* qc in case anyone wants to do different PIO/DMA recovery or
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* has per command fixups
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*/
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if (ap->ops->sff_drain_fifo)
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ap->ops->sff_drain_fifo(qc);
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spin_unlock_irqrestore(ap->lock, flags);
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/* PIO and DMA engines have been stopped, perform recovery */
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/* Ignore ata_sff_softreset if ctl isn't accessible and
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* built-in hardresets if SCR access isn't available.
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*/
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/* ignore ata_sff_softreset if ctl isn't accessible */
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if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
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softreset = NULL;
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if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
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/* ignore built-in hardresets if SCR access is not available */
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if ((hardreset == sata_std_hardreset ||
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hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
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hardreset = NULL;
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ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
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@ -2443,27 +2410,6 @@ void ata_sff_error_handler(struct ata_port *ap)
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}
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EXPORT_SYMBOL_GPL(ata_sff_error_handler);
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/**
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* ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
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* @qc: internal command to clean up
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*/
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void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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unsigned long flags;
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spin_lock_irqsave(ap->lock, flags);
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if (ap->ioaddr.bmdma_addr)
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ap->ops->bmdma_stop(qc);
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spin_unlock_irqrestore(ap->lock, flags);
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}
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EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
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/**
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* ata_sff_std_ports - initialize ioaddr with standard port offsets.
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* @ioaddr: IO address structure to be initialized
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@ -2811,6 +2757,9 @@ EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
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const struct ata_port_operations ata_bmdma_port_ops = {
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.inherits = &ata_sff_port_ops,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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@ -2828,6 +2777,84 @@ const struct ata_port_operations ata_bmdma32_port_ops = {
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};
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EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
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/**
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* ata_bmdma_error_handler - Stock error handler for BMDMA controller
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* @ap: port to handle error for
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*
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* Stock error handler for BMDMA controller. It can handle both
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* PATA and SATA controllers. Most BMDMA controllers should be
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* able to use this EH as-is or with some added handling before
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* and after.
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*/
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void ata_bmdma_error_handler(struct ata_port *ap)
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{
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struct ata_queued_cmd *qc;
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unsigned long flags;
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bool thaw = false;
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qc = __ata_qc_from_tag(ap, ap->link.active_tag);
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if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
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qc = NULL;
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/* reset PIO HSM and stop DMA engine */
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spin_lock_irqsave(ap->lock, flags);
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if (qc && ata_is_dma(qc->tf.protocol)) {
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u8 host_stat;
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host_stat = ap->ops->bmdma_status(ap);
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/* BMDMA controllers indicate host bus error by
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* setting DMA_ERR bit and timing out. As it wasn't
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* really a timeout event, adjust error mask and
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* cancel frozen state.
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*/
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if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
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qc->err_mask = AC_ERR_HOST_BUS;
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thaw = true;
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}
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ap->ops->bmdma_stop(qc);
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/* if we're gonna thaw, make sure IRQ is clear */
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if (thaw) {
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ap->ops->sff_check_status(ap);
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ap->ops->sff_irq_clear(ap);
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}
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}
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spin_unlock_irqrestore(ap->lock, flags);
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if (thaw)
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ata_eh_thaw_port(ap);
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ata_sff_error_handler(ap);
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}
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EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
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/**
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* ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
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* @qc: internal command to clean up
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*/
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void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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unsigned long flags;
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if (ata_is_dma(qc->tf.protocol)) {
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spin_lock_irqsave(ap->lock, flags);
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ap->ops->bmdma_stop(qc);
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spin_unlock_irqrestore(ap->lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
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/**
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* ata_bmdma_setup - Set up PCI IDE BMDMA transaction
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* @qc: Info associated with this ATA transaction.
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@ -38,17 +38,6 @@ struct ata_scsi_args {
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void (*done)(struct scsi_cmnd *);
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};
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static inline int ata_is_builtin_hardreset(ata_reset_fn_t reset)
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{
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if (reset == sata_std_hardreset)
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return 1;
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#ifdef CONFIG_ATA_SFF
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if (reset == sata_sff_hardreset)
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return 1;
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#endif
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return 0;
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}
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/* libata-core.c */
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enum {
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/* flags for ata_dev_read_id() */
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@ -333,7 +333,6 @@ static struct ata_port_operations pata_icside_port_ops = {
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.cable_detect = ata_cable_40wire,
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.set_dmamode = pata_icside_set_dmamode,
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.postreset = pata_icside_postreset,
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.post_internal_cmd = pata_icside_bmdma_stop,
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.port_start = ATA_OP_NULL, /* don't need PRD table */
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};
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@ -951,7 +951,6 @@ static struct ata_port_operations scc_pata_ops = {
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.prereset = scc_pata_prereset,
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.softreset = scc_softreset,
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.postreset = scc_postreset,
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.post_internal_cmd = scc_bmdma_stop,
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.sff_irq_clear = scc_irq_clear,
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@ -1131,7 +1131,7 @@ static void nv_adma_post_internal_cmd(struct ata_queued_cmd *qc)
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struct nv_adma_port_priv *pp = qc->ap->private_data;
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if (pp->flags & NV_ADMA_PORT_REGISTER_MODE)
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ata_sff_post_internal_cmd(qc);
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ata_bmdma_post_internal_cmd(qc);
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}
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static int nv_adma_port_start(struct ata_port *ap)
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@ -1739,7 +1739,7 @@ static void nv_adma_error_handler(struct ata_port *ap)
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readw(mmio + NV_ADMA_CTL); /* flush posted write */
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}
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ata_sff_error_handler(ap);
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ata_bmdma_error_handler(ap);
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}
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static void nv_swncq_qc_to_dq(struct ata_port *ap, struct ata_queued_cmd *qc)
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@ -1865,7 +1865,7 @@ static void nv_swncq_error_handler(struct ata_port *ap)
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ehc->i.action |= ATA_EH_RESET;
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}
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ata_sff_error_handler(ap);
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ata_bmdma_error_handler(ap);
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}
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#ifdef CONFIG_PM
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@ -839,7 +839,7 @@ static void pdc_error_handler(struct ata_port *ap)
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if (!(ap->pflags & ATA_PFLAG_FROZEN))
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pdc_reset_port(ap);
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ata_std_error_handler(ap);
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ata_sff_error_handler(ap);
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}
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static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
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@ -147,7 +147,6 @@ static struct ata_port_operations qs_ata_ops = {
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.prereset = qs_prereset,
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.softreset = ATA_OP_NULL,
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.error_handler = qs_error_handler,
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.post_internal_cmd = ATA_OP_NULL,
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.lost_interrupt = ATA_OP_NULL,
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.scr_read = qs_scr_read,
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@ -255,7 +254,7 @@ static int qs_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
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static void qs_error_handler(struct ata_port *ap)
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{
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qs_enter_reg_mode(ap);
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ata_std_error_handler(ap);
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ata_sff_error_handler(ap);
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}
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static int qs_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
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@ -921,7 +921,7 @@ static void pdc_error_handler(struct ata_port *ap)
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if (!(ap->pflags & ATA_PFLAG_FROZEN))
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pdc_reset_port(ap);
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ata_std_error_handler(ap);
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ata_sff_error_handler(ap);
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}
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static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
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@ -1614,7 +1614,6 @@ extern int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
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extern void ata_sff_postreset(struct ata_link *link, unsigned int *classes);
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extern void ata_sff_drain_fifo(struct ata_queued_cmd *qc);
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extern void ata_sff_error_handler(struct ata_port *ap);
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extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc);
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extern void ata_sff_std_ports(struct ata_ioports *ioaddr);
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#ifdef CONFIG_PCI
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extern int ata_pci_sff_init_host(struct ata_host *host);
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@ -1629,6 +1628,8 @@ extern int ata_pci_sff_init_one(struct pci_dev *pdev,
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struct scsi_host_template *sht, void *host_priv, int hflags);
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#endif /* CONFIG_PCI */
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extern void ata_bmdma_error_handler(struct ata_port *ap);
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extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc);
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extern void ata_bmdma_setup(struct ata_queued_cmd *qc);
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extern void ata_bmdma_start(struct ata_queued_cmd *qc);
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extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
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