Merge branch 'sched/urgent' into sched/core, to pick up fixes before applying new changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
Коммит
fe19159225
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@ -43,7 +43,7 @@ o udev 081 # udevd --version
|
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o grub 0.93 # grub --version || grub-install --version
|
||||
o mcelog 0.6 # mcelog --version
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||||
o iptables 1.4.2 # iptables -V
|
||||
o openssl & libcrypto 1.0.1k # openssl version
|
||||
o openssl & libcrypto 1.0.0 # openssl version
|
||||
|
||||
|
||||
Kernel compilation
|
||||
|
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|
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@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
|
|||
These nodes must have the following properties:
|
||||
- compatible : Should at least contain "arm,gic-v3-its".
|
||||
- msi-controller : Boolean property. Identifies the node as an MSI controller
|
||||
- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
|
||||
which will generate the MSI.
|
||||
- reg: Specifies the base physical address and size of the ITS
|
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registers.
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||||
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||||
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@ -83,6 +85,7 @@ Examples:
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gic-its@2c200000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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#msi-cells = <1>;
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reg = <0x0 0x2c200000 0 0x200000>;
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};
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};
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@ -107,12 +110,14 @@ Examples:
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gic-its@2c200000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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#msi-cells = <1>;
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reg = <0x0 0x2c200000 0 0x200000>;
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};
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gic-its@2c400000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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#msi-cells = <1>;
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reg = <0x0 0x2c400000 0 0x200000>;
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};
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};
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@ -497,7 +497,7 @@ cpus {
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};
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idle-states {
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entry-method = "arm,psci";
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entry-method = "psci";
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CPU_RETENTION_0_0: cpu-retention-0-0 {
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compatible = "arm,idle-state";
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@ -16,7 +16,9 @@ properties, each containing a 'gpio-list':
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GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
|
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of this GPIO for the device. While a non-existent <name> is considered valid
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for compatibility reasons (resolving to the "gpios" property), it is not allowed
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for new bindings.
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for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
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||||
bindings use it, but are only supported for compatibility reasons and should not
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be used for newer bindings since it has been deprecated.
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|
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GPIO properties can contain one or more GPIO phandles, but only in exceptional
|
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cases should they contain more than one. If your device uses several GPIOs with
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|
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|
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@ -1,10 +1,11 @@
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* Bosch BMA180 triaxial acceleration sensor
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* Bosch BMA180 / BMA250 triaxial acceleration sensor
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http://omapworld.com/BMA180_111_1002839.pdf
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http://ae-bst.resource.bosch.com/media/products/dokumente/bma250/bst-bma250-ds002-05.pdf
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|
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Required properties:
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||||
- compatible : should be "bosch,bma180"
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- compatible : should be "bosch,bma180" or "bosch,bma250"
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- reg : the I2C address of the sensor
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Optional properties:
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@ -13,6 +14,9 @@ Optional properties:
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- interrupts : interrupt mapping for GPIO IRQ, it should by configured with
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flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING
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For the bma250 the first interrupt listed must be the one
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connected to the INT1 pin, the second (optional) interrupt
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listed must be the one connected to the INT2 pin.
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|
||||
Example:
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@ -25,7 +25,7 @@ Example:
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/* Cypress Gen3 touchpad */
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touchpad@67 {
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compatible = "cypress,cyapa";
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reg = <0x24>;
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reg = <0x67>;
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interrupt-parent = <&gpio>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO 2 */
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wakeup-source;
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@ -4,8 +4,8 @@ The MISC interrupt controller is a secondary controller for lower priority
|
|||
interrupt.
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||||
|
||||
Required Properties:
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||||
- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc"
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||||
as fallback
|
||||
- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or
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"qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc"
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- reg: Base address and size of the controllers memory area
|
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
|
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@ -13,6 +13,9 @@ Required Properties:
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|||
- #interrupt-cells : Specifies the number of cells needed to encode interrupt
|
||||
source, should be 1
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||||
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Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x,
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use ar7240 for all other SoCs.
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|
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Please refer to interrupts.txt in this directory for details of the common
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||||
Interrupt Controllers bindings used by client devices.
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@ -28,3 +31,16 @@ Example:
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|||
interrupt-controller;
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#interrupt-cells = <1>;
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||||
};
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||||
|
||||
Another example:
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||||
|
||||
interrupt-controller@18060010 {
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||||
compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";
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||||
reg = <0x18060010 0x4>;
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||||
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||||
interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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interrupt-controller;
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||||
#interrupt-cells = <1>;
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};
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@ -7,7 +7,8 @@ OHCI and EHCI controllers.
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|||
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||||
Required properties:
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||||
- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
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||||
"renesas,pci-r8a7791" for the R8A7791 SoC.
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"renesas,pci-r8a7791" for the R8A7791 SoC;
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||||
"renesas,pci-r8a7794" for the R8A7794 SoC.
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||||
- reg: A list of physical regions to access the device: the first is
|
||||
the operational registers for the OHCI/EHCI controllers and the
|
||||
second is for the bridge configuration and control registers.
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||||
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|
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@ -2,7 +2,12 @@ PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs.
|
|||
|
||||
Required properties:
|
||||
- compatible:
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||||
- "ti,pbias-omap" for OMAP2, OMAP3, OMAP4, OMAP5, DRA7.
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||||
- should be "ti,pbias-dra7" for DRA7
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||||
- should be "ti,pbias-omap2" for OMAP2
|
||||
- should be "ti,pbias-omap3" for OMAP3
|
||||
- should be "ti,pbias-omap4" for OMAP4
|
||||
- should be "ti,pbias-omap5" for OMAP5
|
||||
- "ti,pbias-omap" is deprecated
|
||||
- reg: pbias register offset from syscon base and size of pbias register.
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||||
- syscon : phandle of the system control module
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||||
- regulator-name : should be
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||||
|
|
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|
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@ -15,17 +15,18 @@ Required properties:
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|||
- interrupts: Should contain spi interrupt
|
||||
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||||
- clocks: phandles to input clocks.
|
||||
The first should be <&topckgen CLK_TOP_SPI_SEL>.
|
||||
The second should be one of the following.
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||||
The first should be one of the following. It's PLL.
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||||
- <&clk26m>: specify parent clock 26MHZ.
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||||
- <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
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||||
It's the default one.
|
||||
- <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
|
||||
- <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
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||||
- <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
|
||||
The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
|
||||
The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
|
||||
|
||||
- clock-names: shall be "spi-clk" for the controller clock, and
|
||||
"parent-clk" for the parent clock.
|
||||
- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
|
||||
muxes clock, and "spi-clk" for the clock gate.
|
||||
|
||||
Optional properties:
|
||||
- mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
|
||||
|
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@ -44,8 +45,11 @@ spi: spi@1100a000 {
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|||
#size-cells = <0>;
|
||||
reg = <0 0x1100a000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
|
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clock-names = "spi-clk", "parent-clk";
|
||||
clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
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||||
<&pericfg CLK_PERI_SPI0>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk";
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||||
|
||||
mediatek,pad-select = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
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|
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@ -55,19 +55,11 @@ of heat dissipation). For example a fan's cooling states correspond to
|
|||
the different fan speeds possible. Cooling states are referred to by
|
||||
single unsigned integers, where larger numbers mean greater heat
|
||||
dissipation. The precise set of cooling states associated with a device
|
||||
(as referred to be the cooling-min-state and cooling-max-state
|
||||
(as referred to by the cooling-min-level and cooling-max-level
|
||||
properties) should be defined in a particular device's binding.
|
||||
For more examples of cooling devices, refer to the example sections below.
|
||||
|
||||
Required properties:
|
||||
- cooling-min-state: An integer indicating the smallest
|
||||
Type: unsigned cooling state accepted. Typically 0.
|
||||
Size: one cell
|
||||
|
||||
- cooling-max-state: An integer indicating the largest
|
||||
Type: unsigned cooling state accepted.
|
||||
Size: one cell
|
||||
|
||||
- #cooling-cells: Used to provide cooling device specific information
|
||||
Type: unsigned while referring to it. Must be at least 2, in order
|
||||
Size: one cell to specify minimum and maximum cooling state used
|
||||
|
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@ -77,6 +69,15 @@ Required properties:
|
|||
See Cooling device maps section below for more details
|
||||
on how consumers refer to cooling devices.
|
||||
|
||||
Optional properties:
|
||||
- cooling-min-level: An integer indicating the smallest
|
||||
Type: unsigned cooling state accepted. Typically 0.
|
||||
Size: one cell
|
||||
|
||||
- cooling-max-level: An integer indicating the largest
|
||||
Type: unsigned cooling state accepted.
|
||||
Size: one cell
|
||||
|
||||
* Trip points
|
||||
|
||||
The trip node is a node to describe a point in the temperature domain
|
||||
|
|
@ -225,8 +226,8 @@ cpus {
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|||
396000 950000
|
||||
198000 850000
|
||||
>;
|
||||
cooling-min-state = <0>;
|
||||
cooling-max-state = <3>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <3>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
...
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||||
|
|
@ -240,8 +241,8 @@ cpus {
|
|||
*/
|
||||
fan0: fan@0x48 {
|
||||
...
|
||||
cooling-min-state = <0>;
|
||||
cooling-max-state = <9>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <9>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@ Required properties:
|
|||
"lsi,zevio-usb"
|
||||
"qcom,ci-hdrc"
|
||||
"chipidea,usb2"
|
||||
"xlnx,zynq-usb-2.20a"
|
||||
- reg: base address and length of the registers
|
||||
- interrupts: interrupt for the USB controller
|
||||
|
||||
|
|
|
|||
|
|
@ -203,6 +203,7 @@ sitronix Sitronix Technology Corporation
|
|||
skyworks Skyworks Solutions, Inc.
|
||||
smsc Standard Microsystems Corporation
|
||||
snps Synopsys, Inc.
|
||||
socionext Socionext Inc.
|
||||
solidrun SolidRun
|
||||
solomon Solomon Systech Limited
|
||||
sony Sony Corporation
|
||||
|
|
|
|||
|
|
@ -361,7 +361,7 @@ For win8 devices with both T and C coordinates, the position mapping is
|
|||
ABS_MT_POSITION_X := T_X
|
||||
ABS_MT_POSITION_Y := T_Y
|
||||
ABS_MT_TOOL_X := C_X
|
||||
ABS_MT_TOOL_X := C_Y
|
||||
ABS_MT_TOOL_Y := C_Y
|
||||
|
||||
Unfortunately, there is not enough information to specify both the touching
|
||||
ellipse and the tool ellipse, so one has to resort to approximations. One
|
||||
|
|
|
|||
|
|
@ -0,0 +1,96 @@
|
|||
Virtual Routing and Forwarding (VRF)
|
||||
====================================
|
||||
The VRF device combined with ip rules provides the ability to create virtual
|
||||
routing and forwarding domains (aka VRFs, VRF-lite to be specific) in the
|
||||
Linux network stack. One use case is the multi-tenancy problem where each
|
||||
tenant has their own unique routing tables and in the very least need
|
||||
different default gateways.
|
||||
|
||||
Processes can be "VRF aware" by binding a socket to the VRF device. Packets
|
||||
through the socket then use the routing table associated with the VRF
|
||||
device. An important feature of the VRF device implementation is that it
|
||||
impacts only Layer 3 and above so L2 tools (e.g., LLDP) are not affected
|
||||
(ie., they do not need to be run in each VRF). The design also allows
|
||||
the use of higher priority ip rules (Policy Based Routing, PBR) to take
|
||||
precedence over the VRF device rules directing specific traffic as desired.
|
||||
|
||||
In addition, VRF devices allow VRFs to be nested within namespaces. For
|
||||
example network namespaces provide separation of network interfaces at L1
|
||||
(Layer 1 separation), VLANs on the interfaces within a namespace provide
|
||||
L2 separation and then VRF devices provide L3 separation.
|
||||
|
||||
Design
|
||||
------
|
||||
A VRF device is created with an associated route table. Network interfaces
|
||||
are then enslaved to a VRF device:
|
||||
|
||||
+-----------------------------+
|
||||
| vrf-blue | ===> route table 10
|
||||
+-----------------------------+
|
||||
| | |
|
||||
+------+ +------+ +-------------+
|
||||
| eth1 | | eth2 | ... | bond1 |
|
||||
+------+ +------+ +-------------+
|
||||
| |
|
||||
+------+ +------+
|
||||
| eth8 | | eth9 |
|
||||
+------+ +------+
|
||||
|
||||
Packets received on an enslaved device and are switched to the VRF device
|
||||
using an rx_handler which gives the impression that packets flow through
|
||||
the VRF device. Similarly on egress routing rules are used to send packets
|
||||
to the VRF device driver before getting sent out the actual interface. This
|
||||
allows tcpdump on a VRF device to capture all packets into and out of the
|
||||
VRF as a whole.[1] Similiarly, netfilter [2] and tc rules can be applied
|
||||
using the VRF device to specify rules that apply to the VRF domain as a whole.
|
||||
|
||||
[1] Packets in the forwarded state do not flow through the device, so those
|
||||
packets are not seen by tcpdump. Will revisit this limitation in a
|
||||
future release.
|
||||
|
||||
[2] Iptables on ingress is limited to NF_INET_PRE_ROUTING only with skb->dev
|
||||
set to real ingress device and egress is limited to NF_INET_POST_ROUTING.
|
||||
Will revisit this limitation in a future release.
|
||||
|
||||
|
||||
Setup
|
||||
-----
|
||||
1. VRF device is created with an association to a FIB table.
|
||||
e.g, ip link add vrf-blue type vrf table 10
|
||||
ip link set dev vrf-blue up
|
||||
|
||||
2. Rules are added that send lookups to the associated FIB table when the
|
||||
iif or oif is the VRF device. e.g.,
|
||||
ip ru add oif vrf-blue table 10
|
||||
ip ru add iif vrf-blue table 10
|
||||
|
||||
Set the default route for the table (and hence default route for the VRF).
|
||||
e.g, ip route add table 10 prohibit default
|
||||
|
||||
3. Enslave L3 interfaces to a VRF device.
|
||||
e.g, ip link set dev eth1 master vrf-blue
|
||||
|
||||
Local and connected routes for enslaved devices are automatically moved to
|
||||
the table associated with VRF device. Any additional routes depending on
|
||||
the enslaved device will need to be reinserted following the enslavement.
|
||||
|
||||
4. Additional VRF routes are added to associated table.
|
||||
e.g., ip route add table 10 ...
|
||||
|
||||
|
||||
Applications
|
||||
------------
|
||||
Applications that are to work within a VRF need to bind their socket to the
|
||||
VRF device:
|
||||
|
||||
setsockopt(sd, SOL_SOCKET, SO_BINDTODEVICE, dev, strlen(dev)+1);
|
||||
|
||||
or to specify the output device using cmsg and IP_PKTINFO.
|
||||
|
||||
|
||||
Limitations
|
||||
-----------
|
||||
VRF device currently only works for IPv4. Support for IPv6 is under development.
|
||||
|
||||
Index of original ingress interface is not available via cmsg. Will address
|
||||
soon.
|
||||
|
|
@ -979,20 +979,45 @@ every time right after the runtime_resume() callback has returned
|
|||
(alternatively, the runtime_suspend() callback will have to check if the
|
||||
device should really be suspended and return -EAGAIN if that is not the case).
|
||||
|
||||
The runtime PM of PCI devices is disabled by default. It is also blocked by
|
||||
pci_pm_init() that runs the pm_runtime_forbid() helper function. If a PCI
|
||||
driver implements the runtime PM callbacks and intends to use the runtime PM
|
||||
framework provided by the PM core and the PCI subsystem, it should enable this
|
||||
feature by executing the pm_runtime_enable() helper function. However, the
|
||||
driver should not call the pm_runtime_allow() helper function unblocking
|
||||
the runtime PM of the device. Instead, it should allow user space or some
|
||||
platform-specific code to do that (user space can do it via sysfs), although
|
||||
once it has called pm_runtime_enable(), it must be prepared to handle the
|
||||
The runtime PM of PCI devices is enabled by default by the PCI core. PCI
|
||||
device drivers do not need to enable it and should not attempt to do so.
|
||||
However, it is blocked by pci_pm_init() that runs the pm_runtime_forbid()
|
||||
helper function. In addition to that, the runtime PM usage counter of
|
||||
each PCI device is incremented by local_pci_probe() before executing the
|
||||
probe callback provided by the device's driver.
|
||||
|
||||
If a PCI driver implements the runtime PM callbacks and intends to use the
|
||||
runtime PM framework provided by the PM core and the PCI subsystem, it needs
|
||||
to decrement the device's runtime PM usage counter in its probe callback
|
||||
function. If it doesn't do that, the counter will always be different from
|
||||
zero for the device and it will never be runtime-suspended. The simplest
|
||||
way to do that is by calling pm_runtime_put_noidle(), but if the driver
|
||||
wants to schedule an autosuspend right away, for example, it may call
|
||||
pm_runtime_put_autosuspend() instead for this purpose. Generally, it
|
||||
just needs to call a function that decrements the devices usage counter
|
||||
from its probe routine to make runtime PM work for the device.
|
||||
|
||||
It is important to remember that the driver's runtime_suspend() callback
|
||||
may be executed right after the usage counter has been decremented, because
|
||||
user space may already have cuased the pm_runtime_allow() helper function
|
||||
unblocking the runtime PM of the device to run via sysfs, so the driver must
|
||||
be prepared to cope with that.
|
||||
|
||||
The driver itself should not call pm_runtime_allow(), though. Instead, it
|
||||
should let user space or some platform-specific code do that (user space can
|
||||
do it via sysfs as stated above), but it must be prepared to handle the
|
||||
runtime PM of the device correctly as soon as pm_runtime_allow() is called
|
||||
(which may happen at any time). [It also is possible that user space causes
|
||||
pm_runtime_allow() to be called via sysfs before the driver is loaded, so in
|
||||
fact the driver has to be prepared to handle the runtime PM of the device as
|
||||
soon as it calls pm_runtime_enable().]
|
||||
(which may happen at any time, even before the driver is loaded).
|
||||
|
||||
When the driver's remove callback runs, it has to balance the decrementation
|
||||
of the device's runtime PM usage counter at the probe time. For this reason,
|
||||
if it has decremented the counter in its probe callback, it must run
|
||||
pm_runtime_get_noresume() in its remove callback. [Since the core carries
|
||||
out a runtime resume of the device and bumps up the device's usage counter
|
||||
before running the driver's remove callback, the runtime PM of the device
|
||||
is effectively disabled for the duration of the remove execution and all
|
||||
runtime PM helper functions incrementing the device's usage counter are
|
||||
then effectively equivalent to pm_runtime_get_noresume().]
|
||||
|
||||
The runtime PM framework works by processing requests to suspend or resume
|
||||
devices, or to check if they are idle (in which cases it is reasonable to
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
#define _GNU_SOURCE
|
||||
#define __SANE_USERSPACE_TYPES__ /* For PPC64, to get LL64 types */
|
||||
#include <errno.h>
|
||||
#include <fcntl.h>
|
||||
#include <inttypes.h>
|
||||
|
|
|
|||
|
|
@ -54,13 +54,15 @@ default_qdisc
|
|||
--------------
|
||||
|
||||
The default queuing discipline to use for network devices. This allows
|
||||
overriding the default queue discipline of pfifo_fast with an
|
||||
alternative. Since the default queuing discipline is created with the
|
||||
no additional parameters so is best suited to queuing disciplines that
|
||||
work well without configuration like stochastic fair queue (sfq),
|
||||
CoDel (codel) or fair queue CoDel (fq_codel). Don't use queuing disciplines
|
||||
like Hierarchical Token Bucket or Deficit Round Robin which require setting
|
||||
up classes and bandwidths.
|
||||
overriding the default of pfifo_fast with an alternative. Since the default
|
||||
queuing discipline is created without additional parameters so is best suited
|
||||
to queuing disciplines that work well without configuration like stochastic
|
||||
fair queue (sfq), CoDel (codel) or fair queue CoDel (fq_codel). Don't use
|
||||
queuing disciplines like Hierarchical Token Bucket or Deficit Round Robin
|
||||
which require setting up classes and bandwidths. Note that physical multiqueue
|
||||
interfaces still use mq as root qdisc, which in turn uses this default for its
|
||||
leaves. Virtual devices (like e.g. lo or veth) ignore this setting and instead
|
||||
default to noqueue.
|
||||
Default: pfifo_fast
|
||||
|
||||
busy_read
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ Power allocator governor tunables
|
|||
Trip points
|
||||
-----------
|
||||
|
||||
The governor requires the following two passive trip points:
|
||||
The governor works optimally with the following two passive trip points:
|
||||
|
||||
1. "switch on" trip point: temperature above which the governor
|
||||
control loop starts operating. This is the first passive trip
|
||||
|
|
|
|||
42
MAINTAINERS
42
MAINTAINERS
|
|
@ -615,9 +615,8 @@ F: Documentation/hwmon/fam15h_power
|
|||
F: drivers/hwmon/fam15h_power.c
|
||||
|
||||
AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER
|
||||
M: Thomas Dahlmann <dahlmann.thomas@arcor.de>
|
||||
L: linux-geode@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
S: Orphan
|
||||
F: drivers/usb/gadget/udc/amd5536udc.*
|
||||
|
||||
AMD GEODE PROCESSOR/CHIPSET SUPPORT
|
||||
|
|
@ -808,6 +807,13 @@ S: Maintained
|
|||
F: drivers/video/fbdev/arcfb.c
|
||||
F: drivers/video/fbdev/core/fb_defio.c
|
||||
|
||||
ARCNET NETWORK LAYER
|
||||
M: Michael Grzeschik <m.grzeschik@pengutronix.de>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/arcnet/
|
||||
F: include/uapi/linux/if_arcnet.h
|
||||
|
||||
ARM MFM AND FLOPPY DRIVERS
|
||||
M: Ian Molton <spyro@f2s.com>
|
||||
S: Maintained
|
||||
|
|
@ -3394,7 +3400,6 @@ F: drivers/staging/dgnc/
|
|||
|
||||
DIGI EPCA PCI PRODUCTS
|
||||
M: Lidza Louina <lidza.louina@gmail.com>
|
||||
M: Mark Hounschell <markh@compro.net>
|
||||
M: Daeseok Youn <daeseok.youn@gmail.com>
|
||||
L: driverdev-devel@linuxdriverproject.org
|
||||
S: Maintained
|
||||
|
|
@ -5952,7 +5957,7 @@ F: virt/kvm/
|
|||
KERNEL VIRTUAL MACHINE (KVM) FOR AMD-V
|
||||
M: Joerg Roedel <joro@8bytes.org>
|
||||
L: kvm@vger.kernel.org
|
||||
W: http://kvm.qumranet.com
|
||||
W: http://www.linux-kvm.org/
|
||||
S: Maintained
|
||||
F: arch/x86/include/asm/svm.h
|
||||
F: arch/x86/kvm/svm.c
|
||||
|
|
@ -5960,7 +5965,7 @@ F: arch/x86/kvm/svm.c
|
|||
KERNEL VIRTUAL MACHINE (KVM) FOR POWERPC
|
||||
M: Alexander Graf <agraf@suse.com>
|
||||
L: kvm-ppc@vger.kernel.org
|
||||
W: http://kvm.qumranet.com
|
||||
W: http://www.linux-kvm.org/
|
||||
T: git git://github.com/agraf/linux-2.6.git
|
||||
S: Supported
|
||||
F: arch/powerpc/include/asm/kvm*
|
||||
|
|
@ -8500,7 +8505,6 @@ F: Documentation/networking/LICENSE.qla3xxx
|
|||
F: drivers/net/ethernet/qlogic/qla3xxx.*
|
||||
|
||||
QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
|
||||
M: Shahed Shaikh <shahed.shaikh@qlogic.com>
|
||||
M: Dept-GELinuxNICDev@qlogic.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -9904,8 +9908,8 @@ F: drivers/staging/media/lirc/
|
|||
STAGING - LUSTRE PARALLEL FILESYSTEM
|
||||
M: Oleg Drokin <oleg.drokin@intel.com>
|
||||
M: Andreas Dilger <andreas.dilger@intel.com>
|
||||
L: HPDD-discuss@lists.01.org (moderated for non-subscribers)
|
||||
W: http://lustre.opensfs.org/
|
||||
L: lustre-devel@lists.lustre.org (moderated for non-subscribers)
|
||||
W: http://wiki.lustre.org/
|
||||
S: Maintained
|
||||
F: drivers/staging/lustre
|
||||
|
||||
|
|
@ -10338,6 +10342,16 @@ F: include/uapi/linux/thermal.h
|
|||
F: include/linux/cpu_cooling.h
|
||||
F: Documentation/devicetree/bindings/thermal/
|
||||
|
||||
THERMAL/CPU_COOLING
|
||||
M: Amit Daniel Kachhap <amit.kachhap@gmail.com>
|
||||
M: Viresh Kumar <viresh.kumar@linaro.org>
|
||||
M: Javi Merino <javi.merino@arm.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/thermal/cpu-cooling-api.txt
|
||||
F: drivers/thermal/cpu_cooling.c
|
||||
F: include/linux/cpu_cooling.h
|
||||
|
||||
THINGM BLINK(1) USB RGB LED DRIVER
|
||||
M: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
|
||||
S: Maintained
|
||||
|
|
@ -11187,7 +11201,7 @@ F: drivers/vlynq/vlynq.c
|
|||
F: include/linux/vlynq.h
|
||||
|
||||
VME SUBSYSTEM
|
||||
M: Martyn Welch <martyn.welch@ge.com>
|
||||
M: Martyn Welch <martyn@welchs.me.uk>
|
||||
M: Manohar Vanga <manohar.vanga@gmail.com>
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: devel@driverdev.osuosl.org
|
||||
|
|
@ -11239,7 +11253,6 @@ VOLTAGE AND CURRENT REGULATOR FRAMEWORK
|
|||
M: Liam Girdwood <lgirdwood@gmail.com>
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
W: http://opensource.wolfsonmicro.com/node/15
|
||||
W: http://www.slimlogic.co.uk/?p=48
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
|
||||
S: Supported
|
||||
|
|
@ -11253,6 +11266,7 @@ L: netdev@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/net/vrf.c
|
||||
F: include/net/vrf.h
|
||||
F: Documentation/networking/vrf.txt
|
||||
|
||||
VT1211 HARDWARE MONITOR DRIVER
|
||||
M: Juerg Haefliger <juergh@gmail.com>
|
||||
|
|
@ -11368,17 +11382,15 @@ WM97XX TOUCHSCREEN DRIVERS
|
|||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Liam Girdwood <lrg@slimlogic.co.uk>
|
||||
L: linux-input@vger.kernel.org
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-touch
|
||||
W: http://opensource.wolfsonmicro.com/node/7
|
||||
W: https://github.com/CirrusLogic/linux-drivers/wiki
|
||||
S: Supported
|
||||
F: drivers/input/touchscreen/*wm97*
|
||||
F: include/linux/wm97xx.h
|
||||
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
L: patches@opensource.wolfsonmicro.com
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
|
||||
W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
|
||||
T: git https://github.com/CirrusLogic/linux-drivers.git
|
||||
W: https://github.com/CirrusLogic/linux-drivers/wiki
|
||||
S: Supported
|
||||
F: Documentation/hwmon/wm83??
|
||||
F: arch/arm/mach-s3c64xx/mach-crag6410*
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Hurr durr I'ma sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -117,6 +117,6 @@ handle_irq(int irq)
|
|||
}
|
||||
|
||||
irq_enter();
|
||||
generic_handle_irq_desc(irq, desc);
|
||||
generic_handle_irq_desc(desc);
|
||||
irq_exit();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -242,7 +242,12 @@ pci_restore_srm_config(void)
|
|||
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
|
||||
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
|
||||
pci_read_bridge_bases(bus);
|
||||
}
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
pdev_save_srm_config(dev);
|
||||
|
|
|
|||
|
|
@ -48,4 +48,5 @@ generic-y += types.h
|
|||
generic-y += ucontext.h
|
||||
generic-y += user.h
|
||||
generic-y += vga.h
|
||||
generic-y += word-at-a-time.h
|
||||
generic-y += xor.h
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@ static struct irq_chip idu_irq_chip = {
|
|||
|
||||
static int idu_first_irq;
|
||||
|
||||
static void idu_cascade_isr(unsigned int __core_irq, struct irq_desc *desc)
|
||||
static void idu_cascade_isr(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_domain *domain = irq_desc_get_handler_data(desc);
|
||||
unsigned int core_irq = irq_desc_get_irq(desc);
|
||||
|
|
|
|||
|
|
@ -252,10 +252,10 @@
|
|||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-max-microvolt = <1378000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -98,13 +98,6 @@
|
|||
pinctrl-0 = <&extcon_usb1_pins>;
|
||||
};
|
||||
|
||||
extcon_usb2: extcon_usb2 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
id-gpio = <&gpio7 24 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&extcon_usb2_pins>;
|
||||
};
|
||||
|
||||
hdmi0: connector {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
|
@ -326,12 +319,6 @@
|
|||
>;
|
||||
};
|
||||
|
||||
extcon_usb2_pins: extcon_usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
||||
|
|
@ -432,7 +419,7 @@
|
|||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHY */
|
||||
/* VDDA_1V8_PHYA */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
|
@ -440,6 +427,15 @@
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* VDDA_1V8_PHYB */
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
|
|
@ -495,6 +491,14 @@
|
|||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
extcon_usb2: tps659038_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
ti,enable-vbus-detection;
|
||||
ti,enable-id-detection;
|
||||
id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
tmp102: tmp102@48 {
|
||||
|
|
@ -517,7 +521,8 @@
|
|||
mcp_rtc: rtc@6f {
|
||||
compatible = "microchip,mcp7941x";
|
||||
reg = <0x6f>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>; /* IRQ_SYS_1N */
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&dra7_pmx_core 0x424>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcp79410_pins_default>;
|
||||
|
|
@ -579,7 +584,6 @@
|
|||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
vmmc_aux-supply = <&vdd_3v3>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
|
@ -623,6 +627,14 @@
|
|||
};
|
||||
|
||||
&usb2 {
|
||||
/*
|
||||
* Stand alone usage is peripheral only.
|
||||
* However, with some resistor modifications
|
||||
* this port can be used via expansion connectors
|
||||
* as "host" or "dual-role". If so, provide
|
||||
* the necessary dr_mode override in the expansion
|
||||
* board's DT.
|
||||
*/
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
|
|
@ -681,7 +693,7 @@
|
|||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&ldo3_reg>;
|
||||
vdda-supply = <&ldo4_reg>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_pins>;
|
||||
|
|
|
|||
|
|
@ -19,10 +19,10 @@
|
|||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "mii";
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "mii";
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
#include "dm814x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "DM8148 EVM";
|
||||
model = "HP t410 Smart Zero Client";
|
||||
compatible = "hp,t410", "ti,dm8148";
|
||||
|
||||
memory {
|
||||
|
|
@ -19,10 +19,10 @@
|
|||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "mii";
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "mii";
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -181,9 +181,9 @@
|
|||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
control: control@160000 {
|
||||
control: control@140000 {
|
||||
compatible = "ti,dm814-scm", "simple-bus";
|
||||
reg = <0x160000 0x16d000>;
|
||||
reg = <0x140000 0x16d000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x160000 0x16d000>;
|
||||
|
|
@ -321,9 +321,9 @@
|
|||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
phy_sel: cpsw-phy-sel@0x48160650 {
|
||||
phy_sel: cpsw-phy-sel@48140650 {
|
||||
compatible = "ti,am3352-cpsw-phy-sel";
|
||||
reg= <0x48160650 0x4>;
|
||||
reg= <0x48140650 0x4>;
|
||||
reg-names = "gmii-sel";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -120,9 +120,10 @@
|
|||
reg = <0x0 0x1400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0x1400>;
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap";
|
||||
compatible = "ti,pbias-dra7", "ti,pbias-omap";
|
||||
reg = <0xe00 0x4>;
|
||||
syscon = <&scm_conf>;
|
||||
pbias_mmc_reg: pbias_mmc_omap5 {
|
||||
|
|
@ -1417,7 +1418,7 @@
|
|||
ti,irqs-safe-map = <0>;
|
||||
};
|
||||
|
||||
mac: ethernet@4a100000 {
|
||||
mac: ethernet@48484000 {
|
||||
compatible = "ti,dra7-cpsw","ti,cpsw";
|
||||
ti,hwmods = "gmac";
|
||||
clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
|
||||
|
|
|
|||
|
|
@ -56,6 +56,7 @@
|
|||
reg = <0x270 0x240>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x270 0x240>;
|
||||
|
||||
scm_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -63,7 +64,7 @@
|
|||
};
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap";
|
||||
compatible = "ti,pbias-omap2", "ti,pbias-omap";
|
||||
reg = <0x230 0x4>;
|
||||
syscon = <&scm_conf>;
|
||||
pbias_mmc_reg: pbias_mmc_omap2430 {
|
||||
|
|
|
|||
|
|
@ -202,7 +202,7 @@
|
|||
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -78,12 +78,6 @@
|
|||
>;
|
||||
};
|
||||
|
||||
smsc9221_pins: pinmux_smsc9221_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
|
|
|
|||
|
|
@ -156,6 +156,12 @@
|
|||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc9221_pins: pinmux_smsc9221_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
|
|||
|
|
@ -113,10 +113,22 @@
|
|||
};
|
||||
|
||||
scm_conf: scm_conf@270 {
|
||||
compatible = "syscon";
|
||||
compatible = "syscon", "simple-bus";
|
||||
reg = <0x270 0x330>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x270 0x330>;
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap3", "ti,pbias-omap";
|
||||
reg = <0x2b0 0x4>;
|
||||
syscon = <&scm_conf>;
|
||||
pbias_mmc_reg: pbias_mmc_omap2430 {
|
||||
regulator-name = "pbias_mmc_omap2430";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
scm_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -202,17 +214,6 @@
|
|||
dma-requests = <96>;
|
||||
};
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap";
|
||||
reg = <0x2b0 0x4>;
|
||||
syscon = <&scm_conf>;
|
||||
pbias_mmc_reg: pbias_mmc_omap2430 {
|
||||
regulator-name = "pbias_mmc_omap2430";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1: gpio@48310000 {
|
||||
compatible = "ti,omap3-gpio";
|
||||
reg = <0x48310000 0x200>;
|
||||
|
|
|
|||
|
|
@ -196,9 +196,10 @@
|
|||
reg = <0x5a0 0x170>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x5a0 0x170>;
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap";
|
||||
compatible = "ti,pbias-omap4", "ti,pbias-omap";
|
||||
reg = <0x60 0x4>;
|
||||
syscon = <&omap4_padconf_global>;
|
||||
pbias_mmc_reg: pbias_mmc_omap4 {
|
||||
|
|
|
|||
|
|
@ -174,8 +174,8 @@
|
|||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
|
||||
0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
|
||||
0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -185,9 +185,10 @@
|
|||
reg = <0x5a0 0xec>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x5a0 0xec>;
|
||||
|
||||
pbias_regulator: pbias_regulator {
|
||||
compatible = "ti,pbias-omap";
|
||||
compatible = "ti,pbias-omap5", "ti,pbias-omap";
|
||||
reg = <0x60 0x4>;
|
||||
syscon = <&omap5_padconf_global>;
|
||||
pbias_mmc_reg: pbias_mmc_omap5 {
|
||||
|
|
|
|||
|
|
@ -158,6 +158,7 @@
|
|||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -103,48 +103,46 @@
|
|||
<&clk_s_d0_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 0>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
sti-hdmi@8d04000 {
|
||||
compatible = "st,stih407-hdmi";
|
||||
reg = <0x8d04000 0x1000>;
|
||||
reg-names = "hdmi-reg";
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "irq";
|
||||
clock-names = "pix",
|
||||
"tmds",
|
||||
"phy",
|
||||
"audio",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
sti-hdmi@8d04000 {
|
||||
compatible = "st,stih407-hdmi";
|
||||
reg = <0x8d04000 0x1000>;
|
||||
reg-names = "hdmi-reg";
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "irq";
|
||||
clock-names = "pix",
|
||||
"tmds",
|
||||
"phy",
|
||||
"audio",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
|
||||
<&clk_s_d0_flexgen CLK_PCM_0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
|
||||
<&clk_s_d0_flexgen CLK_PCM_0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
|
||||
hdmi,hpd-gpio = <&pio5 3>;
|
||||
reset-names = "hdmi";
|
||||
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
|
||||
ddc = <&hdmiddc>;
|
||||
hdmi,hpd-gpio = <&pio5 3>;
|
||||
reset-names = "hdmi";
|
||||
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
|
||||
ddc = <&hdmiddc>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sti-hda@8d02000 {
|
||||
compatible = "st,stih407-hda";
|
||||
reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
|
||||
reg-names = "hda-reg", "video-dacs-ctrl";
|
||||
clock-names = "pix",
|
||||
"hddac",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
|
||||
<&clk_s_d2_flexgen CLK_HDDAC>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
};
|
||||
sti-hda@8d02000 {
|
||||
compatible = "st,stih407-hda";
|
||||
reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
|
||||
reg-names = "hda-reg", "video-dacs-ctrl";
|
||||
clock-names = "pix",
|
||||
"hddac",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
|
||||
<&clk_s_d2_flexgen CLK_HDDAC>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -178,48 +178,46 @@
|
|||
<&clk_s_d0_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 0>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
sti-hdmi@8d04000 {
|
||||
compatible = "st,stih407-hdmi";
|
||||
reg = <0x8d04000 0x1000>;
|
||||
reg-names = "hdmi-reg";
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "irq";
|
||||
clock-names = "pix",
|
||||
"tmds",
|
||||
"phy",
|
||||
"audio",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
sti-hdmi@8d04000 {
|
||||
compatible = "st,stih407-hdmi";
|
||||
reg = <0x8d04000 0x1000>;
|
||||
reg-names = "hdmi-reg";
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "irq";
|
||||
clock-names = "pix",
|
||||
"tmds",
|
||||
"phy",
|
||||
"audio",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
|
||||
<&clk_s_d0_flexgen CLK_PCM_0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
|
||||
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
|
||||
<&clk_s_d0_flexgen CLK_PCM_0>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
|
||||
hdmi,hpd-gpio = <&pio5 3>;
|
||||
reset-names = "hdmi";
|
||||
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
|
||||
ddc = <&hdmiddc>;
|
||||
hdmi,hpd-gpio = <&pio5 3>;
|
||||
reset-names = "hdmi";
|
||||
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
|
||||
ddc = <&hdmiddc>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sti-hda@8d02000 {
|
||||
compatible = "st,stih407-hda";
|
||||
reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
|
||||
reg-names = "hda-reg", "video-dacs-ctrl";
|
||||
clock-names = "pix",
|
||||
"hddac",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
|
||||
<&clk_s_d2_flexgen CLK_HDDAC>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
};
|
||||
sti-hda@8d02000 {
|
||||
compatible = "st,stih407-hda";
|
||||
reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
|
||||
reg-names = "hda-reg", "video-dacs-ctrl";
|
||||
clock-names = "pix",
|
||||
"hddac",
|
||||
"main_parent",
|
||||
"aux_parent";
|
||||
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
|
||||
<&clk_s_d2_flexgen CLK_HDDAC>,
|
||||
<&clk_s_d2_quadfs 0>,
|
||||
<&clk_s_d2_quadfs 1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ void it8152_init_irq(void)
|
|||
}
|
||||
}
|
||||
|
||||
void it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
void it8152_irq_demux(struct irq_desc *desc)
|
||||
{
|
||||
int bits_pd, bits_lp, bits_ld;
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@ static struct locomo_dev_info locomo_devices[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static void locomo_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void locomo_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct locomo *lchip = irq_desc_get_chip_data(desc);
|
||||
int req, i;
|
||||
|
|
|
|||
|
|
@ -196,10 +196,8 @@ static struct sa1111_dev_info sa1111_devices[] = {
|
|||
* active IRQs causes the interrupt output to pulse, the upper levels
|
||||
* will call us again if there are more interrupts to process.
|
||||
*/
|
||||
static void
|
||||
sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void sa1111_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq = irq_desc_get_irq(desc);
|
||||
unsigned int stat0, stat1, i;
|
||||
struct sa1111 *sachip = irq_desc_get_handler_data(desc);
|
||||
void __iomem *mapbase = sachip->base + SA1111_INTC;
|
||||
|
|
@ -214,7 +212,7 @@ sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
|||
sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
|
||||
|
||||
if (stat0 == 0 && stat1 == 0) {
|
||||
do_bad_IRQ(irq, desc);
|
||||
do_bad_IRQ(desc);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -240,7 +240,8 @@ CONFIG_SSI_PROTOCOL=m
|
|||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_PCF857X=m
|
||||
CONFIG_GPIO_PCA953X=m
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_GPIO_TWL4030=y
|
||||
CONFIG_GPIO_PALMAS=y
|
||||
CONFIG_W1=m
|
||||
|
|
@ -350,6 +351,8 @@ CONFIG_USB_MUSB_HDRC=m
|
|||
CONFIG_USB_MUSB_OMAP2PLUS=m
|
||||
CONFIG_USB_MUSB_AM35X=m
|
||||
CONFIG_USB_MUSB_DSPS=m
|
||||
CONFIG_USB_INVENTRA_DMA=y
|
||||
CONFIG_USB_TI_CPPI41_DMA=y
|
||||
CONFIG_USB_DWC3=m
|
||||
CONFIG_USB_TEST=m
|
||||
CONFIG_AM335X_PHY_USB=y
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ extern void __iomem *it8152_base_address;
|
|||
struct pci_dev;
|
||||
struct pci_sys_data;
|
||||
|
||||
extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
|
||||
extern void it8152_irq_demux(struct irq_desc *desc);
|
||||
extern void it8152_init_irq(void);
|
||||
extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
|
||||
extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
|
||||
|
|
|
|||
|
|
@ -11,12 +11,6 @@ static inline void ack_bad_irq(int irq)
|
|||
pr_crit("unexpected IRQ trap at vector %02x\n", irq);
|
||||
}
|
||||
|
||||
void set_irq_flags(unsigned int irq, unsigned int flags);
|
||||
|
||||
#define IRQF_VALID (1 << 0)
|
||||
#define IRQF_PROBE (1 << 1)
|
||||
#define IRQF_NOAUTOEN (1 << 2)
|
||||
|
||||
#define ARCH_IRQ_INIT_FLAGS (IRQ_NOREQUEST | IRQ_NOPROBE)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -29,21 +29,18 @@
|
|||
|
||||
#define __KVM_HAVE_ARCH_INTC_INITIALIZED
|
||||
|
||||
#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
|
||||
#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
|
||||
#else
|
||||
#define KVM_MAX_VCPUS 0
|
||||
#endif
|
||||
|
||||
#define KVM_USER_MEM_SLOTS 32
|
||||
#define KVM_PRIVATE_MEM_SLOTS 4
|
||||
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
|
||||
#define KVM_HAVE_ONE_REG
|
||||
#define KVM_HALT_POLL_NS_DEFAULT 500000
|
||||
|
||||
#define KVM_VCPU_MAX_FEATURES 2
|
||||
|
||||
#include <kvm/arm_vgic.h>
|
||||
|
||||
#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
|
||||
|
||||
u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
|
||||
int __attribute_const__ kvm_target_cpu(void);
|
||||
int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
|
||||
|
|
@ -148,6 +145,7 @@ struct kvm_vm_stat {
|
|||
|
||||
struct kvm_vcpu_stat {
|
||||
u32 halt_successful_poll;
|
||||
u32 halt_attempted_poll;
|
||||
u32 halt_wakeup;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -23,10 +23,10 @@ extern int show_fiq_list(struct seq_file *, int);
|
|||
/*
|
||||
* This is for easy migration, but should be changed in the source
|
||||
*/
|
||||
#define do_bad_IRQ(irq,desc) \
|
||||
#define do_bad_IRQ(desc) \
|
||||
do { \
|
||||
raw_spin_lock(&desc->lock); \
|
||||
handle_bad_irq(irq, desc); \
|
||||
handle_bad_irq(desc); \
|
||||
raw_spin_unlock(&desc->lock); \
|
||||
} while(0)
|
||||
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
* This may need to be greater than __NR_last_syscall+1 in order to
|
||||
* account for the padding in the syscall table
|
||||
*/
|
||||
#define __NR_syscalls (388)
|
||||
#define __NR_syscalls (392)
|
||||
|
||||
/*
|
||||
* *NOTE*: This is a ghost syscall private to the kernel. Only the
|
||||
|
|
|
|||
|
|
@ -414,6 +414,8 @@
|
|||
#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
|
||||
#define __NR_bpf (__NR_SYSCALL_BASE+386)
|
||||
#define __NR_execveat (__NR_SYSCALL_BASE+387)
|
||||
#define __NR_userfaultfd (__NR_SYSCALL_BASE+388)
|
||||
#define __NR_membarrier (__NR_SYSCALL_BASE+389)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
|||
|
|
@ -397,6 +397,8 @@
|
|||
/* 385 */ CALL(sys_memfd_create)
|
||||
CALL(sys_bpf)
|
||||
CALL(sys_execveat)
|
||||
CALL(sys_userfaultfd)
|
||||
CALL(sys_membarrier)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
|||
|
|
@ -79,26 +79,6 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
|
|||
handle_IRQ(irq, regs);
|
||||
}
|
||||
|
||||
void set_irq_flags(unsigned int irq, unsigned int iflags)
|
||||
{
|
||||
unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
|
||||
|
||||
if (irq >= nr_irqs) {
|
||||
pr_err("Trying to set irq flags for IRQ%d\n", irq);
|
||||
return;
|
||||
}
|
||||
|
||||
if (iflags & IRQF_VALID)
|
||||
clr |= IRQ_NOREQUEST;
|
||||
if (iflags & IRQF_PROBE)
|
||||
clr |= IRQ_NOPROBE;
|
||||
if (!(iflags & IRQF_NOAUTOEN))
|
||||
clr |= IRQ_NOAUTOEN;
|
||||
/* Order is clear bits in "clr" then set bits in "set" */
|
||||
irq_modify_status(irq, clr, set & ~clr);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(set_irq_flags);
|
||||
|
||||
void __init init_IRQ(void)
|
||||
{
|
||||
int ret;
|
||||
|
|
|
|||
|
|
@ -259,15 +259,17 @@ int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
patch_text((void *)bpt->bpt_addr,
|
||||
*(unsigned int *)arch_kgdb_ops.gdb_bpt_instr);
|
||||
/* Machine is already stopped, so we can use __patch_text() directly */
|
||||
__patch_text((void *)bpt->bpt_addr,
|
||||
*(unsigned int *)arch_kgdb_ops.gdb_bpt_instr);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt)
|
||||
{
|
||||
patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr);
|
||||
/* Machine is already stopped, so we can use __patch_text() directly */
|
||||
__patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -343,15 +343,18 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
|
|||
*/
|
||||
thumb = handler & 1;
|
||||
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
/*
|
||||
* Clear the If-Then Thumb-2 execution state
|
||||
* ARM spec requires this to be all 000s in ARM mode
|
||||
* Snapdragon S4/Krait misbehaves on a Thumb=>ARM
|
||||
* signal transition without this.
|
||||
* Clear the If-Then Thumb-2 execution state. ARM spec
|
||||
* requires this to be all 000s in ARM mode. Snapdragon
|
||||
* S4/Krait misbehaves on a Thumb=>ARM signal transition
|
||||
* without this.
|
||||
*
|
||||
* We must do this whenever we are running on a Thumb-2
|
||||
* capable CPU, which includes ARMv6T2. However, we elect
|
||||
* to always do this to simplify the code; this field is
|
||||
* marked UNK/SBZP for older architectures.
|
||||
*/
|
||||
cpsr &= ~PSR_IT_MASK;
|
||||
#endif
|
||||
|
||||
if (thumb) {
|
||||
cpsr |= PSR_T_BIT;
|
||||
|
|
|
|||
|
|
@ -45,15 +45,4 @@ config KVM_ARM_HOST
|
|||
---help---
|
||||
Provides host support for ARM processors.
|
||||
|
||||
config KVM_ARM_MAX_VCPUS
|
||||
int "Number maximum supported virtual CPUs per VM"
|
||||
depends on KVM_ARM_HOST
|
||||
default 4
|
||||
help
|
||||
Static number of max supported virtual CPUs per VM.
|
||||
|
||||
If you choose a high number, the vcpu structures will be quite
|
||||
large, so only choose a reasonable number that you expect to
|
||||
actually use.
|
||||
|
||||
endif # VIRTUALIZATION
|
||||
|
|
|
|||
|
|
@ -446,7 +446,7 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
|
|||
* Map the VGIC hardware resources before running a vcpu the first
|
||||
* time on this VM.
|
||||
*/
|
||||
if (unlikely(!vgic_ready(kvm))) {
|
||||
if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
|
||||
ret = kvm_vgic_map_resources(kvm);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -515,8 +515,7 @@ ARM_BE8(rev r6, r6 )
|
|||
|
||||
mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
|
||||
str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
|
||||
bic r2, #1 @ Clear ENABLE
|
||||
mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
|
||||
|
||||
isb
|
||||
|
||||
mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
|
||||
|
|
@ -529,6 +528,9 @@ ARM_BE8(rev r6, r6 )
|
|||
mcrr p15, 4, r2, r2, c14 @ CNTVOFF
|
||||
|
||||
1:
|
||||
mov r2, #0 @ Clear ENABLE
|
||||
mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
|
||||
|
||||
@ Allow physical timer/counter access for the host
|
||||
mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
|
||||
orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
|
||||
|
|
|
|||
|
|
@ -1792,8 +1792,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|||
if (vma->vm_flags & VM_PFNMAP) {
|
||||
gpa_t gpa = mem->guest_phys_addr +
|
||||
(vm_start - mem->userspace_addr);
|
||||
phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +
|
||||
vm_start - vma->vm_start;
|
||||
phys_addr_t pa;
|
||||
|
||||
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
|
||||
pa += vm_start - vma->vm_start;
|
||||
|
||||
/* IO region dirty page logging not allowed */
|
||||
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
|
||||
|
|
|
|||
|
|
@ -126,7 +126,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
|||
|
||||
static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
int i;
|
||||
int i, matching_cpus = 0;
|
||||
unsigned long mpidr;
|
||||
unsigned long target_affinity;
|
||||
unsigned long target_affinity_mask;
|
||||
|
|
@ -151,12 +151,16 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
|
|||
*/
|
||||
kvm_for_each_vcpu(i, tmp, kvm) {
|
||||
mpidr = kvm_vcpu_get_mpidr_aff(tmp);
|
||||
if (((mpidr & target_affinity_mask) == target_affinity) &&
|
||||
!tmp->arch.pause) {
|
||||
return PSCI_0_2_AFFINITY_LEVEL_ON;
|
||||
if ((mpidr & target_affinity_mask) == target_affinity) {
|
||||
matching_cpus++;
|
||||
if (!tmp->arch.pause)
|
||||
return PSCI_0_2_AFFINITY_LEVEL_ON;
|
||||
}
|
||||
}
|
||||
|
||||
if (!matching_cpus)
|
||||
return PSCI_RET_INVALID_PARAMS;
|
||||
|
||||
return PSCI_0_2_AFFINITY_LEVEL_OFF;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -69,14 +69,14 @@ static struct irq_chip pmu_irq_chip = {
|
|||
.irq_ack = pmu_irq_ack,
|
||||
};
|
||||
|
||||
static void pmu_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void pmu_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq = irq_desc_get_irq(desc);
|
||||
unsigned long cause = readl(PMU_INTERRUPT_CAUSE);
|
||||
unsigned int irq;
|
||||
|
||||
cause &= readl(PMU_INTERRUPT_MASK);
|
||||
if (cause == 0) {
|
||||
do_bad_IRQ(irq, desc);
|
||||
do_bad_IRQ(desc);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -87,13 +87,12 @@ static struct irq_chip isa_hi_chip = {
|
|||
.irq_unmask = isa_unmask_pic_hi_irq,
|
||||
};
|
||||
|
||||
static void
|
||||
isa_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void isa_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE;
|
||||
|
||||
if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) {
|
||||
do_bad_IRQ(isa_irq, desc);
|
||||
do_bad_IRQ(desc);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -126,7 +126,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void gpio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int port = (unsigned int)irq_desc_get_handler_data(desc);
|
||||
unsigned int gpio_irq_no, irq_stat;
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ static struct platform_device smsc_lan9217_device = {
|
|||
.resource = smsc911x_resources,
|
||||
};
|
||||
|
||||
static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
|
||||
static void mxc_expio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
u32 imr_val;
|
||||
u32 int_valid;
|
||||
|
|
|
|||
|
|
@ -154,7 +154,7 @@ static inline void mxc_init_imx_uart(void)
|
|||
imx31_add_imx_uart0(&uart_pdata);
|
||||
}
|
||||
|
||||
static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
|
||||
static void mx31ads_expio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
u32 imr_val;
|
||||
u32 int_valid;
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ static void (*write_imipr[])(u32) = {
|
|||
write_imipr_3,
|
||||
};
|
||||
|
||||
static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void iop13xx_msi_handler(struct irq_desc *desc)
|
||||
{
|
||||
int i, j;
|
||||
unsigned long status;
|
||||
|
|
|
|||
|
|
@ -370,7 +370,7 @@ static struct irq_chip lpc32xx_irq_chip = {
|
|||
.irq_set_wake = lpc32xx_irq_wake
|
||||
};
|
||||
|
||||
static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void lpc32xx_sic1_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC1_BASE));
|
||||
|
||||
|
|
@ -383,7 +383,7 @@ static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
|
|||
}
|
||||
}
|
||||
|
||||
static void lpc32xx_sic2_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void lpc32xx_sic2_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC2_BASE));
|
||||
|
||||
|
|
|
|||
|
|
@ -69,8 +69,7 @@ static struct platform_device *devices[] __initdata = {
|
|||
#define DEBUG_IRQ(fmt...) while (0) {}
|
||||
#endif
|
||||
|
||||
static void
|
||||
netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
|
||||
static void netx_hif_demux_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
|
||||
unsigned int stat;
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ static void fpga_mask_ack_irq(struct irq_data *d)
|
|||
fpga_ack_irq(d);
|
||||
}
|
||||
|
||||
static void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
|
||||
static void innovator_fpga_IRQ_demux(struct irq_desc *desc)
|
||||
{
|
||||
u32 stat;
|
||||
int fpga_irq;
|
||||
|
|
|
|||
|
|
@ -44,10 +44,11 @@ config SOC_OMAP5
|
|||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_GIC
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_TWD if SMP
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select ARM_ERRATA_798181 if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
select OMAP_INTERCONNECT_BARRIER
|
||||
select PM_OPP if PM
|
||||
|
||||
config SOC_AM33XX
|
||||
bool "TI AM33XX"
|
||||
|
|
@ -70,10 +71,13 @@ config SOC_DRA7XX
|
|||
select ARCH_OMAP2PLUS
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_GIC
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select IRQ_CROSSBAR
|
||||
select ARM_ERRATA_798181 if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
select OMAP_INTERCONNECT_BARRIER
|
||||
select PM_OPP if PM
|
||||
|
||||
config ARCH_OMAP2PLUS
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -20,13 +20,6 @@
|
|||
|
||||
#include "common.h"
|
||||
|
||||
#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
|
||||
#define intc_of_init NULL
|
||||
#endif
|
||||
#ifndef CONFIG_ARCH_OMAP4
|
||||
#define gic_of_init NULL
|
||||
#endif
|
||||
|
||||
static const struct of_device_id omap_dt_match_table[] __initconst = {
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .compatible = "ti,omap-infra", },
|
||||
|
|
|
|||
|
|
@ -653,8 +653,12 @@ void __init dra7xxx_check_revision(void)
|
|||
omap_revision = DRA752_REV_ES1_0;
|
||||
break;
|
||||
case 1:
|
||||
default:
|
||||
omap_revision = DRA752_REV_ES1_1;
|
||||
break;
|
||||
case 2:
|
||||
default:
|
||||
omap_revision = DRA752_REV_ES2_0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -674,7 +678,7 @@ void __init dra7xxx_check_revision(void)
|
|||
/* Unknown default to latest silicon rev as default*/
|
||||
pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n",
|
||||
__func__, idcode, hawkeye, rev);
|
||||
omap_revision = DRA752_REV_ES1_1;
|
||||
omap_revision = DRA752_REV_ES2_0;
|
||||
}
|
||||
|
||||
sprintf(soc_name, "DRA%03x", omap_rev() >> 16);
|
||||
|
|
|
|||
|
|
@ -676,6 +676,7 @@ void __init am43xx_init_early(void)
|
|||
void __init am43xx_init_late(void)
|
||||
{
|
||||
omap_common_late_init();
|
||||
omap2_clk_enable_autoidle_all();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -901,7 +901,8 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
|
|||
if (od->hwmods[i]->flags & HWMOD_INIT_NO_IDLE)
|
||||
return 0;
|
||||
|
||||
if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER) {
|
||||
if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER &&
|
||||
od->_driver_status != BUS_NOTIFY_BIND_DRIVER) {
|
||||
if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
|
||||
dev_warn(dev, "%s: enabled but no driver. Idling\n",
|
||||
__func__);
|
||||
|
|
|
|||
|
|
@ -103,7 +103,8 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { }
|
|||
#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
|
||||
#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1)
|
||||
|
||||
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
|
||||
#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
|
||||
defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
|
||||
extern u16 pm44xx_errata;
|
||||
#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static void omap_prcm_events_filter_priority(unsigned long *events,
|
|||
* dispatched accordingly. Clearing of the wakeup events should be
|
||||
* done by the SoC specific individual handlers.
|
||||
*/
|
||||
static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void omap_prcm_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
|
||||
unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
|
||||
|
|
|
|||
|
|
@ -469,6 +469,8 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
#define DRA7XX_CLASS 0x07000000
|
||||
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
|
||||
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
|
||||
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
|
||||
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
|
||||
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
|
||||
|
||||
void omap2xxx_check_revision(void);
|
||||
|
|
|
|||
|
|
@ -297,12 +297,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
|||
if (IS_ERR(src))
|
||||
return PTR_ERR(src);
|
||||
|
||||
r = clk_set_parent(timer->fclk, src);
|
||||
if (r < 0) {
|
||||
pr_warn("%s: %s cannot set source\n", __func__, oh->name);
|
||||
clk_put(src);
|
||||
return r;
|
||||
}
|
||||
WARN(clk_set_parent(timer->fclk, src) < 0,
|
||||
"Cannot set timer parent clock, no PLL clock driver?");
|
||||
|
||||
clk_put(src);
|
||||
|
||||
|
|
|
|||
|
|
@ -300,7 +300,7 @@ static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
|
|||
|
||||
val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET);
|
||||
if (!(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL) ||
|
||||
(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL)) {
|
||||
(val & OMAP3430_PRM_POLCTRL_OFFMODE_POL)) {
|
||||
val |= OMAP3430_PRM_POLCTRL_CLKREQ_POL;
|
||||
val &= ~OMAP3430_PRM_POLCTRL_OFFMODE_POL;
|
||||
pr_debug("PM: fixing sys_clkreq and sys_off_mode polarity to 0x%x\n",
|
||||
|
|
|
|||
|
|
@ -496,13 +496,13 @@ static struct irq_chip balloon3_irq_chip = {
|
|||
.irq_unmask = balloon3_unmask_irq,
|
||||
};
|
||||
|
||||
static void balloon3_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void balloon3_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
|
||||
balloon3_irq_enabled;
|
||||
do {
|
||||
struct irq_data *d = irq_desc_get_irq_data(desc);
|
||||
struct irq_chip *chip = irq_data_get_chip(d);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
unsigned int irq;
|
||||
|
||||
/* clear useless edge notification */
|
||||
|
|
|
|||
|
|
@ -29,13 +29,12 @@
|
|||
void __iomem *it8152_base_address;
|
||||
static int cmx2xx_it8152_irq_gpio;
|
||||
|
||||
static void cmx2xx_it8152_irq_demux(unsigned int __irq, struct irq_desc *desc)
|
||||
static void cmx2xx_it8152_irq_demux(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq = irq_desc_get_irq(desc);
|
||||
/* clear our parent irq */
|
||||
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
||||
|
||||
it8152_irq_demux(irq, desc);
|
||||
it8152_irq_demux(desc);
|
||||
}
|
||||
|
||||
void __cmx2xx_pci_init_irq(int irq_gpio)
|
||||
|
|
|
|||
|
|
@ -43,6 +43,13 @@
|
|||
* 0xf6200000..0xf6201000
|
||||
*/
|
||||
|
||||
/*
|
||||
* DFI Bus for NAND, PXA3xx only
|
||||
*/
|
||||
#define NAND_PHYS 0x43100000
|
||||
#define NAND_VIRT IOMEM(0xf6300000)
|
||||
#define NAND_SIZE 0x00100000
|
||||
|
||||
/*
|
||||
* Internal Memory Controller (PXA27x and later)
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -120,7 +120,7 @@ static struct irq_chip lpd270_irq_chip = {
|
|||
.irq_unmask = lpd270_unmask_irq,
|
||||
};
|
||||
|
||||
static void lpd270_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void lpd270_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq;
|
||||
unsigned long pending;
|
||||
|
|
|
|||
|
|
@ -284,7 +284,7 @@ static struct irq_chip pcm990_irq_chip = {
|
|||
.irq_unmask = pcm990_unmask_irq,
|
||||
};
|
||||
|
||||
static void pcm990_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void pcm990_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq;
|
||||
unsigned long pending;
|
||||
|
|
|
|||
|
|
@ -47,6 +47,13 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));
|
|||
#define ISRAM_START 0x5c000000
|
||||
#define ISRAM_SIZE SZ_256K
|
||||
|
||||
/*
|
||||
* NAND NFC: DFI bus arbitration subset
|
||||
*/
|
||||
#define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0))
|
||||
#define NDCR_ND_ARB_EN (1 << 12)
|
||||
#define NDCR_ND_ARB_CNTL (1 << 19)
|
||||
|
||||
static void __iomem *sram;
|
||||
static unsigned long wakeup_src;
|
||||
|
||||
|
|
@ -362,7 +369,12 @@ static struct map_desc pxa3xx_io_desc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
|
||||
.length = SMEMC_SIZE,
|
||||
.type = MT_DEVICE
|
||||
}
|
||||
}, {
|
||||
.virtual = (unsigned long)NAND_VIRT,
|
||||
.pfn = __phys_to_pfn(NAND_PHYS),
|
||||
.length = NAND_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
void __init pxa3xx_map_io(void)
|
||||
|
|
@ -419,6 +431,13 @@ static int __init pxa3xx_init(void)
|
|||
*/
|
||||
ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
|
||||
|
||||
/*
|
||||
* Disable DFI bus arbitration, to prevent a system bus lock if
|
||||
* somebody disables the NAND clock (unused clock) while this
|
||||
* bit remains set.
|
||||
*/
|
||||
NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL;
|
||||
|
||||
if ((ret = pxa_init_dma(IRQ_DMA, 32)))
|
||||
return ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -276,7 +276,7 @@ static inline unsigned long viper_irq_pending(void)
|
|||
viper_irq_enabled_mask;
|
||||
}
|
||||
|
||||
static void viper_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void viper_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq;
|
||||
unsigned long pending;
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ static inline unsigned long zeus_irq_pending(void)
|
|||
return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
|
||||
}
|
||||
|
||||
static void zeus_irq_handler(unsigned int __irq, struct irq_desc *desc)
|
||||
static void zeus_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int irq;
|
||||
unsigned long pending;
|
||||
|
|
|
|||
|
|
@ -551,8 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc)
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void ecard_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
ecard_t *ec;
|
||||
int called = 0;
|
||||
|
|
|
|||
|
|
@ -100,9 +100,7 @@ static struct irq_chip bast_pc104_chip = {
|
|||
.irq_ack = bast_pc104_maskack
|
||||
};
|
||||
|
||||
static void
|
||||
bast_irq_pc104_demux(unsigned int irq,
|
||||
struct irq_desc *desc)
|
||||
static void bast_irq_pc104_demux(struct irq_desc *desc)
|
||||
{
|
||||
unsigned int stat;
|
||||
unsigned int irqno;
|
||||
|
|
|
|||
|
|
@ -388,22 +388,22 @@ static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
|
|||
}
|
||||
}
|
||||
|
||||
static void s3c_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
|
||||
static void s3c_irq_demux_eint0_3(struct irq_desc *desc)
|
||||
{
|
||||
s3c_irq_demux_eint(0, 3);
|
||||
}
|
||||
|
||||
static void s3c_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
|
||||
static void s3c_irq_demux_eint4_11(struct irq_desc *desc)
|
||||
{
|
||||
s3c_irq_demux_eint(4, 11);
|
||||
}
|
||||
|
||||
static void s3c_irq_demux_eint12_19(unsigned int irq, struct irq_desc *desc)
|
||||
static void s3c_irq_demux_eint12_19(struct irq_desc *desc)
|
||||
{
|
||||
s3c_irq_demux_eint(12, 19);
|
||||
}
|
||||
|
||||
static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
|
||||
static void s3c_irq_demux_eint20_27(struct irq_desc *desc)
|
||||
{
|
||||
s3c_irq_demux_eint(20, 27);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -166,7 +166,7 @@ static struct sa1100_port_fns neponset_port_fns = {
|
|||
* ensure that the IRQ signal is deasserted before returning. This
|
||||
* is rather unfortunate.
|
||||
*/
|
||||
static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
static void neponset_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
|
||||
unsigned int irr;
|
||||
|
|
|
|||
|
|
@ -365,15 +365,21 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
|
|||
user:
|
||||
if (LDST_L_BIT(instr)) {
|
||||
unsigned long val;
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
|
||||
get16t_unaligned_check(val, addr);
|
||||
uaccess_restore(__ua_flags);
|
||||
|
||||
/* signed half-word? */
|
||||
if (instr & 0x40)
|
||||
val = (signed long)((signed short) val);
|
||||
|
||||
regs->uregs[rd] = val;
|
||||
} else
|
||||
} else {
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
put16t_unaligned_check(regs->uregs[rd], addr);
|
||||
uaccess_restore(__ua_flags);
|
||||
}
|
||||
|
||||
return TYPE_LDST;
|
||||
|
||||
|
|
@ -420,14 +426,21 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
|
|||
|
||||
user:
|
||||
if (load) {
|
||||
unsigned long val;
|
||||
unsigned long val, val2;
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
|
||||
get32t_unaligned_check(val, addr);
|
||||
get32t_unaligned_check(val2, addr + 4);
|
||||
|
||||
uaccess_restore(__ua_flags);
|
||||
|
||||
regs->uregs[rd] = val;
|
||||
get32t_unaligned_check(val, addr + 4);
|
||||
regs->uregs[rd2] = val;
|
||||
regs->uregs[rd2] = val2;
|
||||
} else {
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
put32t_unaligned_check(regs->uregs[rd], addr);
|
||||
put32t_unaligned_check(regs->uregs[rd2], addr + 4);
|
||||
uaccess_restore(__ua_flags);
|
||||
}
|
||||
|
||||
return TYPE_LDST;
|
||||
|
|
@ -458,10 +471,15 @@ do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *reg
|
|||
trans:
|
||||
if (LDST_L_BIT(instr)) {
|
||||
unsigned int val;
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
get32t_unaligned_check(val, addr);
|
||||
uaccess_restore(__ua_flags);
|
||||
regs->uregs[rd] = val;
|
||||
} else
|
||||
} else {
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
put32t_unaligned_check(regs->uregs[rd], addr);
|
||||
uaccess_restore(__ua_flags);
|
||||
}
|
||||
return TYPE_LDST;
|
||||
|
||||
fault:
|
||||
|
|
@ -531,6 +549,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
|
|||
#endif
|
||||
|
||||
if (user_mode(regs)) {
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
|
||||
regbits >>= 1, rd += 1)
|
||||
if (regbits & 1) {
|
||||
|
|
@ -542,6 +561,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
|
|||
put32t_unaligned_check(regs->uregs[rd], eaddr);
|
||||
eaddr += 4;
|
||||
}
|
||||
uaccess_restore(__ua_flags);
|
||||
} else {
|
||||
for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
|
||||
regbits >>= 1, rd += 1)
|
||||
|
|
|
|||
|
|
@ -1249,7 +1249,7 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
|
|||
struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
|
||||
unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
||||
dma_addr_t dma_addr, iova;
|
||||
int i, ret = DMA_ERROR_CODE;
|
||||
int i;
|
||||
|
||||
dma_addr = __alloc_iova(mapping, size);
|
||||
if (dma_addr == DMA_ERROR_CODE)
|
||||
|
|
@ -1257,6 +1257,8 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
|
|||
|
||||
iova = dma_addr;
|
||||
for (i = 0; i < count; ) {
|
||||
int ret;
|
||||
|
||||
unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
|
||||
phys_addr_t phys = page_to_phys(pages[i]);
|
||||
unsigned int len, j;
|
||||
|
|
|
|||
|
|
@ -407,7 +407,7 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void gpio_irq_handler(unsigned __irq, struct irq_desc *desc)
|
||||
static void gpio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct orion_gpio_chip *ochip = irq_desc_get_handler_data(desc);
|
||||
u32 cause, type;
|
||||
|
|
|
|||
|
|
@ -107,7 +107,6 @@ static const struct of_device_id pxa_ssp_of_ids[] = {
|
|||
{ .compatible = "mvrl,pxa168-ssp", .data = (void *) PXA168_SSP },
|
||||
{ .compatible = "mrvl,pxa910-ssp", .data = (void *) PXA910_SSP },
|
||||
{ .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP },
|
||||
{ .compatible = "mrvl,lpss-ssp", .data = (void *) LPSS_SSP },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids);
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@
|
|||
};
|
||||
|
||||
idle-states {
|
||||
entry-method = "arm,psci";
|
||||
entry-method = "psci";
|
||||
|
||||
CPU_SLEEP_0: cpu-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@
|
|||
};
|
||||
|
||||
idle-states {
|
||||
entry-method = "arm,psci";
|
||||
entry-method = "psci";
|
||||
|
||||
cpu_sleep: cpu-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
|
|
|
|||
|
|
@ -43,9 +43,4 @@ static inline void ack_bad_irq(unsigned int irq)
|
|||
irq_err_count++;
|
||||
}
|
||||
|
||||
/*
|
||||
* No arch-specific IRQ flags.
|
||||
*/
|
||||
#define set_irq_flags(irq, flags)
|
||||
|
||||
#endif /* __ASM_HARDIRQ_H */
|
||||
|
|
|
|||
|
|
@ -95,6 +95,7 @@
|
|||
SCTLR_EL2_SA | SCTLR_EL2_I)
|
||||
|
||||
/* TCR_EL2 Registers bits */
|
||||
#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
|
||||
#define TCR_EL2_TBI (1 << 20)
|
||||
#define TCR_EL2_PS (7 << 16)
|
||||
#define TCR_EL2_PS_40B (2 << 16)
|
||||
|
|
@ -106,9 +107,10 @@
|
|||
#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \
|
||||
TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ)
|
||||
|
||||
#define TCR_EL2_FLAGS (TCR_EL2_PS_40B)
|
||||
#define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B)
|
||||
|
||||
/* VTCR_EL2 Registers bits */
|
||||
#define VTCR_EL2_RES1 (1 << 31)
|
||||
#define VTCR_EL2_PS_MASK (7 << 16)
|
||||
#define VTCR_EL2_TG0_MASK (1 << 14)
|
||||
#define VTCR_EL2_TG0_4K (0 << 14)
|
||||
|
|
@ -147,7 +149,8 @@
|
|||
*/
|
||||
#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \
|
||||
VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
|
||||
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B)
|
||||
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
|
||||
VTCR_EL2_RES1)
|
||||
#define VTTBR_X (38 - VTCR_EL2_T0SZ_40B)
|
||||
#else
|
||||
/*
|
||||
|
|
@ -158,7 +161,8 @@
|
|||
*/
|
||||
#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \
|
||||
VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
|
||||
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B)
|
||||
VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
|
||||
VTCR_EL2_RES1)
|
||||
#define VTTBR_X (37 - VTCR_EL2_T0SZ_40B)
|
||||
#endif
|
||||
|
||||
|
|
@ -168,7 +172,6 @@
|
|||
#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
|
||||
|
||||
/* Hyp System Trap Register */
|
||||
#define HSTR_EL2_TTEE (1 << 16)
|
||||
#define HSTR_EL2_T(x) (1 << x)
|
||||
|
||||
/* Hyp Coproccessor Trap Register Shifts */
|
||||
|
|
|
|||
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