ARM: imx: Update spi_imx platform data to reflect current state
The docs for the spi_imx platform data still refer to a -32 offset used to specify a native chip select. This was removed in commit602c8f4485
("spi: imx: fix use of native chip-selects with devicetree") and no longer works as documented. Update documentation. The macro MXC_SPI_CS() is no longer is needed. If a board uses all native chip selects, then it's not necessary to specify a chip select array at all, as all native is the default (this is how device-tree configured SPI masters work too). Most of the spi-imx platform data users have their chip select arrays removed by this patch. This patch also fixes a bug in mx31moboard introduced in the '602 commit. When that board was updated in commit901f26bce6
("ARM: imx: set correct chip_select in platform setup") to reflect the SPI change, only SPI bus 2 was updated and SPI bus 1 was left with non-sequential chip selects. The mc13783 spi device on bus 1 had its chip select updated as if it were on bus 2. CC: Sascha Hauer <kernel@pengutronix.de> CC: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Greg Ungerer <gerg@linux-m68k.org> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Trent Piepho <tpiepho@impinj.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -374,26 +374,12 @@ static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
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};
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/* SPI */
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static int spi0_internal_chipselect[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(1),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master spi0_pdata __initconst = {
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.chipselect = spi0_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
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};
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static int spi1_internal_chipselect[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(1),
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MXC_SPI_CS(2),
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.num_chipselect = 3,
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};
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static const struct spi_imx_master spi1_pdata __initconst = {
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.chipselect = spi1_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
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.num_chipselect = 3,
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};
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static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
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@ -226,20 +226,12 @@ static void __init lilly1131_usb_init(void)
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/* SPI */
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static int spi_internal_chipselect[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(1),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master spi0_pdata __initconst = {
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.chipselect = spi_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
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.num_chipselect = 3,
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};
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static const struct spi_imx_master spi1_pdata __initconst = {
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.chipselect = spi_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
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.num_chipselect = 3,
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};
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static struct mc13xxx_platform_data mc13783_pdata __initdata = {
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@ -83,15 +83,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = {
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};
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/* SPI */
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static int spi0_internal_chipselect[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(1),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master spi0_pdata __initconst = {
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.chipselect = spi0_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
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.num_chipselect = 3,
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};
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static const struct mxc_nand_platform_data
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@ -133,13 +126,8 @@ static struct platform_device smsc911x_device = {
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* The MC13783 is the only hard-wired SPI device on the module.
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*/
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static int spi1_internal_chipselect[] = {
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MXC_SPI_CS(0),
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};
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static const struct spi_imx_master spi1_pdata __initconst = {
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.chipselect = spi1_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
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.num_chipselect = 1,
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};
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static struct mc13xxx_platform_data mc13783_pdata __initdata = {
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@ -152,14 +152,8 @@ static const struct imxi2c_platform_data moboard_i2c1_data __initconst = {
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.bitrate = 100000,
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};
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static int moboard_spi1_cs[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master moboard_spi1_pdata __initconst = {
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.chipselect = moboard_spi1_cs,
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.num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
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.num_chipselect = 3,
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};
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static struct regulator_consumer_supply sdhc_consumers[] = {
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@ -296,19 +290,14 @@ static struct spi_board_info moboard_spi_board_info[] __initdata = {
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/* irq number is run-time assigned */
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.max_speed_hz = 300000,
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.bus_num = 1,
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.chip_select = 1,
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.chip_select = 0,
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.platform_data = &moboard_pmic,
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.mode = SPI_CS_HIGH,
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},
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};
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static int moboard_spi2_cs[] = {
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MXC_SPI_CS(0), MXC_SPI_CS(1),
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};
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static const struct spi_imx_master moboard_spi2_pdata __initconst = {
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.chipselect = moboard_spi2_cs,
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.num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
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.num_chipselect = 2,
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};
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#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
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@ -56,11 +56,8 @@ static struct spi_board_info pcm037_spi_dev[] = {
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};
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/* Platform Data for MXC CSPI */
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static int pcm037_spi1_cs[] = { MXC_SPI_CS(0), MXC_SPI_CS(1), };
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static const struct spi_imx_master pcm037_spi1_pdata __initconst = {
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.chipselect = pcm037_spi1_cs,
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.num_chipselect = ARRAY_SIZE(pcm037_spi1_cs),
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.num_chipselect = 2,
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};
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/* GPIO-keys input device */
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@ -5,24 +5,29 @@
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/*
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* struct spi_imx_master - device.platform_data for SPI controller devices.
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* @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio
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* pins, numbers < 0 mean internal CSPI chipselects according
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* to MXC_SPI_CS(). Normally you want to use gpio based chip
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* selects as the CSPI module tries to be intelligent about
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* when to assert the chipselect: The CSPI module deasserts the
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* chipselect once it runs out of input data. The other problem
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* is that it is not possible to mix between high active and low
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* active chipselects on one single bus using the internal
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* chipselects. Unfortunately Freescale decided to put some
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* @chipselect: Array of chipselects for this master or NULL. Numbers >= 0
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* mean GPIO pins, -ENOENT means internal CSPI chipselect
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* matching the position in the array. E.g., if chipselect[1] =
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* -ENOENT then a SPI slave using chip select 1 will use the
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* native SS1 line of the CSPI. Omitting the array will use
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* all native chip selects.
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* Normally you want to use gpio based chip selects as the CSPI
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* module tries to be intelligent about when to assert the
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* chipselect: The CSPI module deasserts the chipselect once it
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* runs out of input data. The other problem is that it is not
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* possible to mix between high active and low active chipselects
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* on one single bus using the internal chipselects.
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* Unfortunately, on some SoCs, Freescale decided to put some
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* chipselects on dedicated pins which are not usable as gpios,
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* so we have to support the internal chipselects.
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* @num_chipselect: ARRAY_SIZE(chipselect)
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*
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* @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect),
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* otherwise the number of native chip selects.
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*/
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struct spi_imx_master {
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int *chipselect;
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int num_chipselect;
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};
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#define MXC_SPI_CS(no) ((no) - 32)
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#endif /* __MACH_SPI_H_*/
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