drm/amdgpu: add pipeline sync for compute job
hardware ring is async processed, the job is executed in parallel. In some case, this will result vm fault, like jobs with different vmids. This works around a CPC hw issue which will eventually be fixed in fw. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -300,7 +300,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
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int r;
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if (ring->funcs->emit_pipeline_sync && (
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pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed))
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pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed ||
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ring->type == AMDGPU_RING_TYPE_COMPUTE))
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amdgpu_ring_emit_pipeline_sync(ring);
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if (ring->funcs->emit_vm_flush &&
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