Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4561/1: i.MX/MX1 GPIO parenthes omission and input setup fix [ARM] 4557/1: Fix PXA irq gpio initialization [ARM] 4551/1: s3c24xx: fix wrong virtual address offsets [ARM] 4552/1: i.MX/MX1 GPIO output setup fix [ARM] 4553/1: ARM at91: define FIQ_START [ARM] 4554/1: replace consistent_sync() with flush_ioremap_region() ARM: OMAP: Enable serial idling and wakeup features ARM: OMAP2: Force APLLs always active ARM: OMAP: H3 workqueue fixes ARM: OMAP: OSK led fixes ARM: OMAP: fix OMAP1 dmtimer build warning ARM: OMAP: Fix 32k timer unsupported one-shot mode
This commit is contained in:
Коммит
feabb06bd7
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@ -721,7 +721,8 @@ config LEDS
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config LEDS_TIMER
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config LEDS_TIMER
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bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
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bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
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MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
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OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
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|| MACH_OMAP_PERSEUS2
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depends on LEDS
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depends on LEDS
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depends on !GENERIC_CLOCKEVENTS
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depends on !GENERIC_CLOCKEVENTS
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default y if ARCH_EBSA110
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default y if ARCH_EBSA110
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@ -738,7 +739,9 @@ config LEDS_TIMER
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config LEDS_CPU
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config LEDS_CPU
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bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
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bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
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!ARCH_OMAP) || MACH_OMAP_H2 || MACH_OMAP_PERSEUS2
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!ARCH_OMAP) \
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|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
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|| MACH_OMAP_PERSEUS2
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depends on LEDS
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depends on LEDS
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help
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help
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If you say Y here, the red LED will be used to give a good real
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If you say Y here, the red LED will be used to give a good real
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@ -101,10 +101,11 @@ EXPORT_SYMBOL(imx_gpio_mode);
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int imx_gpio_request(unsigned gpio, const char *label)
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int imx_gpio_request(unsigned gpio, const char *label)
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{
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{
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if(gpio >= (GPIO_PORT_MAX + 1) * 32)
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if(gpio >= (GPIO_PORT_MAX + 1) * 32) {
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printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n",
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printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n",
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gpio, label ? label : "?");
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gpio, label ? label : "?");
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return -EINVAL;
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return -EINVAL;
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}
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if(test_and_set_bit(gpio, imx_gpio_alloc_map)) {
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if(test_and_set_bit(gpio, imx_gpio_alloc_map)) {
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printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n",
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printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n",
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@ -129,7 +130,7 @@ EXPORT_SYMBOL(imx_gpio_free);
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int imx_gpio_direction_input(unsigned gpio)
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int imx_gpio_direction_input(unsigned gpio)
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{
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{
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imx_gpio_mode(gpio| GPIO_IN);
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imx_gpio_mode(gpio | GPIO_IN | GPIO_GIUS | GPIO_DR);
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return 0;
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return 0;
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}
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}
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@ -138,7 +139,7 @@ EXPORT_SYMBOL(imx_gpio_direction_input);
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int imx_gpio_direction_output(unsigned gpio, int value)
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int imx_gpio_direction_output(unsigned gpio, int value)
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{
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{
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imx_gpio_set_value(gpio, value);
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imx_gpio_set_value(gpio, value);
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imx_gpio_mode(gpio| GPIO_OUT);
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imx_gpio_mode(gpio | GPIO_OUT | GPIO_GIUS | GPIO_DR);
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return 0;
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return 0;
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}
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}
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@ -294,9 +294,11 @@ static int h3_select_irda(struct device *dev, int state)
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return err;
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return err;
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}
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}
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static void set_trans_mode(void *data)
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static void set_trans_mode(struct work_struct *work)
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{
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{
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int *mode = data;
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struct omap_irda_config *irda_config =
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container_of(work, struct omap_irda_config, gpio_expa.work);
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int mode = irda_config->mode;
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unsigned char expa;
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unsigned char expa;
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int err = 0;
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int err = 0;
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@ -306,7 +308,7 @@ static void set_trans_mode(void *data)
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expa &= ~0x03;
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expa &= ~0x03;
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if (*mode & IR_SIRMODE) {
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if (mode & IR_SIRMODE) {
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expa |= 0x01;
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expa |= 0x01;
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} else { /* MIR/FIR */
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} else { /* MIR/FIR */
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expa |= 0x03;
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expa |= 0x03;
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@ -321,9 +323,9 @@ static int h3_transceiver_mode(struct device *dev, int mode)
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{
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{
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struct omap_irda_config *irda_config = dev->platform_data;
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struct omap_irda_config *irda_config = dev->platform_data;
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irda_config->mode = mode;
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cancel_delayed_work(&irda_config->gpio_expa);
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cancel_delayed_work(&irda_config->gpio_expa);
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PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
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PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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#error this is not permitted - mode is an argument variable
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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return 0;
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return 0;
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@ -133,13 +133,13 @@ void osk_leds_event(led_event_t evt)
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mistral_setled();
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mistral_setled();
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break;
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break;
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case led_idle_start:
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case led_idle_start: /* idle == off */
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hw_led_state |= IDLE_LED;
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hw_led_state &= ~IDLE_LED;
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mistral_setled();
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mistral_setled();
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break;
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break;
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case led_idle_end:
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case led_idle_end:
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hw_led_state &= ~IDLE_LED;
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hw_led_state |= IDLE_LED;
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mistral_setled();
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mistral_setled();
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break;
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break;
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@ -57,7 +57,6 @@
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#include <asm/arch/tc.h>
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#include <asm/arch/tc.h>
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#include <asm/arch/pm.h>
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#include <asm/arch/pm.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/tps65010.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/dsp_common.h>
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#include <asm/arch/dsp_common.h>
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#include <asm/arch/dmtimer.h>
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#include <asm/arch/dmtimer.h>
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@ -250,11 +249,6 @@ void omap_pm_suspend(void)
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omap_serial_wake_trigger(1);
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omap_serial_wake_trigger(1);
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if (machine_is_omap_osk()) {
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/* Stop LED1 (D9) blink */
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tps65010_set_led(LED1, OFF);
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}
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if (!cpu_is_omap15xx())
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if (!cpu_is_omap15xx())
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omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
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omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
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@ -447,11 +441,6 @@ void omap_pm_suspend(void)
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omap_serial_wake_trigger(0);
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omap_serial_wake_trigger(0);
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printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev);
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printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev);
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if (machine_is_omap_osk()) {
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/* Let LED1 (D9) blink again */
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tps65010_set_led(LED1, BLINK);
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}
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}
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}
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#if defined(DEBUG) && defined(CONFIG_PROC_FS)
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#if defined(DEBUG) && defined(CONFIG_PROC_FS)
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@ -1160,8 +1160,8 @@ int __init omap2_clk_init(void)
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clk_enable(&sync_32k_ick);
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clk_enable(&sync_32k_ick);
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clk_enable(&omapctrl_ick);
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clk_enable(&omapctrl_ick);
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/* Force the APLLs active during bootup to avoid disabling and
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/* Force the APLLs always active. The clocks are idled
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* enabling them unnecessarily. */
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* automatically by hardware. */
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clk_enable(&apll96_ck);
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clk_enable(&apll96_ck);
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clk_enable(&apll54_ck);
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clk_enable(&apll54_ck);
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@ -1174,12 +1174,3 @@ int __init omap2_clk_init(void)
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return 0;
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return 0;
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}
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}
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static int __init omap2_disable_aplls(void)
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{
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clk_disable(&apll96_ck);
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clk_disable(&apll54_ck);
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return 0;
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}
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late_initcall(omap2_disable_aplls);
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@ -84,7 +84,7 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
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serial_write_reg(p, UART_OMAP_MDR1, 0x07);
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serial_write_reg(p, UART_OMAP_MDR1, 0x07);
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serial_write_reg(p, UART_OMAP_SCR, 0x08);
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serial_write_reg(p, UART_OMAP_SCR, 0x08);
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serial_write_reg(p, UART_OMAP_MDR1, 0x00);
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serial_write_reg(p, UART_OMAP_MDR1, 0x00);
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serial_write_reg(p, UART_OMAP_SYSC, 0x01);
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serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
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}
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}
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void __init omap_serial_init()
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void __init omap_serial_init()
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@ -365,7 +365,7 @@ void __init pxa_init_irq_gpio(int gpio_nr)
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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}
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for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(gpio_nr); irq++) {
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for (irq = IRQ_GPIO(2); irq < IRQ_GPIO(gpio_nr); irq++) {
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set_irq_chip(irq, &pxa_muxed_gpio_chip);
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set_irq_chip(irq, &pxa_muxed_gpio_chip);
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set_irq_handler(irq, handle_edge_irq);
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set_irq_handler(irq, handle_edge_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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@ -172,7 +172,7 @@ console_initcall(omap_add_serial_console);
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#if defined(CONFIG_ARCH_OMAP16XX)
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#if defined(CONFIG_ARCH_OMAP16XX)
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#elif defined(CONFIG_ARCH_OMAP24XX)
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#elif defined(CONFIG_ARCH_OMAP24XX)
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#define TIMER_32K_SYNCHRONIZED 0x48004010
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#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
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#endif
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#endif
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#ifdef TIMER_32K_SYNCHRONIZED
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#ifdef TIMER_32K_SYNCHRONIZED
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@ -271,11 +271,6 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
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#if defined(CONFIG_ARCH_OMAP1)
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#if defined(CONFIG_ARCH_OMAP1)
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struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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|
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{
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|
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BUG();
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}
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||||||
|
|
||||||
/**
|
/**
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||||||
* omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
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* omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
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* @inputmask: current value of idlect mask
|
* @inputmask: current value of idlect mask
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|
|
|
@ -71,7 +71,7 @@ struct sys_timer omap_timer;
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#if defined(CONFIG_ARCH_OMAP16XX)
|
#if defined(CONFIG_ARCH_OMAP16XX)
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#elif defined(CONFIG_ARCH_OMAP24XX)
|
#elif defined(CONFIG_ARCH_OMAP24XX)
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#define TIMER_32K_SYNCHRONIZED 0x48004010
|
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
|
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#else
|
#else
|
||||||
#error OMAP 32KHz timer does not currently work on 15XX!
|
#error OMAP 32KHz timer does not currently work on 15XX!
|
||||||
#endif
|
#endif
|
||||||
|
@ -147,14 +147,15 @@ static inline void omap_32k_timer_ack_irq(void)
|
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static void omap_32k_timer_set_mode(enum clock_event_mode mode,
|
static void omap_32k_timer_set_mode(enum clock_event_mode mode,
|
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struct clock_event_device *evt)
|
struct clock_event_device *evt)
|
||||||
{
|
{
|
||||||
|
omap_32k_timer_stop();
|
||||||
|
|
||||||
switch (mode) {
|
switch (mode) {
|
||||||
case CLOCK_EVT_MODE_ONESHOT:
|
|
||||||
case CLOCK_EVT_MODE_PERIODIC:
|
case CLOCK_EVT_MODE_PERIODIC:
|
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omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
|
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
|
||||||
break;
|
break;
|
||||||
|
case CLOCK_EVT_MODE_ONESHOT:
|
||||||
case CLOCK_EVT_MODE_UNUSED:
|
case CLOCK_EVT_MODE_UNUSED:
|
||||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
case CLOCK_EVT_MODE_SHUTDOWN:
|
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omap_32k_timer_stop();
|
|
||||||
break;
|
break;
|
||||||
case CLOCK_EVT_MODE_RESUME:
|
case CLOCK_EVT_MODE_RESUME:
|
||||||
break;
|
break;
|
||||||
|
@ -194,8 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
|
||||||
return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
|
return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned long omap_32k_last_tick = 0;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Returns current time from boot in nsecs. It's OK for this to wrap
|
* Returns current time from boot in nsecs. It's OK for this to wrap
|
||||||
* around for now, as it's just a relative time stamp.
|
* around for now, as it's just a relative time stamp.
|
||||||
|
@ -225,7 +224,6 @@ static __init void omap_init_32k_timer(void)
|
||||||
{
|
{
|
||||||
if (cpu_class_is_omap1())
|
if (cpu_class_is_omap1())
|
||||||
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
|
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
|
||||||
omap_32k_last_tick = omap_32k_sync_timer_read();
|
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_OMAP2
|
#ifdef CONFIG_ARCH_OMAP2
|
||||||
/* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
|
/* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
|
||||||
|
|
|
@ -15,9 +15,7 @@
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
#include <linux/dma-mapping.h>
|
|
||||||
#include <linux/mtd/mtd.h>
|
#include <linux/mtd/mtd.h>
|
||||||
#include <linux/mtd/map.h>
|
#include <linux/mtd/map.h>
|
||||||
#include <linux/mtd/partitions.h>
|
#include <linux/mtd/partitions.h>
|
||||||
|
@ -26,7 +24,7 @@
|
||||||
#include <asm/hardware.h>
|
#include <asm/hardware.h>
|
||||||
#include <asm/arch/pxa-regs.h>
|
#include <asm/arch/pxa-regs.h>
|
||||||
#include <asm/arch/lubbock.h>
|
#include <asm/arch/lubbock.h>
|
||||||
|
#include <asm/cacheflush.h>
|
||||||
|
|
||||||
#define ROM_ADDR 0x00000000
|
#define ROM_ADDR 0x00000000
|
||||||
#define FLASH_ADDR 0x04000000
|
#define FLASH_ADDR 0x04000000
|
||||||
|
@ -35,7 +33,7 @@
|
||||||
|
|
||||||
static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len)
|
static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len)
|
||||||
{
|
{
|
||||||
consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
|
flush_ioremap_region(map->phys, map->cached, from, len);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct map_info lubbock_maps[2] = { {
|
static struct map_info lubbock_maps[2] = { {
|
||||||
|
|
|
@ -15,8 +15,6 @@
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/dma-mapping.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
#include <linux/mtd/mtd.h>
|
#include <linux/mtd/mtd.h>
|
||||||
#include <linux/mtd/map.h>
|
#include <linux/mtd/map.h>
|
||||||
|
@ -26,6 +24,7 @@
|
||||||
#include <asm/hardware.h>
|
#include <asm/hardware.h>
|
||||||
#include <asm/arch/pxa-regs.h>
|
#include <asm/arch/pxa-regs.h>
|
||||||
#include <asm/arch/mainstone.h>
|
#include <asm/arch/mainstone.h>
|
||||||
|
#include <asm/cacheflush.h>
|
||||||
|
|
||||||
|
|
||||||
#define ROM_ADDR 0x00000000
|
#define ROM_ADDR 0x00000000
|
||||||
|
@ -36,7 +35,7 @@
|
||||||
static void mainstone_map_inval_cache(struct map_info *map, unsigned long from,
|
static void mainstone_map_inval_cache(struct map_info *map, unsigned long from,
|
||||||
ssize_t len)
|
ssize_t len)
|
||||||
{
|
{
|
||||||
consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
|
flush_ioremap_region(map->phys, map->cached, from, len);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct map_info mainstone_maps[2] = { {
|
static struct map_info mainstone_maps[2] = { {
|
||||||
|
|
|
@ -42,4 +42,7 @@
|
||||||
*/
|
*/
|
||||||
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
|
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
|
||||||
|
|
||||||
|
/* FIQ is AIC source 0. */
|
||||||
|
#define FIQ_START AT91_ID_FIQ
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -31,6 +31,7 @@ struct omap_irda_config {
|
||||||
unsigned long src_start;
|
unsigned long src_start;
|
||||||
int tx_trigger;
|
int tx_trigger;
|
||||||
int rx_trigger;
|
int rx_trigger;
|
||||||
|
int mode;
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -426,6 +426,13 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
|
||||||
*/
|
*/
|
||||||
#define flush_icache_page(vma,page) do { } while (0)
|
#define flush_icache_page(vma,page) do { } while (0)
|
||||||
|
|
||||||
|
static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
|
||||||
|
unsigned offset, size_t size)
|
||||||
|
{
|
||||||
|
const void *start = (void __force *)virt + offset;
|
||||||
|
dmac_inv_range(start, start + size);
|
||||||
|
}
|
||||||
|
|
||||||
#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
|
#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
|
||||||
#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
|
#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
|
||||||
|
|
||||||
|
|
|
@ -30,11 +30,11 @@
|
||||||
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
|
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define S3C_VA_IRQ S3C_ADDR(0x000000000) /* irq controller(s) */
|
#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
|
||||||
#define S3C_VA_SYS S3C_ADDR(0x001000000) /* system control */
|
#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
|
||||||
#define S3C_VA_MEM S3C_ADDR(0x002000000) /* system control */
|
#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
|
||||||
#define S3C_VA_TIMER S3C_ADDR(0x003000000) /* timer block */
|
#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
|
||||||
#define S3C_VA_WATCHDOG S3C_ADDR(0x004000000) /* watchdog */
|
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
|
||||||
#define S3C_VA_UART S3C_ADDR(0x010000000) /* UART */
|
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
|
||||||
|
|
||||||
#endif /* __ASM_PLAT_MAP_H */
|
#endif /* __ASM_PLAT_MAP_H */
|
||||||
|
|
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