scsi: smartpqi: add kdump support
Reviewed-by: Scott Teel <scott.teel@microsemi.com> Reviewed-by: Scott Benesh <scott.benesh@microsemi.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Reviewed-by: Tomas Henzl <thenzl@redhat.com> Signed-off-by: Kevin Barnett <kevin.barnett@microsemi.com> Signed-off-by: Don Brace <don.brace@microsemi.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -79,11 +79,13 @@ struct pqi_ctrl_registers {
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__le32 sis_ctrl_to_host_doorbell; /* 9Ch */
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u8 reserved3[0xa0 - (0x9c + sizeof(__le32))];
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__le32 sis_ctrl_to_host_doorbell_clear; /* A0h */
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u8 reserved4[0xbc - (0xa0 + sizeof(__le32))];
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u8 reserved4[0xb0 - (0xa0 + sizeof(__le32))];
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__le32 sis_driver_scratch; /* B0h */
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u8 reserved5[0xbc - (0xb0 + sizeof(__le32))];
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__le32 sis_firmware_status; /* BCh */
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u8 reserved5[0x1000 - (0xbc + sizeof(__le32))];
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u8 reserved6[0x1000 - (0xbc + sizeof(__le32))];
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__le32 sis_mailbox[8]; /* 1000h */
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u8 reserved6[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
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u8 reserved7[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
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/*
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* The PQI spec states that the PQI registers should be at
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* offset 0 from the PCIe BAR 0. However, we can't map
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@ -963,6 +965,11 @@ struct pqi_ctrl_info {
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struct semaphore lun_reset_sem;
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};
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enum pqi_ctrl_mode {
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UNKNOWN,
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PQI_MODE
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};
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/*
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* assume worst case: SATA queue depth of 31 minus 4 internal firmware commands
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*/
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@ -153,6 +153,18 @@ static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
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return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
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}
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static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
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struct pqi_ctrl_info *ctrl_info)
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{
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return sis_read_driver_scratch(ctrl_info);
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}
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static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
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enum pqi_ctrl_mode mode)
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{
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sis_write_driver_scratch(ctrl_info, mode);
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}
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#define PQI_RESCAN_WORK_INTERVAL (10 * HZ)
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static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
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@ -5266,10 +5278,30 @@ out:
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return rc;
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}
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static int pqi_kdump_init(struct pqi_ctrl_info *ctrl_info)
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{
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if (!sis_is_firmware_running(ctrl_info))
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return -ENXIO;
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if (pqi_get_ctrl_mode(ctrl_info) == PQI_MODE) {
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sis_disable_msix(ctrl_info);
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if (pqi_reset(ctrl_info) == 0)
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sis_reenable_sis_mode(ctrl_info);
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}
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return 0;
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}
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static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
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{
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int rc;
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if (reset_devices) {
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rc = pqi_kdump_init(ctrl_info);
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if (rc)
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return rc;
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}
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/*
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* When the controller comes out of reset, it is always running
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* in legacy SIS mode. This is so that it can be compatible
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@ -5343,6 +5375,7 @@ static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
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/* From here on, we are running in PQI mode. */
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ctrl_info->pqi_mode_enabled = true;
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pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
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rc = pqi_alloc_admin_queues(ctrl_info);
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if (rc) {
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@ -5878,6 +5911,8 @@ static void __attribute__((unused)) verify_structures(void)
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sis_ctrl_to_host_doorbell) != 0x9c);
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BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
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sis_ctrl_to_host_doorbell_clear) != 0xa0);
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BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
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sis_driver_scratch) != 0xb0);
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BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
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sis_firmware_status) != 0xbc);
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BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
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@ -376,6 +376,16 @@ int sis_reenable_sis_mode(struct pqi_ctrl_info *ctrl_info)
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return rc;
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}
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void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value)
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{
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writel(value, &ctrl_info->registers->sis_driver_scratch);
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}
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u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info)
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{
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return readl(&ctrl_info->registers->sis_driver_scratch);
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}
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static void __attribute__((unused)) verify_structures(void)
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{
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BUILD_BUG_ON(offsetof(struct sis_base_struct,
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@ -28,5 +28,7 @@ void sis_enable_msix(struct pqi_ctrl_info *ctrl_info);
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void sis_disable_msix(struct pqi_ctrl_info *ctrl_info);
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void sis_soft_reset(struct pqi_ctrl_info *ctrl_info);
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int sis_reenable_sis_mode(struct pqi_ctrl_info *ctrl_info);
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void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value);
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u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info);
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#endif /* _SMARTPQI_SIS_H */
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