hwmon: (shtc1) add support for the SHTC3 sensor
Add support for the Sensirion SHTC3 humidity and temperature sensor to the shtc1 module. Signed-off-by: Dan Robertson <dan@dlrobertson.com> Link: https://lore.kernel.org/r/20190905014554.21658-2-dan@dlrobertson.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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@ -19,7 +19,17 @@ Supported chips:
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Addresses scanned: none
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Datasheet: Not publicly available
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Datasheet: http://www.sensirion.com/file/datasheet_shtw1
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* Sensirion SHTC3
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Prefix: 'shtc3'
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Addresses scanned: none
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Datasheet: http://www.sensirion.com/file/datasheet_shtc3
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@ -30,10 +40,9 @@ Author:
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Description
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-----------
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This driver implements support for the Sensirion SHTC1 chip, a humidity and
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temperature sensor. Temperature is measured in degrees celsius, relative
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humidity is expressed as a percentage. Driver can be used as well for SHTW1
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chip, which has the same electrical interface.
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This driver implements support for the Sensirion SHTC1, SHTW1, and SHTC3
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chips, a humidity and temperature sensor. Temperature is measured in degrees
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celsius, relative humidity is expressed as a percentage.
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The device communicates with the I2C protocol. All sensors are set to I2C
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address 0x70. See Documentation/i2c/instantiating-devices for methods to
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@ -1392,8 +1392,8 @@ config SENSORS_SHTC1
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tristate "Sensiron humidity and temperature sensors. SHTC1 and compat."
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depends on I2C
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help
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If you say yes here you get support for the Sensiron SHTC1 and SHTW1
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humidity and temperature sensors.
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If you say yes here you get support for the Sensiron SHTC1, SHTW1,
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and SHTC3 humidity and temperature sensors.
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This driver can also be built as a module. If so, the module
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will be called shtc1.
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@ -24,19 +24,33 @@ static const unsigned char shtc1_cmd_measure_blocking_lpm[] = { 0x64, 0x58 };
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static const unsigned char shtc1_cmd_measure_nonblocking_lpm[] = { 0x60, 0x9c };
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/* command for reading the ID register */
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static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, 0xc8 };
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static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, 0xc8 };
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/* constants for reading the ID register */
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#define SHTC1_ID 0x07
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#define SHTC1_ID_REG_MASK 0x3f
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/*
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* constants for reading the ID register
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* SHTC1: 0x0007 with mask 0x003f
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* SHTW1: 0x0007 with mask 0x003f
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* SHTC3: 0x0807 with mask 0x083f
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*/
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#define SHTC3_ID 0x0807
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#define SHTC3_ID_MASK 0x083f
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#define SHTC1_ID 0x0007
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#define SHTC1_ID_MASK 0x003f
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/* delays for non-blocking i2c commands, both in us */
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#define SHTC1_NONBLOCKING_WAIT_TIME_HPM 14400
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#define SHTC1_NONBLOCKING_WAIT_TIME_LPM 1000
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#define SHTC3_NONBLOCKING_WAIT_TIME_HPM 12100
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#define SHTC3_NONBLOCKING_WAIT_TIME_LPM 800
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#define SHTC1_CMD_LENGTH 2
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#define SHTC1_RESPONSE_LENGTH 6
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enum shtcx_chips {
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shtc1,
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shtc3,
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};
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struct shtc1_data {
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struct i2c_client *client;
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struct mutex update_lock;
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@ -47,6 +61,7 @@ struct shtc1_data {
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unsigned int nonblocking_wait_time; /* in us */
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struct shtc1_platform_data setup;
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enum shtcx_chips chip;
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int temperature; /* 1000 * temperature in dgr C */
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int humidity; /* 1000 * relative humidity in %RH */
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@ -157,13 +172,16 @@ static void shtc1_select_command(struct shtc1_data *data)
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data->command = data->setup.blocking_io ?
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shtc1_cmd_measure_blocking_hpm :
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shtc1_cmd_measure_nonblocking_hpm;
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data->nonblocking_wait_time = SHTC1_NONBLOCKING_WAIT_TIME_HPM;
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data->nonblocking_wait_time = (data->chip == shtc1) ?
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SHTC1_NONBLOCKING_WAIT_TIME_HPM :
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SHTC3_NONBLOCKING_WAIT_TIME_HPM;
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} else {
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data->command = data->setup.blocking_io ?
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shtc1_cmd_measure_blocking_lpm :
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shtc1_cmd_measure_nonblocking_lpm;
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data->nonblocking_wait_time = SHTC1_NONBLOCKING_WAIT_TIME_LPM;
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data->nonblocking_wait_time = (data->chip == shtc1) ?
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SHTC1_NONBLOCKING_WAIT_TIME_LPM :
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SHTC3_NONBLOCKING_WAIT_TIME_LPM;
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}
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}
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@ -171,9 +189,11 @@ static int shtc1_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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int ret;
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char id_reg[2];
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u16 id_reg;
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char id_reg_buf[2];
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struct shtc1_data *data;
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struct device *hwmon_dev;
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enum shtcx_chips chip = id->driver_data;
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struct i2c_adapter *adap = client->adapter;
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struct device *dev = &client->dev;
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@ -187,13 +207,20 @@ static int shtc1_probe(struct i2c_client *client,
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dev_err(dev, "could not send read_id_reg command: %d\n", ret);
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return ret < 0 ? ret : -ENODEV;
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}
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ret = i2c_master_recv(client, id_reg, sizeof(id_reg));
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if (ret != sizeof(id_reg)) {
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ret = i2c_master_recv(client, id_reg_buf, sizeof(id_reg_buf));
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if (ret != sizeof(id_reg_buf)) {
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dev_err(dev, "could not read ID register: %d\n", ret);
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return -ENODEV;
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}
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if ((id_reg[1] & SHTC1_ID_REG_MASK) != SHTC1_ID) {
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dev_err(dev, "ID register doesn't match\n");
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id_reg = be16_to_cpup((__be16 *)id_reg_buf);
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if (chip == shtc3) {
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if ((id_reg & SHTC3_ID_MASK) != SHTC3_ID) {
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dev_err(dev, "SHTC3 ID register does not match\n");
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return -ENODEV;
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}
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} else if ((id_reg & SHTC1_ID_MASK) != SHTC1_ID) {
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dev_err(dev, "SHTC1 ID register does not match\n");
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return -ENODEV;
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}
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@ -204,6 +231,7 @@ static int shtc1_probe(struct i2c_client *client,
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data->setup.blocking_io = false;
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data->setup.high_precision = true;
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data->client = client;
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data->chip = chip;
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if (client->dev.platform_data)
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data->setup = *(struct shtc1_platform_data *)dev->platform_data;
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@ -222,8 +250,9 @@ static int shtc1_probe(struct i2c_client *client,
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/* device ID table */
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static const struct i2c_device_id shtc1_id[] = {
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{ "shtc1", 0 },
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{ "shtw1", 0 },
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{ "shtc1", shtc1 },
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{ "shtw1", shtc1 },
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{ "shtc3", shtc3 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, shtc1_id);
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