iommu/vt-d: Enhance intel-iommu driver to support DMAR unit hotplug
Implement required callback functions for intel-iommu driver to support DMAR unit hotplug. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Reviewed-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Jiang Liu
Joerg Roedel
Родитель
51acce33c4
Коммит
ffebeb46dd
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@ -1127,8 +1127,11 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
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unsigned long flags;
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root = (struct root_entry *)alloc_pgtable_page(iommu->node);
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if (!root)
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if (!root) {
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pr_err("IOMMU: allocating root entry for %s failed\n",
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iommu->name);
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return -ENOMEM;
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}
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__iommu_flush_cache(iommu, root, ROOT_SIZE);
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@ -1468,7 +1471,7 @@ static int iommu_init_domains(struct intel_iommu *iommu)
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return 0;
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}
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static void free_dmar_iommu(struct intel_iommu *iommu)
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static void disable_dmar_iommu(struct intel_iommu *iommu)
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{
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struct dmar_domain *domain;
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int i;
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@ -1492,11 +1495,16 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
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if (iommu->gcmd & DMA_GCMD_TE)
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iommu_disable_translation(iommu);
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}
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kfree(iommu->domains);
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kfree(iommu->domain_ids);
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iommu->domains = NULL;
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iommu->domain_ids = NULL;
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static void free_dmar_iommu(struct intel_iommu *iommu)
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{
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if ((iommu->domains) && (iommu->domain_ids)) {
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kfree(iommu->domains);
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kfree(iommu->domain_ids);
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iommu->domains = NULL;
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iommu->domain_ids = NULL;
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}
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g_iommus[iommu->seq_id] = NULL;
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@ -2703,6 +2711,41 @@ static int __init iommu_prepare_static_identity_mapping(int hw)
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return 0;
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}
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static void intel_iommu_init_qi(struct intel_iommu *iommu)
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{
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/*
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* Start from the sane iommu hardware state.
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* If the queued invalidation is already initialized by us
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* (for example, while enabling interrupt-remapping) then
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* we got the things already rolling from a sane state.
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*/
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if (!iommu->qi) {
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/*
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* Clear any previous faults.
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*/
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dmar_fault(-1, iommu);
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/*
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* Disable queued invalidation if supported and already enabled
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* before OS handover.
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*/
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dmar_disable_qi(iommu);
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}
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if (dmar_enable_qi(iommu)) {
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/*
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* Queued Invalidate not enabled, use Register Based Invalidate
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*/
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iommu->flush.flush_context = __iommu_flush_context;
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iommu->flush.flush_iotlb = __iommu_flush_iotlb;
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pr_info("IOMMU: %s using Register based invalidation\n",
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iommu->name);
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} else {
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iommu->flush.flush_context = qi_flush_context;
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iommu->flush.flush_iotlb = qi_flush_iotlb;
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pr_info("IOMMU: %s using Queued invalidation\n", iommu->name);
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}
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}
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static int __init init_dmars(void)
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{
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struct dmar_drhd_unit *drhd;
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@ -2731,6 +2774,10 @@ static int __init init_dmars(void)
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DMAR_UNITS_SUPPORTED);
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}
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/* Preallocate enough resources for IOMMU hot-addition */
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if (g_num_of_iommus < DMAR_UNITS_SUPPORTED)
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g_num_of_iommus = DMAR_UNITS_SUPPORTED;
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g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
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GFP_KERNEL);
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if (!g_iommus) {
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@ -2759,58 +2806,14 @@ static int __init init_dmars(void)
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* among all IOMMU's. Need to Split it later.
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*/
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ret = iommu_alloc_root_entry(iommu);
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if (ret) {
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printk(KERN_ERR "IOMMU: allocate root entry failed\n");
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if (ret)
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goto free_iommu;
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}
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if (!ecap_pass_through(iommu->ecap))
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hw_pass_through = 0;
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}
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/*
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* Start from the sane iommu hardware state.
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*/
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for_each_active_iommu(iommu, drhd) {
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/*
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* If the queued invalidation is already initialized by us
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* (for example, while enabling interrupt-remapping) then
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* we got the things already rolling from a sane state.
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*/
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if (iommu->qi)
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continue;
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/*
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* Clear any previous faults.
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*/
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dmar_fault(-1, iommu);
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/*
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* Disable queued invalidation if supported and already enabled
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* before OS handover.
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*/
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dmar_disable_qi(iommu);
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}
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for_each_active_iommu(iommu, drhd) {
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if (dmar_enable_qi(iommu)) {
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/*
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* Queued Invalidate not enabled, use Register Based
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* Invalidate
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*/
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iommu->flush.flush_context = __iommu_flush_context;
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iommu->flush.flush_iotlb = __iommu_flush_iotlb;
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printk(KERN_INFO "IOMMU %d 0x%Lx: using Register based "
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"invalidation\n",
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iommu->seq_id,
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(unsigned long long)drhd->reg_base_addr);
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} else {
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iommu->flush.flush_context = qi_flush_context;
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iommu->flush.flush_iotlb = qi_flush_iotlb;
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printk(KERN_INFO "IOMMU %d 0x%Lx: using Queued "
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"invalidation\n",
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iommu->seq_id,
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(unsigned long long)drhd->reg_base_addr);
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}
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}
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for_each_active_iommu(iommu, drhd)
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intel_iommu_init_qi(iommu);
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if (iommu_pass_through)
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iommu_identity_mapping |= IDENTMAP_ALL;
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@ -2896,8 +2899,10 @@ static int __init init_dmars(void)
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return 0;
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free_iommu:
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for_each_active_iommu(iommu, drhd)
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for_each_active_iommu(iommu, drhd) {
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disable_dmar_iommu(iommu);
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free_dmar_iommu(iommu);
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}
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kfree(deferred_flush);
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free_g_iommus:
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kfree(g_iommus);
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@ -3803,9 +3808,100 @@ int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg)
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return 0;
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}
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static int intel_iommu_add(struct dmar_drhd_unit *dmaru)
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{
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int sp, ret = 0;
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struct intel_iommu *iommu = dmaru->iommu;
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if (g_iommus[iommu->seq_id])
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return 0;
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if (hw_pass_through && !ecap_pass_through(iommu->ecap)) {
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pr_warn("IOMMU: %s doesn't support hardware pass through.\n",
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iommu->name);
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return -ENXIO;
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}
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if (!ecap_sc_support(iommu->ecap) &&
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domain_update_iommu_snooping(iommu)) {
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pr_warn("IOMMU: %s doesn't support snooping.\n",
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iommu->name);
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return -ENXIO;
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}
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sp = domain_update_iommu_superpage(iommu) - 1;
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if (sp >= 0 && !(cap_super_page_val(iommu->cap) & (1 << sp))) {
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pr_warn("IOMMU: %s doesn't support large page.\n",
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iommu->name);
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return -ENXIO;
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}
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/*
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* Disable translation if already enabled prior to OS handover.
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*/
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if (iommu->gcmd & DMA_GCMD_TE)
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iommu_disable_translation(iommu);
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g_iommus[iommu->seq_id] = iommu;
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ret = iommu_init_domains(iommu);
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if (ret == 0)
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ret = iommu_alloc_root_entry(iommu);
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if (ret)
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goto out;
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if (dmaru->ignored) {
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/*
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* we always have to disable PMRs or DMA may fail on this device
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*/
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if (force_on)
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iommu_disable_protect_mem_regions(iommu);
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return 0;
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}
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intel_iommu_init_qi(iommu);
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iommu_flush_write_buffer(iommu);
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ret = dmar_set_interrupt(iommu);
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if (ret)
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goto disable_iommu;
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iommu_set_root_entry(iommu);
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iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
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iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
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iommu_enable_translation(iommu);
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if (si_domain) {
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ret = iommu_attach_domain(si_domain, iommu);
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if (ret < 0 || si_domain->id != ret)
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goto disable_iommu;
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domain_attach_iommu(si_domain, iommu);
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}
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iommu_disable_protect_mem_regions(iommu);
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return 0;
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disable_iommu:
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disable_dmar_iommu(iommu);
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out:
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free_dmar_iommu(iommu);
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return ret;
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}
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int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
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{
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return intel_iommu_enabled ? -ENOSYS : 0;
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int ret = 0;
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struct intel_iommu *iommu = dmaru->iommu;
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if (!intel_iommu_enabled)
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return 0;
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if (iommu == NULL)
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return -EINVAL;
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if (insert) {
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ret = intel_iommu_add(dmaru);
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} else {
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disable_dmar_iommu(iommu);
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free_dmar_iommu(iommu);
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}
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return ret;
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}
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static void intel_iommu_free_dmars(void)
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