This patch adds basic support for PCI-based Intel TH devices. It requests
2 bars (configuration registers for the subdevices and STH channel MMIO
region) and calls into Intel TH core code to create the bus with subdevices
etc.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Alexander Shishkin