The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device that
supports x1, x2, or x4 operation.
Tested on Pensando SoC hardware with a cadence quadspi controller
via drivers/spi/spi-cadence-quadspi.c, in x2 mode at 50MHz.
- random data write, erase, read - verified erase operations
- random data write, read/compare - verified write/read operations
Signed-off-by: David Clear <dac2@pensando.io>
Acked-by: Shannon Nelson <snelson@pensando.io>
Link: https://lore.kernel.org/r/20200720163656.38006-2-dac2@pensando.io
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The MX25R1635F is the smaller sibling of the MX25R3235F that is
already supported. It's only half the size (16Mb).
It was tested on the Kontron Electronics i.MX8MM SoM (N8010)
using raw read and write from and to the mtd device and
the 'flash_erase' command.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
[tudor.ambarus@microchip.com: update subject]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200702140523.6811-1-frieder.schrempf@kontron.de
mx25u51245g is a mass production for new design and
replace mx66u51235f(phase out).
Validated by read, erase, read back, write and read back
on Xilinx Zynq PicoZed FPGA board which included
Macronix SPI Host (driver/spi/spi-mxic.c).
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
mx25l51245g is a mass production for new design and
replace mx66l51235l(phase out).
Validated by read, erase, read back, write and read back
on Xilinx Zynq PicoZed FPGA board which included
Macronix SPI Host (driver/spi/spi-mxic.c).
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The SPI NOR controllers drivers must not be able to use structures that
are meant just for the SPI NOR core.
struct spi_nor_flash_parameter is filled at run-time with info gathered
from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter
should be opaque to the SPI NOR controller drivers, make sure it is.
spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command,
spi_nor_read_command_index and spi_nor_pp_command_index are defined for the
core use, make sure they are opaque to the SPI NOR controller drivers.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Create a SPI NOR manufacturer driver for Macronix chips, and move the
Macronix definitions outside of core.c.
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Xiang Chen <chenxiang66@hisilicon.com>
Robert Marko
David Clear
Frieder Schrempf
Mason Yang
Tudor Ambarus
Boris Brezillon