Граф коммитов

3493 Коммитов

Автор SHA1 Сообщение Дата
Logan Gunthorpe ce81801372 dmaengine: imx-dma: cleanup scatterlist layering violations
This dma engine driver directly accesses page_link assuming knowledge
that should be contained only in scatterlist.h.

We replace these with calls to sg_chain and sg_assign_page.

Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Stephen Bates <sbates@raithlin.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Per Förlin <per.forlin@axis.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-06-01 22:09:12 +05:30
Arvind Yadav ba6ab3b359 dmaengine: imx-sdma: Fix compilation warning.
Replace '%d' by '%zu' to fix the following compilation warning:-

drivers/dma/imx-sdma.c: In function ‘sdma_prep_dma_cyclic’:
drivers/dma/imx-sdma.c:1327:5: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t’ [-Wformat=]
     channel, period_len, 0xffff);
     ^
drivers/dma/imx-sdma.c:1350:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t’ [-Wformat=]
   dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n",

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-30 11:52:58 +05:30
Arvind Yadav fb9caf370f dmaengine: imx-sdma: Handle return value of clk_prepare_enable
clk_prepare_enable() can fail here and we must check its return value.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-30 11:51:35 +05:30
Kuninori Morimoto 56b177055a rcar-dmac: fixup descriptor pointer for descriptor mode
In descriptor mode, the descriptor running pointer is not maintained
by the interrupt handler, thus, driver finds the running descriptor
from the descriptor pointer field in the CHCRB register.
But, CHCRB::DPTR indicates *next* descriptor pointer, not current.
Thus, The residue calculation will be missed. This patch fixup it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-30 11:49:28 +05:30
Robin Murphy 4d6d74e220 dmaengine: pl330: Add IOMMU support to slave tranfers
Wire up dma_map_resource() for slave transfers, so that we can let the
PL330 use IOMMU-backed DMA mapping ops on systems with an appropriate
IOMMU and RAM above 4GB, to avoid CPU bounce buffering.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-30 11:47:32 +05:30
Arvind Yadav 702fce05f5 dmaengine: DW DMAC: Handle return value of clk_prepare_enable
clk_prepare_enable() can fail here and we must check its return value.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:55:17 +05:30
Alexander Sverdlin 98f9de366f dmaengine: ep93xx: Don't drain the transfers in terminate_all()
Draining the transfers in terminate_all callback happens with IRQs disabled,
therefore induces huge latency:

 irqsoff latency trace v1.1.5 on 4.11.0
 --------------------------------------------------------------------
 latency: 39770 us, #57/57, CPU#0 | (M:preempt VP:0, KP:0, SP:0 HP:0)
    -----------------
    | task: process-129 (uid:0 nice:0 policy:2 rt_prio:50)
    -----------------
  => started at: _snd_pcm_stream_lock_irqsave
  => ended at:   snd_pcm_stream_unlock_irqrestore

                  _------=> CPU#
                 / _-----=> irqs-off
                | / _----=> need-resched
                || / _---=> hardirq/softirq
                ||| / _--=> preempt-depth
                |||| /     delay
  cmd     pid   ||||| time  |   caller
     \   /      |||||  \    |   /
process-129     0d.s.    3us : _snd_pcm_stream_lock_irqsave
process-129     0d.s1    9us : snd_pcm_stream_lock <-_snd_pcm_stream_lock_irqsave
process-129     0d.s1   15us : preempt_count_add <-snd_pcm_stream_lock
process-129     0d.s2   22us : preempt_count_add <-snd_pcm_stream_lock
process-129     0d.s3   32us : snd_pcm_update_hw_ptr0 <-snd_pcm_period_elapsed
process-129     0d.s3   41us : soc_pcm_pointer <-snd_pcm_update_hw_ptr0
process-129     0d.s3   50us : dmaengine_pcm_pointer <-soc_pcm_pointer
process-129     0d.s3   58us+: snd_dmaengine_pcm_pointer_no_residue <-dmaengine_pcm_pointer
process-129     0d.s3   96us : update_audio_tstamp <-snd_pcm_update_hw_ptr0
process-129     0d.s3  103us : snd_pcm_update_state <-snd_pcm_update_hw_ptr0
process-129     0d.s3  112us : xrun <-snd_pcm_update_state
process-129     0d.s3  119us : snd_pcm_stop <-xrun
process-129     0d.s3  126us : snd_pcm_action <-snd_pcm_stop
process-129     0d.s3  134us : snd_pcm_action_single <-snd_pcm_action
process-129     0d.s3  141us : snd_pcm_pre_stop <-snd_pcm_action_single
process-129     0d.s3  150us : snd_pcm_do_stop <-snd_pcm_action_single
process-129     0d.s3  157us : soc_pcm_trigger <-snd_pcm_do_stop
process-129     0d.s3  166us : snd_dmaengine_pcm_trigger <-soc_pcm_trigger
process-129     0d.s3  175us : ep93xx_dma_terminate_all <-snd_dmaengine_pcm_trigger
process-129     0d.s3  182us : preempt_count_add <-ep93xx_dma_terminate_all
process-129     0d.s4  189us*: m2p_hw_shutdown <-ep93xx_dma_terminate_all
process-129     0d.s4 39472us : m2p_hw_setup <-ep93xx_dma_terminate_all

 ... rest skipped...

process-129     0d.s. 40080us : <stack trace>
 => ep93xx_dma_tasklet
 => tasklet_action
 => __do_softirq
 => irq_exit
 => __handle_domain_irq
 => vic_handle_irq
 => __irq_usr
 => 0xb66c6668

Just abort the transfers and warn if the HW state is not what we expect.
Move draining into device_synchronize callback.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:52:46 +05:30
Alexander Sverdlin 0037ae4781 dmaengine: ep93xx: Always start from BASE0
The current buffer is being reset to zero on device_free_chan_resources()
but not on device_terminate_all(). It could happen that HW is restarted and
expects BASE0 to be used, but the driver is not synchronized and will start
from BASE1. One solution is to reset the buffer explicitly in
m2p_hw_setup().

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:52:46 +05:30
Linus Walleij 1e1cfc7213 dmaengine: pl08x: Add support for Faraday Technology FTDMAC020
After reading the specs for the Faraday Technology FTDMAC020 found
in the Gemini platform, it becomes pretty evident that this is just
another PL08x derivative, and should be handled like such by simply
extending the existing PL08x driver to handle the quirks in this
hardware.

This patch makes memcpy work and has been tested on the Gemini and
also regression-tested on the Nomadik NHK15 using dmatest with
10 threads per channel without a hinch for hours.

I have not implemented slave DMA in those codepaths, because this
device (Gemini) does not use slave DMA, and it seems like devices
using FTDMAC020 for device DMA have a slightly different register
layout so some real hardware is needed to proceed with this. I
left some FIXME etc in the code for this.

I had to do some refactorings of some helper functions, but I have
not split those into separate patches because these refactorings
do not make much sense without the increased complexity of handling
the FTDMAC020.

The DMA test would hang the platform on me on the Gemini after a
few thousand iterations, however after turning of the caches the
problem immediately disappeared and I could run the DMA engine
with 10 threads pers physical channel for days in a row without
a crash. I think there is no problem with the DMA driver: instead
it is something fishy in the FA526 cache handling code that get
pretty heavily exercised by the DMA engine and we need to go and
fix that instead.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:44:32 +05:30
Linus Walleij ebe9b3005d dmaengine: pl08x: Make slave engine optional
If the vendor data does not specify any signals, we do not
have to support slave DMA. Make the registration of the slave
DMA engine optional, so we can use this for the FTDMAC020
in the Gemini that only has memcpy support.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:44:32 +05:30
Linus Walleij 4166a56aa8 ARM/dmaengine: pl08x: pass reasonable memcpy settings
We cannot use bits from configuration registers as API between
platforms and driver like this, abstract it out to two enums
and mimic the stuff passed as device tree data.

This is done to make it possible for the driver to generate the
ccfg word on-the-fly so we can support more PL08x derivatives.

Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-24 09:44:32 +05:30
Niklas Söderlund a1ed64efc5 dmaengine: rcar-dmac: wait for ISR to finish before freeing resources
This fixes a race condition where the channel resources could be freed
before the ISR had finished running resulting in a NULL pointer
reference from the ISR.

[  167.148934] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[  167.157051] pgd = ffff80003c641000
[  167.160449] [00000000] *pgd=000000007c507003, *pud=000000007c4ff003, *pmd=0000000000000000
[  167.168719] Internal error: Oops: 96000046 [#1] PREEMPT SMP
[  167.174289] Modules linked in:
[  167.177348] CPU: 3 PID: 10547 Comm: dma_ioctl Not tainted 4.11.0-rc1-00001-g8d92afddc2f6633a #73
[  167.186131] Hardware name: Renesas Salvator-X board based on r8a7795 (DT)
[  167.192917] task: ffff80003a411a00 task.stack: ffff80003bcd4000
[  167.198850] PC is at rcar_dmac_chan_prep_sg+0xe0/0x400
[  167.203985] LR is at rcar_dmac_chan_prep_sg+0x48/0x400

Based of previous work by:
    Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-19 14:55:23 +05:30
Niklas Söderlund 30c45005a4 dmaengine: rcar-dmac: implement device_synchronize()
Implement the device_synchronize() callback which wait until a dma
channel is stopped to provide a synchronization point.

This protects the driver from multiple race conditions when terminating
and freeing resources. E.g. the completion callback still running after
device_terminate_all() has completed.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-19 14:55:23 +05:30
Niklas Söderlund 427d5ecd27 dmaengine: rcar-dmac: store channel IRQ in struct rcar_dmac_chan
The IRQ number is needed after probe to be able to add synchronisation
points in other places in the driver when freeing resources and to
implement a device_synchronize() callback. Store the IRQ number in the
struct rcar_dmac_chan so that it can be used later.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-19 14:55:23 +05:30
Colin Ian King 1fc63cb4f1 dmaengine: bcm-scm-raid: remove redundant null check on req
Req is never null on at the point of the null check, so
remove this redundant check and just return &req->tx.

Detected by CoverityScan, CID#1436147 ("Logically dead code")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-19 08:56:16 +05:30
Arnd Bergmann 58d9612510 dmaengine: bcm-sba-raid: fix Kconfig dependencies
The new driver requires both mailbox and raid support for compile
testing:

drivers/dma/built-in.o: In function `sba_remove':
edma.c:(.text+0x4414): undefined reference to `mbox_free_channel'
drivers/dma/built-in.o: In function `sba_issue_pending':
edma.c:(.text+0x46cc): undefined reference to `mbox_send_message'
drivers/dma/built-in.o: In function `sba_probe':
edma.c:(.text+0x4e60): undefined reference to `mbox_request_channel'
edma.c:(.text+0x5038): undefined reference to `mbox_free_channel'
drivers/dma/built-in.o: In function `sba_tx_status':
edma.c:(.text+0x5210): undefined reference to `mbox_client_peek_data'

drivers/dma/built-in.o: In function `sba_prep_dma_pq_req':
edma.c:(.text+0x5784): undefined reference to `raid6_gflog'
edma.c:(.text+0x5798): undefined reference to `raid6_gflog'

This rearranges the Kconfig dependencies accordingly.

Fixes: 743e1c8ffe ("dmaengine: Add Broadcom SBA RAID driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-19 08:50:29 +05:30
Anup Patel 743e1c8ffe dmaengine: Add Broadcom SBA RAID driver
The Broadcom stream buffer accelerator (SBA) provides offloading
capabilities for RAID operations. This SBA offload engine is
accessible via Broadcom SoC specific ring manager.

This patch adds Broadcom SBA RAID driver which provides one
DMA device with RAID capabilities using one or more Broadcom
SoC specific ring manager channels. The SBA RAID driver in its
current shape implements memcpy, xor, and pq operations.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-16 10:01:57 +05:30
Hiroyuki Yokoyama 9a445bbb16 dmaengine: usb-dmac: Fix DMAOR AE bit definition
This patch fixes the register definition of AE (Address Error flag) bit.

Fixes: 0c1c8ff32f ("dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver")
Cc: <stable@vger.kernel.org> # v4.1+
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
[Shimoda: add Fixes and Cc tags in the commit log]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-16 09:58:51 +05:30
Andy Shevchenko 14bebd01c5 dmaengine: dw: Remove AVR32 bits from the driver
AVR32 is gone. Now it's time to clean up the driver by removing
leftovers that was used by AVR32 related code.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-05-15 17:07:30 +02:00
Hanna Hawa ecfa77145b dmaengine: mv_xor_v2: add support for suspend/resume
This commit adds the support for suspend/resume in the mv_xor_v2
driver. The suspend suspend function disables the XOR engine after the
DMA stack has handled all pending descriptors in the queue. The resume
function re-configures the XOR engine and re-enables the engine.

Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:46 +05:30
Hanna Hawa 35e34480c5 dmaengine: mv_xor_v2: remove unnecessary write to DESQ_STOP register
Remove unnecessary write to DESQ_STOP register, this register is used to
enable or disable the XOR engine, and not to issue all pending
descriptors in the queue. mv_xor_v2 driver already writes to this
register and enable XOR engine in the mv_xor_v2_descq_init() function,
called during initialization.

Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:45 +05:30
Hanna Hawa d793327fac dmaengine: mv_xor_v2: implement proper interrupt coalescing
Until now, the driver was not using interrupt coalescing: one interrupt
was generated for each descriptor processed by the XOR engine. This
commit changes that by using the interrupt coalescing features of the
hardware, by setting both a number of descriptors processed before an
interrupt is generated and a timeout before an interrupt is generated.

Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:45 +05:30
Thomas Petazzoni b2d3c270f9 dmaengine: mv_xor_v2: set DMA mask to 40 bits
The XORv2 engine on Armada 7K/8K can only access the first 40 bits of
the physical address space, so the DMA mask must be set accordingly.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:44 +05:30
Thomas Petazzoni 9dd4f319ba dmaengine: mv_xor_v2: remove interrupt coalescing
The current implementation of interrupt coalescing doesn't work, because
it doesn't configure the coalescing timer, which is needed to make sure
we get an interrupt at some point.

As a fix for stable, we simply remove the interrupt coalescing
functionality. It will be re-introduced properly in a future commit.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:44 +05:30
Thomas Petazzoni 44d5887a8b dmaengine: mv_xor_v2: fix tx_submit() implementation
The mv_xor_v2_tx_submit() gets the next available HW descriptor by
calling mv_xor_v2_get_desq_write_ptr(), which reads a HW register
telling the next available HW descriptor. This was working fine when HW
descriptors were issued for processing directly in tx_submit().

However, as part of the review process of the driver, a change was
requested to move the actual kick-off of HW descriptors processing to
->issue_pending(). Due to this, reading the HW register to know the next
available HW descriptor no longer works.

So instead of using this HW register, we implemented a software index
pointing to the next available HW descriptor.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:43 +05:30
Hanna Hawa ab2c5f0a77 dmaengine: mv_xor_v2: enable XOR engine after its configuration
The engine was enabled prior to its configuration, which isn't
correct. This patch relocates the activation of the XOR engine, to be
after the configuration of the XOR engine.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:24:40 +05:30
Thomas Petazzoni bc473da1ed dmaengine: mv_xor_v2: do not use descriptors not acked by async_tx
Descriptors that have not been acknowledged by the async_tx layer
should not be re-used, so this commit adjusts the implementation of
mv_xor_v2_prep_sw_desc() to skip descriptors for which
async_tx_test_ack() is false.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:23:19 +05:30
Thomas Petazzoni 2aab4e1815 dmaengine: mv_xor_v2: properly handle wrapping in the array of HW descriptors
mv_xor_v2_tasklet() is looping over completed HW descriptors. Before the
loop, it initializes 'next_pending_hw_desc' to the first HW descriptor
to handle, and then the loop simply increments this point, without
taking care of wrapping when we reach the last HW descriptor. The
'pending_ptr' index was being wrapped back to 0 at the end, but it
wasn't used in each iteration of the loop to calculate
next_pending_hw_desc.

This commit fixes that, and makes next_pending_hw_desc a variable local
to the loop itself.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:22:18 +05:30
Thomas Petazzoni eb8df543e4 dmaengine: mv_xor_v2: handle mv_xor_v2_prep_sw_desc() error properly
The mv_xor_v2_prep_sw_desc() is called from a few different places in
the driver, but we never take into account the fact that it might
return NULL. This commit fixes that, ensuring that we don't panic if
there are no more descriptors available.

Fixes: 19a340b1a8 ("dmaengine: mv_xor_v2: new driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-14 18:22:08 +05:30
Linus Torvalds 4879b7ae05 dmaengine updates for 4.12-rc1
This time again a smaller update consisting of:
 
 - support for TI DA8xx dma controller and updates to the cppi driver
 - updates on bunch of drivers like xilinx, pl08x, stm32-dma, mv_xor, ioat,
   dmatest
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Merge tag 'dmaengine-4.12-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This time again a smaller update consisting of:

   - support for TI DA8xx dma controller and updates to the cppi driver

   - updates on bunch of drivers like xilinx, pl08x, stm32-dma, mv_xor,
     ioat, dmatest"

* tag 'dmaengine-4.12-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (35 commits)
  dmaengine: pl08x: remove lock documentation
  dmaengine: pl08x: fix pl08x_dma_chan_state documentation
  dmaengine: pl08x: Use the BIT() macro consistently
  dmaengine: pl080: Fix some missing kerneldoc
  dmaengine: pl080: Cut some unused defines
  dmaengine: dmatest: Add check for supported buffer count (sg_buffers)
  dmaengine: dmatest: Select DMA_ENGINE_RAID as its needed for the slave_sg test
  dmaengine: virt-dma: Convert to use list_for_each_entry_safe()
  dma-debug: use offset_in_page() macro
  dmaengine: mv_xor: use offset_in_page() macro
  dmaengine: dmatest: use offset_in_page() macro
  dmaengine: sun4i: fix invalid argument
  dmaengine: ioat: use setup_timer
  dmaengine: cppi41: Fix an Oops happening in cppi41_dma_probe()
  dmaengine: pl330: remove pdata based initialization
  dmaengine: cppi: fix build error due to bad variable
  dmaengine: imx-sdma: add 1ms delay to ensure SDMA channel is stopped
  dmaengine: cppi41: use managed functions devm_*()
  dmaengine: cppi41: fix cppi41_dma_tx_status() logic
  dmaengine: qcom_hidma: pause the channel on shutdown
  ...
2017-05-09 15:40:28 -07:00
Vinod Koul be13ec668d Merge branch 'topic/pl330' into for-linus 2017-05-04 16:08:52 +05:30
Vinod Koul b7b0201a67 Merge branch 'topic/xilinx' into for-linus 2017-05-04 16:08:21 +05:30
Vinod Koul 3378e7a49f Merge branch 'topic/qcom' into for-linus 2017-05-04 16:08:10 +05:30
Vinod Koul dd2b9ff8a9 Merge branch 'topic/pl08x' into for-linus 2017-05-04 16:07:59 +05:30
Vinod Koul 417cb97253 dmaengine: pl08x: remove lock documentation
lock variable in pl08x_dma_chan_state no longer exists so remove it

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-04 16:06:30 +05:30
Vinod Koul 8ee1bdc5a4 dmaengine: pl08x: fix pl08x_dma_chan_state documentation
Documentation for pl08x_dma_chan_state mentions it as struct whereas it is a
enum, so fix that

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-04 16:06:21 +05:30
Linus Walleij ded091fee6 dmaengine: pl08x: Use the BIT() macro consistently
This makes the driver shift bits with BIT() which is used on other
places in the driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-04 16:05:41 +05:30
Linus Walleij da7cbd2098 dmaengine: pl080: Fix some missing kerneldoc
Two elements of the physical channel description was missing.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-04 16:05:30 +05:30
Vinod Koul f23514b101 Merge branch 'topic/cppi' into for-linus 2017-05-04 16:03:05 +05:30
Stefan Roese fbfb8e1dce dmaengine: dmatest: Add check for supported buffer count (sg_buffers)
When using dmatest with sg_buffers=128 I stumbled upon the problem, that
the "map_cnt" variable of "struct dmaengine_unmap_data" was set to 0.
"map_cnt" is an "u8" variable, resulting in an overrun when its
value is set to src_cnt + dst_cnt, to twice the sg_buffer value.

This patch adds a small check to dmatest, so that this confusing error
is detected and the test is aborted.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kedareswara rao Appana <appanad@xilinx.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-01 15:51:06 +05:30
Stefan Roese 58532e6626 dmaengine: dmatest: Select DMA_ENGINE_RAID as its needed for the slave_sg test
To enable usage of multiple SG buffers via the sg_buffers= module
parameter, lets select DMA_ENGINE_RAID via Kconfig when DMATEST is
configured. Otherwise the dmatest will "BUG" when more than 1
buffer (total of 2 for src + dst) is configured via sg_buffers.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kedareswara rao Appana <appanad@xilinx.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-05-01 15:50:59 +05:30
Andy Shevchenko fdb980fb17 dmaengine: virt-dma: Convert to use list_for_each_entry_safe()
Use list_for_each_entry_safe() instead of open coding variants.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-26 09:03:27 +05:30
Geliang Tang b70e52cacb dmaengine: mv_xor: use offset_in_page() macro
Use offset_in_page() macro instead of open-coding.

Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-24 18:40:03 +05:30
Geliang Tang f62e5f613e dmaengine: dmatest: use offset_in_page() macro
Use offset_in_page() macro instead of open-coding.

Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-24 18:40:03 +05:30
Marc Gonzalez 57192245bc dmaengine: sun4i: fix invalid argument
The "pchans_used" field is an unsigned long array.

for_each_clear_bit_from() expects an unsigned long pointer,
not an array address.

$ make C=2 drivers/dma/sun4i-dma.o
  CHECK   drivers/dma/sun4i-dma.c
drivers/dma/sun4i-dma.c:241:9: warning: incorrect type in argument 1 (different base types)
drivers/dma/sun4i-dma.c:241:9:    expected unsigned long const *p
drivers/dma/sun4i-dma.c:241:9:    got unsigned long ( *<noident> )[1]

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-24 09:50:05 +05:30
Geliang Tang 68747c5f3d dmaengine: ioat: use setup_timer
Use setup_timer() instead of init_timer() to simplify the code.

Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-24 09:38:41 +05:30
Alexandre Bailon eda6f4e868 dmaengine: cppi41: Fix an Oops happening in cppi41_dma_probe()
This fix an Oops happening on all platforms using the old dt bindings
(all platforms but da8xx).
This update cppi41_dma_probe() to use the index variable which is
required to keep compatibility between old and new dt bindings.

Fixes: 8e3ba95f41 ("dmaengine: cppi41: use managed functions devm_*()")
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-04-06 12:41:59 +05:30
Marek Szyprowski e8bb467359 dmaengine: pl330: remove pdata based initialization
This driver is now used only on platforms which support device tree, so
it is safe to remove legacy platform data based initialization code.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
For plat-samsung:
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-28 21:37:48 +05:30
Vinod Koul d7fd724e01 dmaengine: cppi: fix build error due to bad variable
Commit 8e3ba95f41 ("dmaengine: cppi41: use managed functions devm_*()")
moved the code to devm_* but erranously changed a varible name, so fix it.

drivers/dma/cppi41.c:1052:5: error: 'struct cppi41_dd' has no member named 'qmrg_mem'
  cdd->qmrg_mem = devm_ioremap_resource(dev, mem);
     ^
drivers/dma/cppi41.c:1053:16: error: 'struct cppi41_dd' has no member named 'qmrg_mem'
  if (IS_ERR(cdd->qmrg_mem))
                ^
drivers/dma/cppi41.c:1054:21: error: 'struct cppi41_dd' has no member named 'qmrg_mem'
   return PTR_ERR(cdd->qmrg_mem);
                     ^

Fixes: 8e3ba95f41 ("dmaengine: cppi41: use managed functions devm_*()")
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 13:44:51 +05:30
Jiada Wang 7f3ff14b7e dmaengine: imx-sdma: add 1ms delay to ensure SDMA channel is stopped
sdma_disable_channel() cannot ensure dma is stopped to access
module's FIFOs. There is chance SDMA core is running and accessing
BD when disable of corresponding channel, this may cause sometimes
even after call of .sdma_disable_channel(), SDMA core still be
running and accessing module's FIFOs.

According to NXP R&D team a delay of one BD SDMA cost time (maximum
is 1ms) should be added after disable of the channel bit, to ensure
SDMA core has really been stopped after SDMA clients call
.device_terminate_all.

This patch introduces adds a new function sdma_disable_channel_with_delay()
which simply adds 1ms delay after call sdma_disable_channel(),
and set it as .device_terminate_all.

Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:50:59 +05:30
Andy Shevchenko 8e3ba95f41 dmaengine: cppi41: use managed functions devm_*()
This makes the error handling much more simpler than open-coding
everything and in addition makes the probe function smaller an tidier.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:49:34 +05:30
Andy Shevchenko a08f2673dd dmaengine: cppi41: fix cppi41_dma_tx_status() logic
It makes sense to set residue when channel is in progress. Otherwise it
should be 0 since transfer is completed. Meanwhile this patch doesn't
prevent to set residue value anyway.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:49:34 +05:30
Sinan Kaya dc7c733acb dmaengine: qcom_hidma: pause the channel on shutdown
We need to ensure that all DMAs and interrupts are cleared during
shutdown operation in order for kexec to start the next kernel clearly.

Otherwise, HW could be performing a DMA into random addresses in the
middle of second kernel start.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:43:38 +05:30
Sinan Kaya c3a4528788 dmaengine: qcom_hidma: disable/enable IRQs on pause/resume
Once the channels are stopped, disable interrupts to make sure no new
HW interaction can happen.

Similarly, re-enable the interrupts only if we know that channel is
operational again.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:43:38 +05:30
Kuninori Morimoto 1175f83cdb dmaengine: rcar-dmac: enable descriptor mode on 40bit
SYS-DMAC can use 40bit address transfer, and it supports Descriptor
Mode too. Current SYS-DMAC driver disables Descriptor Mode if it was
40bit address today. But it can use Descriptor Mode with 40bit if
transfer Source/Destination address are located in same 4GiB region
in the 40 bit address space.
This patch enables it if all condition was clear

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27 10:06:37 +05:30
Akinobu Mita db6a3d03e2 dmaengine: xilinx: avoid memory corruption for device_prep_dma_memcpy()
The device_prep_dma_memcpy() callback for this driver allocates a new
xilinx_dma_tx_descriptor whose TX segments list is initialized as empty,
but then gets invalid TX segment pointer by list_last_entry() from the
empty TX segments list and memory corruption happens by the attempt to
update the next descriptor in invalid TX segment pointer.

This removes unnecessary memory access for nonexistent tail TX segment
which causes memory corruption.

Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-14 16:14:29 +05:30
Akinobu Mita 676f9c26c3 dmaengine: xilinx: fix device_terminate_all() callback for AXI CDMA
The device_terminate_all() callback for this driver stops current DMA
operations by clearing RUNSTOP bit in the control register and waiting
HALTED bit set in the status register.

But AXI CDMA which is one of the supported DMA engine by this driver
does not provide the run / stop controls and those bits in the control
and status registers are reserved.  So when device_terminate_all() is
called, the error message is printed and the channel is marked as having
errors in xilinx_dma_halt().

This change adds stop_transfer() callback which differentiates CDMA and
other DMA engine.  The CDMA's one avoids the unsupported operations and
instead polls the status register to check if the DMA operations are in
progress for AXI CDMA.

Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-14 16:14:29 +05:30
Matthias Kaehlcke 23f963e91f dmaengine: Fix array index out of bounds warning in __get_unmap_pool()
This fixes the following warning when building with clang and
CONFIG_DMA_ENGINE_RAID=n :

drivers/dma/dmaengine.c:1102:11: error: array index 2 is past the end of the array (which contains 1 element) [-Werror,-Warray-bounds]
                return &unmap_pool[2];
                        ^          ~
drivers/dma/dmaengine.c:1083:1: note: array 'unmap_pool' declared here
static struct dmaengine_unmap_pool unmap_pool[] = {
^
drivers/dma/dmaengine.c:1104:11: error: array index 3 is past the end of the array (which contains 1 element) [-Werror,-Warray-bounds]
                return &unmap_pool[3];
                        ^          ~
drivers/dma/dmaengine.c:1083:1: note: array 'unmap_pool' declared here
static struct dmaengine_unmap_pool unmap_pool[] = {

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-14 10:11:27 +05:30
Lucas Stach 6f3125ceb6 dmaengine: imx-sdma: advertise correct residue granularity
The SDMA hardware/driver does not actually report the transfer residue at
burst size granularity, but in fact is only able to report residue after
each finished segment.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-14 10:01:44 +05:30
Colin Ian King 7c3f4309a0 dmaengine: mv_xor: remove redundant null check on cd
The check to see if cd is null is redundant, pdata->channels is
never null at this point, and hence &pdata->channels[i] cannot
be null, so remove the null check.

Detected by CoverityScan, CID#1357194 ("Logically Dead Code")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-14 07:59:35 +05:30
Alexandre Bailon 4f68b09ea3 dmaengine: cppi41: Fix teardown warnings
During the teardown of a RX channel, because there is only one
completion queue available for RX channel, descriptor of another
channel may be popped which will cause 2 warnings:
- the first one because we popped a wrong descriptor
  (neither the channel's descriptor, nor the teardown descriptor).
- the second one happen during the teardown of another channel,
  because we can't find the channel descriptor
  (that is, the one that caused the first warning).
To avoid that, use one free queue instead of a transmit completion queue.

Note that fix doesn't fix all the teardown warnings:
I still get some when I run some corner case.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:42:28 +05:30
Alexandre Bailon e3fa49acf0 dmaengine: cppi41: Add support of DA8xx to CPPI 4.1
The DA8xx has a CPPI 4.1 DMA controller.
This is add the glue layer required to make it work on DA8xx.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:42:27 +05:30
Alexandre Bailon a15382b75b dmaengine: cppi41: Remove isr callback from glue layer
All the platform code to manage IRQ has been moved to MUSB,
and now the interrupt handler is completely generic.
Remove the isr callback that is not useful anymore.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:38:25 +05:30
Alexandre Bailon 5e46fe98ab dmaengine: cppi41: init_sched(): Get number of channels from DT
Despite the driver is already using DT to get the number of channels,
init_sched() is using an hardcoded value to get it.
Use DT to get the number of channels.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:38:25 +05:30
Alexandre Bailon 2d535b2629 dmaengine: cppi41: Move some constants to glue layer
Some constants are defined and use by the driver whereas they are
specifics to AM335x.
Add new variables to the glue layer, initialize them with the constants,
and use them in the driver.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:38:24 +05:30
Alexandre Bailon e1f40bf02d dmaengine: cppi41: rename platform variables
Currently, only the AM335x is supported by the driver.
Though the driver has a glue layer to support different platforms,
some platform variable names are not prefixed with the platform name.
To facilitate the addition of a new platform,
rename some variables owned by the AM335x glue.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:38:24 +05:30
Alexandre Bailon 6ee60246ac dmaengine: cppi41: Remove usbss_mem
In order to make CPPI 4.1 DMA driver more generic, accesses to USBSS
have been removed. So it is not required anymore to map the "glue"
register's.
Remove usbss_mem.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-07 13:38:24 +05:30
Colin Ian King 041cf7e064 dmaengine: stm32-dma: fix up error dev_err message
Trivial fix to spelling mistake and make channel plural.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-06 10:41:24 +05:30
Matthias Reichl 2201ac6129 dmaengine: bcm2835: Fix cyclic DMA period splitting
The code responsible for splitting periods into chunks that
can be handled by the DMA controller missed to update total_len,
the number of bytes processed in the current period, when there
are more chunks to follow.

Therefore total_len was stuck at 0 and the code didn't work at all.
This resulted in a wrong control block layout and audio issues because
the cyclic DMA callback wasn't executing on period boundaries.

Fix this by adding the missing total_len update.

Signed-off-by: Matthias Reichl <hias@horus.com>
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-06 08:49:11 +05:30
Ingo Molnar 0881e7bd34 sched/headers: Prepare to move the get_task_struct()/put_task_struct() and related APIs from <linux/sched.h> to <linux/sched/task.h>
But first update usage sites with the new header dependency.

Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-03-02 08:42:40 +01:00
Linus Torvalds 37c85961c3 TTY/Serial driver patches for 4.11-rc1
Here is the big tty/serial driver patchset for 4.11-rc1.
 
 Not much here, but a lot of little fixes and individual serial driver
 updates all over the subsystem.  Majority are for the sh-sci driver and
 platform (the arch-specific changes have acks from the maintainer).
 
 The start of the "serial bus" code is here as well, but nothing is
 converted to use it yet.  That work is still ongoing, hopefully will
 start to show up across different subsystems for 4.12 (bluetooth is one
 major place that will be used.)
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver updates from Greg KH:
 "Here is the big tty/serial driver patchset for 4.11-rc1.

  Not much here, but a lot of little fixes and individual serial driver
  updates all over the subsystem. Majority are for the sh-sci driver and
  platform (the arch-specific changes have acks from the maintainer).

  The start of the "serial bus" code is here as well, but nothing is
  converted to use it yet. That work is still ongoing, hopefully will
  start to show up across different subsystems for 4.12 (bluetooth is
  one major place that will be used.)

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (109 commits)
  tty: pl011: Work around QDF2400 E44 stuck BUSY bit
  atmel_serial: Use the fractional divider when possible
  tty: Remove extra include in HVC console tty framework
  serial: exar: Enable MSI support
  serial: exar: Move register defines from uapi header to consumer site
  serial: pci: Remove unused pci_boards entries
  serial: exar: Move Commtech adapters to 8250_exar as well
  serial: exar: Fix feature control register constants
  serial: exar: Fix initialization of EXAR registers for ports > 0
  serial: exar: Fix mapping of port I/O resources
  serial: sh-sci: fix hardware RX trigger level setting
  tty/serial: atmel: ensure state is restored after suspending
  serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt
  serdev: ttyport: check whether tty_init_dev() fails
  serial: 8250_pci: make pciserial_detach_ports() static
  ARM: dts: STiH410-b2260: Enable HW flow-control
  ARM: dts: STiH407-family: Use new Pinctrl groups
  ARM: dts: STiH407-pinctrl: Add Pinctrl group for HW flow-control
  ARM: dts: STiH410-b2260: Identify the UART RTS line
  dt-bindings: serial: Update 'uart-has-rtscts' description
  ...
2017-02-22 12:17:25 -08:00
Linus Torvalds 8ff546b801 USB/PHY patches for 4.11-rc1
Here is the big USB and PHY driver updates for 4.11-rc1.
 
 Nothing major, just the normal amount of churn in the usb gadget and dwc
 and xhci controllers, new device ids, new phy drivers, a new usb-serial
 driver, and a few other minor changes in different USB drivers.
 
 All have been in linux-next for a long time with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big USB and PHY driver updates for 4.11-rc1.

  Nothing major, just the normal amount of churn in the usb gadget and
  dwc and xhci controllers, new device ids, new phy drivers, a new
  usb-serial driver, and a few other minor changes in different USB
  drivers.

  All have been in linux-next for a long time with no reported issues"

* tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (265 commits)
  usb: cdc-wdm: remove logically dead code
  USB: serial: keyspan: drop header file
  USB: serial: io_edgeport: drop io-tables header file
  usb: musb: add code comment for clarification
  usb: misc: add USB251xB/xBi Hi-Speed Hub Controller Driver
  usb: misc: usbtest: remove redundant check on retval < 0
  USB: serial: upd78f0730: sort device ids
  USB: serial: upd78f0730: add ID for EVAL-ADXL362Z
  ohci-hub: fix typo in dbg_port macro
  usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS
  usb: musb: tusb6010: Clean up tusb_omap_dma structure
  usb: musb: cppi_dma: Clean up cppi41_dma_controller structure
  usb: musb: cppi_dma: Clean up cppi structure
  usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback()
  usb: musb: dma: Add a DMA completion platform callback
  drivers: usb: usbip: Add missing break statement to switch
  usb: mtu3: remove redundant dev_err call in get_ssusb_rscs()
  USB: serial: mos7840: fix another NULL-deref at open
  USB: serial: console: clean up sanity checks
  USB: serial: console: fix uninitialised spinlock
  ...
2017-02-22 11:15:59 -08:00
Linus Torvalds 97a229f907 dmaengine updates for 4.11-rc1
This time we fairly boring and bit small update.
 
 - Support for Intel iDMA 32-bit hardware
 - deprecate broken support for channel switching in async_tx
 - bunch of updates on stm32-dma
 - Cyclic support for zx dma and making in generic zx dma driver
 - Small updates to bunch of other drivers
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Merge tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This time we fairly boring and bit small update.

   - Support for Intel iDMA 32-bit hardware
   - deprecate broken support for channel switching in async_tx
   - bunch of updates on stm32-dma
   - Cyclic support for zx dma and making in generic zx dma driver
   - Small updates to bunch of other drivers"

* tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
  async_tx: deprecate broken support for channel switching
  dmaengine: rcar-dmac: Widen DMA mask to 40 bits
  dmaengine: sun6i: allow build on ARM64 platforms (sun50i)
  dmaengine: Provide a wrapper for memcpy operations
  dmaengine: zx: fix build warning
  dmaengine: dw: we do support Merrifield SoC in PCI mode
  dmaengine: dw: add support of iDMA 32-bit hardware
  dmaengine: dw: introduce register mappings for iDMA 32-bit
  dmaengine: dw: introduce block2bytes() and bytes2block()
  dmaengine: dw: extract dwc_chan_pause() for future use
  dmaengine: dw: replace convert_burst() with one liner
  dmaengine: dw: register IRQ and DMA pool with instance ID
  dmaengine: dw: Fix data corruption in large device to memory transfers
  dmaengine: ste_dma40: indicate granularity on channels
  dmaengine: ste_dma40: indicate directions on channels
  dmaengine: stm32-dma: Add error messages if xlate fails
  dmaengine: dw: pci: remove LPE Audio DMA ID
  dmaengine: stm32-dma: Add max_burst support
  dmaengine: stm32-dma: Add synchronization support
  dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
  ...
2017-02-21 17:06:22 -08:00
Vinod Koul 1ad651154b Merge branch 'topic/zx' into for-linus 2017-02-21 21:14:35 +05:30
Vinod Koul 8a3ec58382 Merge branch 'topic/stm32-dma' into for-linus 2017-02-21 21:14:27 +05:30
Vinod Koul 25036f2a73 Merge branch 'topic/ste' into for-linus 2017-02-21 21:14:07 +05:30
Vinod Koul e4e48c47d1 Merge branch 'topic/intel' into for-linus 2017-02-21 21:13:57 +05:30
Geert Uytterhoeven dc312349e8 dmaengine: rcar-dmac: Widen DMA mask to 40 bits
By default, the DMA mask covers only the low 32-bit address space, which
causes SWIOTLB on arm64 to fall back to a bounce buffer for DMA
transfers involving memory outside the 32-bit address space.

The R-Car DMA controller hardware supports a 40-bit address space, hence
widen the DMA mask to 40 bits to actually make use of this feature.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-02-14 13:23:02 +05:30
Joerg Roedel 8d2932dd06 Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/mediatek', 'arm/core', 'x86/vt-d' and 'core' into next 2017-02-10 15:13:10 +01:00
Alexandre Bailon 255348289f usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS
Despite the CPPI 4.1 is a generic DMA, it is tied to USB.
On the DSPS, CPPI 4.1 interrupt's registers are in USBSS (the MUSB glue).
Currently, to enable / disable and clear interrupts, the CPPI 4.1 driver
maps and accesses to USBSS's register, which making CPPI 4.1 driver not
really generic.
Move the interrupt management to DSPS driver.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-02-09 13:35:05 +01:00
Icenowy Zheng c429ceb1e1 dmaengine: sun6i: allow build on ARM64 platforms (sun50i)
As 64-bit Allwinner H5 SoC has the same DMA engine with H3, the DMA
driver should be allowed to be built for ARM64, in order to make it work on H5.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-02-05 12:48:48 +05:30
Joerg Roedel ce273db0ff Merge branch 'iommu/iommu-priv' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/core 2017-01-30 16:05:18 +01:00
Iago Abal 91539eb1fd dmaengine: pl330: fix double lock
The static bug finder EBA (http://www.iagoabal.eu/eba/) reported the
following double-lock bug:

    Double lock:
    1. spin_lock_irqsave(pch->lock, flags) at pl330_free_chan_resources:2236;
    2. call to function `pl330_release_channel' immediately after;
    3. call to function `dma_pl330_rqcb' in line 1753;
    4. spin_lock_irqsave(pch->lock, flags) at dma_pl330_rqcb:1505.

I have fixed it as suggested by Marek Szyprowski.

First, I have replaced `pch->lock' with `pl330->lock' in functions
`pl330_alloc_chan_resources' and `pl330_free_chan_resources'. This avoids
the double-lock by acquiring a different lock than `dma_pl330_rqcb'.

NOTE that, as a result, `pl330_free_chan_resources' executes
`list_splice_tail_init' on `pch->work_list' under lock `pl330->lock',
whereas in the rest of the code `pch->work_list' is protected by
`pch->lock'. I don't know if this may cause race conditions. Similarly
`pch->cyclic' is written by `pl330_alloc_chan_resources' under
`pl330->lock' but read by `pl330_tx_submit' under `pch->lock'.

Second, I have removed locking from `pl330_request_channel' and
`pl330_release_channel' functions. Function `pl330_request_channel' is
only called from `pl330_alloc_chan_resources', so the lock is already
held. Function `pl330_release_channel' is called from
`pl330_free_chan_resources', which already holds the lock, and from
`pl330_del'. Function `pl330_del' is called in an error path of
`pl330_probe' and at the end of `pl330_remove', but I assume that there
cannot be concurrent accesses to the protected data at those points.

Signed-off-by: Iago Abal <mail@iagoabal.eu>
Reviewed-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 15:35:11 +05:30
Jun Nie 067fdeb2f3 dmaengine: zx: fix build warning
Fix build warning that related to PAGE_SIZE. The maximum DMA
length has nothing to do with PAGE_SIZE, just use a fix number
for the definition.

drivers/dma/zx_dma.c: In function 'zx_dma_prep_memcpy':
drivers/dma/zx_dma.c:523:8: warning: division by zero [-Wdiv-by-zero]
drivers/dma/zx_dma.c: In function 'zx_dma_prep_slave_sg':
drivers/dma/zx_dma.c:567:11: warning: division by zero [-Wdiv-by-zero]

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 15:33:45 +05:30
Andy Shevchenko f7c799e950 dmaengine: dw: we do support Merrifield SoC in PCI mode
Intel Merrifield platform contains Intel integrated DMA (iDMA 32-bit) which has
a slightly different register mapping, e.g. some bits in CTL_* and CFG_*
channel registers, and has to use platform data since there is no
autoconfiguration.

The iDMA 32-bit specification is available in the publicly available
documentation for Intel Braswell and BayTrail SoCs as LPE Audio DMA.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:40 +05:30
Andy Shevchenko 199244d694 dmaengine: dw: add support of iDMA 32-bit hardware
iDMA 32-bit is Intel designed DMA controller that behaves like Synopsys
Designware DMA. This patch adds a support of the new Intel hardware.

Due to iDMA 32-bit has no autoconfiguration the platform code must
provide a platform data to dw_dma_probe().

By default full FIFO (1024 bytes) is assigned to channel 0. Here we
slice FIFO on equal parts between channels for iDMA 32-bit case.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:40 +05:30
Andy Shevchenko a9f4d1b831 dmaengine: dw: introduce register mappings for iDMA 32-bit
The integrated DMA (iDMA 32-bit) is Intel designed DMA controller which
mimics Synopsys Designware DMA. This patch appends the register mappings
for the parts which are slightly different to the DesignWare hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:40 +05:30
Andy Shevchenko 2d248812aa dmaengine: dw: introduce block2bytes() and bytes2block()
The newly introduced helpers prepare driver to support new DMA controller
hardware.

While here, introduce DWC_CTLH_BLOCK_TS() macro as well.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:40 +05:30
Andy Shevchenko f4aa3183c3 dmaengine: dw: extract dwc_chan_pause() for future use
iDMA 32-bit has a special handling of the FIFO during pause() /
terminate_all(). Prepare code to implement that.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:39 +05:30
Andy Shevchenko be242f4e2e dmaengine: dw: replace convert_burst() with one liner
Replace convert_burst() with one liner in place.

The change simplifies further extension of the driver to cover new DMA
controller hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:39 +05:30
Andy Shevchenko 08d62f58aa dmaengine: dw: register IRQ and DMA pool with instance ID
It is really useful not only for debugging to have an IRQ line and DMA
pool labeled with driver and its instance ID. Do this for DesignWare DMA
driver.

All current users of this IP would be enhanced later on.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:39 +05:30
Jarkko Nikula a46a763401 dmaengine: dw: Fix data corruption in large device to memory transfers
When transferring more data than the maximum block size supported by the
HW multiplied by source width the transfer is split into smaller chunks.
Currently code calculates the memory width and thus aligment before
splitting for both memory to device and device to memory transfers.

For memory to device transfers this work fine since alignment is preserved
through the splitting and split blocks are still memory width aligned.
However in device to memory transfers aligment breaks when maximum block
size multiplied by register width doesn't have the same alignment than the
buffer. For instance when transferring from an 8-bit register 4100 bytes
(32-bit aligned) on a DW DMA that has maximum block size of 4095 elements.
An attempt to do such transfers caused data corruption.

Fix this by calculating and setting the destination memory width after
splitting by using the split block aligment and length.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:51:39 +05:30
Tony Lindgren 6610d0edf6 dmaengine: cppi41: Clean up pointless warnings
With patches "dmaengine: cppi41: Fix runtime PM timeouts with USB mass
storage", and "dmaengine: cppi41: Fix oops in cppi41_runtime_resume",
the pm_runtime_get/put() in cppi41_irq() is no longer needed. We now
guarantee that cppi41 is enabled when dma is in use.

We can still get pointless error -115 when musb is configured as a
usb peripheral. That's because we should now check for the state of
is_suspended instead.

Let's just remove the now useless code and replace it with a WARN().

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:30:50 +05:30
Tony Lindgren 362f456246 dmaengine: cppi41: Fix oops in cppi41_runtime_resume
Commit fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
together with recent MUSB changes allowed USB and DMA on BeagleBone to idle
when no cable is connected. But looks like few corner case issues still
remain.

Looks like just by re-plugging USB cable about ten or so times on BeagleBone
when configured in USB peripheral mode we can get warnings and eventually
trigger an oops in cppi41 DMA:

WARNING: CPU: 0 PID: 14 at drivers/dma/cppi41.c:1154 cppi41_runtime_suspend+
x28/0x38 [cppi41]
...

WARNING: CPU: 0 PID: 14 at drivers/dma/cppi41.c:452
push_desc_queue+0x94/0x9c [cppi41]
...

Unable to handle kernel NULL pointer dereference at virtual
address 00000104
pgd = c0004000
[00000104] *pgd=00000000
Internal error: Oops: 805 [#1] SMP ARM
...
[<bf0d92cc>] (cppi41_runtime_resume [cppi41]) from [<c0589838>]
(__rpm_callback+0xc0/0x214)
[<c0589838>] (__rpm_callback) from [<c05899ac>] (rpm_callback+0x20/0x80)
[<c05899ac>] (rpm_callback) from [<c0589460>] (rpm_resume+0x504/0x78c)
[<c0589460>] (rpm_resume) from [<c058a1a0>] (pm_runtime_work+0x60/0xa8)
[<c058a1a0>] (pm_runtime_work) from [<c0156120>] (process_one_work+0x2b4/0x808)

This is because of a race with runtime PM and cppi41_dma_issue_pending()
as reported by Alexandre Bailon <abailon@baylibre.com> in earlier
set of patches. Based on mailing list discussions we however came to the
conclusion that a different fix from Alexandre's fix is needed in order
to guarantee that DMA is really active when we try to use it.

To fix the issue, we need to add a driver specific flag as we otherwise
can have -EINPROGRESS state set by runtime PM and can't rely on
pm_runtime_active() to tell us when we can use the DMA.

And we need to make sure the DMA transfers get triggered in the queued
order. So let's always queue the transfers, then flush the queue
from both cppi41_dma_issue_pending() and cppi41_runtime_resume()
as suggested by Grygorii Strashko <grygorii.strashko@ti.com> in an
earlier example patch.

For reference, this is also documented in Documentation/power/runtime_pm.txt
in the example at the end of the file as pointed out by Grygorii Strashko
<grygorii.strashko@ti.com>.

Based on earlier patches from Alexandre Bailon <abailon@baylibre.com>
and Grygorii Strashko <grygorii.strashko@ti.com> modified based on
testing and what was discussed on the mailing lists.

Fixes: fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Bin Liu <b-liu@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Patrick Titiano <ptitiano@baylibre.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reported-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:29:22 +05:30
Tony Lindgren ae4a3e028b dmaengine: cppi41: Fix runtime PM timeouts with USB mass storage
Commit fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
added runtime PM support for cppi41, but had corner case issues. Some of
the issues were fixed with commit 098de42ad6 ("dmaengine: cppi41: Fix
unpaired pm runtime when only a USB hub is connected"). That fix however
caused a new regression where we can get error -115 messages with USB on
BeagleBone when connecting a USB mass storage device to a hub.

This is because when connecting a USB mass storage device to a hub, the
initial DMA transfers can take over 200ms to complete and cppi41
autosuspend delay times out.

To fix the issue, we want to implement refcounting for chan_busy array
that contains the active dma transfers. Increasing the autosuspend delay
won't help as that the delay could be potentially seconds, and it's best
to let the USB subsystem to deal with the timeouts on errors.

The earlier attempt for runtime PM was buggy as the pm_runtime_get/put()
calls could get unpaired easily as they did not follow the state of
the chan_busy array as described in commit 098de42ad6 ("dmaengine:
cppi41: Fix unpaired pm runtime when only a USB hub is connected".

Let's fix the issue by adding pm_runtime_get() to where a new transfer
is added to the chan_busy array, and calls to pm_runtime_put() where
chan_busy array entry is cleared. This prevents any autosuspend timeouts
from happening while dma transfers are active.

Fixes: 098de42ad6 ("dmaengine: cppi41: Fix unpaired pm runtime when
only a USB hub is connected")
Fixes: fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Bin Liu <b-liu@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Patrick Titiano <ptitiano@baylibre.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-25 11:29:11 +05:30
Mitchel Humpherys 1b2354dbcc dmaengine: pl330: Make sure microcode is privileged
The PL330 is hard-wired such that instruction fetches on both the
manager and channel threads go out onto the bus with the "privileged"
bit set. This can become troublesome once there is an IOMMU or other
form of memory protection downstream, since those will typically be
programmed by the DMA mapping subsystem in the expectation of normal
unprivileged transactions (such as the PL330 channel threads' own data
accesses as currently configured by this driver).

To avoid the case of, say, an IOMMU blocking an unexpected privileged
transaction with a permission fault, use the newly-introduced
DMA_ATTR_PRIVILEGED attribute for the mapping of our microcode buffer.
That way the DMA layer can do whatever it needs to do to make things
continue to work as expected on more complex systems.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[rm: remove now-redundant local variable, clarify commit message]
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-19 15:56:20 +00:00
Andy Shevchenko 4831e0d905 serial: 8250_mid: handle interrupt correctly in DMA case
Starting from Tangier B0 and continuing on Anniedale the HSU DMA interrupt
line is actually shared with UART. Handling them independently is racy and
quite often comes with the following traceback.

 irq 54: nobody cared (try booting with the "irqpoll" option)
 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.0-rc6-edison64-86244934+ #1
 Hardware name: Intel Corporation Merrifield/BODEGA BAY, BIOS 542 2015.01.21:18.19.48
  ffff88003f203eb0 ffffffff8130e718 ffff880032627000 ffff88003262709c
  ffff88003f203ed8 ffffffff810a3960 ffff880032627000 0000000000000000
  ffff880032627000 ffff88003f203f10 ffffffff810a3cc7 ffff880032627000
 Call Trace:
  <IRQ>
  [<ffffffff8130e718>] dump_stack+0x4d/0x65
  [<ffffffff810a3960>] __report_bad_irq+0x30/0xc0
  [<ffffffff810a3cc7>] note_interrupt+0x227/0x270
  [<ffffffff810a1380>] handle_irq_event_percpu+0x40/0x50
  [<ffffffff810a13b7>] handle_irq_event+0x27/0x50
  [<ffffffff810a42d5>] handle_fasteoi_irq+0x85/0x150
  [<ffffffff8101d7fe>] handle_irq+0x6e/0x120
  [<ffffffff8105b8bc>] ? _local_bh_enable+0x1c/0x50
  [<ffffffff8101d0d6>] do_IRQ+0x46/0xd0
  [<ffffffff818cef3f>] common_interrupt+0x7f/0x7f
  <EOI>
  [<ffffffff818cdead>] ? mwait_idle+0x7d/0x140
  [<ffffffff81024c9a>] arch_cpu_idle+0xa/0x10
  [<ffffffff818ce150>] default_idle_call+0x20/0x30
  [<ffffffff810908fd>] cpu_startup_entry+0x16d/0x1d0
  [<ffffffff818c882d>] rest_init+0x6d/0x70
  [<ffffffff81f93e8f>] start_kernel+0x3e2/0x3ef
  [<ffffffff81f9343d>] x86_64_start_reservations+0x38/0x3a
  [<ffffffff81f93529>] x86_64_start_kernel+0xea/0xed
 handlers:
 [<ffffffff81411670>] serial8250_interrupt
 Disabling IRQ #54

Fix this by handling interrupt only in one place.

The issue is discussed here: https://github.com/andy-shev/linux/issues/5

Moreover this also fixes another bug when Rx DMA returns wrong residue and we
can't rely on it.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-19 14:20:23 +01:00
Linus Walleij 15c6066865 dmaengine: ste_dma40: indicate granularity on channels
The ste_dma40 has burst level granularity on the residue
registers, which is necessary for some  clients to know,
notably the UART. Before this patch we get this message:

uart-pl011 80007000.uart: RX DMA disabled - no residue processing

This patch fixes it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-14 20:33:42 +05:30
Linus Walleij 49873e99b7 dmaengine: ste_dma40: indicate directions on channels
Since the introduction of the .directions flags, ste_dma40 was
never patched to indicate which transfer directions it can manage.
This causes a problem when trying to use the dmaengine for generic
ALSA SoC DMA:

ux500-msp-i2s.1: Failed to get DMA channel capabilities, falling
   back to period counting: -6

This patch fixes this issue by indicating the supported transfer
directions for slave and memcpy channels.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-14 20:33:33 +05:30
Niklas Söderlund 3139dc8ded dmaengine: rcar-dmac: unmap slave resource when channel is freed
The slave mapping should be removed together with other channel
resources when the channel is freed. If it's not unmapped it will hang
around forever after the channel is freed.

Fixes: 9f878603db ("dmaengine: rcar-dmac: add iommu support for slave transfers")
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-13 12:14:28 +05:30
Peter Ujfalusi 527a275913 dmaengine: omap-dma: Fix the port_window support
We do not yet have users of port_window. The following errors were found
when converting the tusb6010_omap.c musb driver:

- The peripheral side must have SRC_/DST_PACKED disabled
- when configuring the burst for the peripheral side the memory side
  configuration were overwritten: d->csdp = ... -> d->csdp |= ...
- The EI and FI were configured for the wrong sides of the transfers.

With these changes and the converted tus6010_omap.c I was able to verify
that things are working as they expected to work.

Fixes: 201ac4861c ("dmaengine: omap-dma: Support for slave devices with data port window")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-10 11:08:01 +05:30
M'boumba Cedric Madianga 5df4eb453c dmaengine: stm32-dma: Add error messages if xlate fails
This patch adds some error messages when a slave device fails to request a
channel.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-10 10:50:47 +05:30
Krister Johansen 21d25f6a42 dmaengine: iota: ioat_alloc_chan_resources should not perform sleeping allocations.
On a kernel with DEBUG_LOCKS, ioat_free_chan_resources triggers an
in_interrupt() warning.  With PROVE_LOCKING, it reports detecting a
SOFTIRQ-safe to SOFTIRQ-unsafe lock ordering in the same code path.

This is because dma_generic_alloc_coherent() checks if the GFP flags
permit blocking.  It allocates from different subsystems if blocking is
permitted.  The free path knows how to return the memory to the correct
allocator.  If GFP_KERNEL is specified then the alloc and free end up
going through cma_alloc(), which uses mutexes.

Given that ioat_free_chan_resources() can be called in interrupt
context, ioat_alloc_chan_resources() must specify GFP_NOWAIT so that the
allocations do not block and instead use an allocator that uses
spinlocks.

Signed-off-by: Krister Johansen <kjlx@templeofstupid.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-10 10:41:51 +05:30
Andy Shevchenko ebb7fe2100 dmaengine: dw: pci: remove LPE Audio DMA ID
LPE Audio driver should take care of DMA IPs by itself. Keeping an ID like this
in dw_dma_pci.c is anyway wrong since that block has two DMA controllers under
one ID (like MFD device).

That's also why I didn't include LPE Audio ID for Intel Merrifield previously.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-10 10:37:34 +05:30
M'boumba Cedric Madianga 276b0046ff dmaengine: stm32-dma: Add max_burst support
This patch sets the max_burst value supported by the STM32 DMA

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:23 +05:30
M'boumba Cedric Madianga dc80867510 dmaengine: stm32-dma: Add synchronization support
Implement the new device_synchronize() callback to allow proper
synchronization when stopping a channel.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:23 +05:30
M'boumba Cedric Madianga 2b12c5580e dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
This patch resolves the residue computation issue detected in cyclic mode.
Now, in cyclic mode, we increment next_sg variable as soon as a period is
transferred instead of after pushing a new sg request.
Then, we take into account that after transferring a complete buffer,
the next_sg variable is equal to 0.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:17 +05:30
M'boumba Cedric Madianga 8d1b76f031 dmaengine: stm32-dma: Rework starting transfer management
This patch reworks the way to manage transfer starting.
Now, starting DMA is only allowed when the channel is not busy.
Then, stm32_dma_start_transfer is declared as void.
At least, after each transfer completion, we start the next transfer if a
new descriptor as been queued in the issued list during an ongoing
transfer.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:17 +05:30
M'boumba Cedric Madianga ddf9bd4089 dmaengine: stm32-dma: Fix typo in Kconfig
As STM32 DMA driver is only used as buit-in driver, it couldn't be used as
module.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:17 +05:30
Marek Szyprowski 5c9e6c2b2b dmaengine: pl330: Fix runtime PM support for terminated transfers
PL330 DMA engine driver is leaking a runtime reference after any terminated
DMA transactions. This patch fixes this issue by tracking runtime PM state
of the device and making additional call to pm_runtime_put() in terminate_all
callback if needed.

Fixes: ae43b32891 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:18:13 +05:30
Peter Ujfalusi 836c3ce256 dmaengine: omap-dma: Fix dynamic lch_map allocation
The original patch did not done what it was supposed to be doing and even
worst it broke legacy boot (OMAP1).

The lch_map size should be the number of available logical channels in sDMA
and the od->dma_requests should store the number of available DMA request
lines usable in sDMA.

In legacy mode we do not have a way to get the DMA request count, in that
case we use OMAP_SDMA_REQUESTS (127), despite the fact that OMAP1510 have
only 31 DMA request line.

Fixes: 2d1a9a946f ("dmaengine: omap-dma: Dynamically allocate memory for lch_map")
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: stable@vger.kernel.org   # v4.9
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:10:15 +05:30
Shawn Guo 156ae09245 dmaengine: zx: fix residue calculation
The dma residue is defined as the free space to end of transfer buffer,
which could be multiple segments chained together.  So the residue
calculation in zx_dma_tx_status() works for both slave_sg and cyclic
case.  But unfortunately, the 'index' is wrong.  It should plus one,
because the current segment is already occupied and shouldn't be counted
into free space.

This fixes the HDMI audio noise issue we see on ZX296718 with SPDIF
interface.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 10:53:48 +05:30
Shawn Guo fc318d64f3 dmaengine: zx: set DMA_CYCLIC cap_mask bit
The zx_dma driver supports cyclic transfer mode.  Let's set DMA_CYCLIC
cap_mask bit to make that clear, and avoid unnecessary failure when
clients request channel via dma_request_chan_by_mask() with DMA_CYCLIC
bit set in mask.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 10:53:48 +05:30
Shawn Guo 253f9f4412 dmaengine: zx: rename zx296702_dma.c to zx_dma.c
ZTE ZX dma driver is not ZX296702 specific.  It works for not only
ZX296702 but also other ZTE ZX family platforms like ZX296718.  Let's
rename the file to reflect that.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 10:53:48 +05:30
Magnus Lilja adee40b265 dmaengine: ipu: Make sure the interrupt routine checks all interrupts.
Commit 3d8cc00073 ("dmaengine: ipu: Consolidate duplicated irq handlers")
consolidated the two interrupts routines into one, but the remaining
interrupt routine only checks the status of the error interrupts, not the
normal interrupts.

This patch fixes that problem (tested on i.MX31 PDK board).

Fixes: 3d8cc00073 ("dmaengine: ipu: Consolidate duplicated irq handlers")
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: <stable@vger.kernel.org> # 4.1.x
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 10:48:44 +05:30
Christophe JAILLET 75bdc7f31a dmaengine: ti-dma-crossbar: Add some 'of_node_put()' in error path.
Add some missing 'of_node_put()' in early exit error path.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 10:37:26 +05:30
Matthew Wilcox adc064cd9f dmaengine: Convert ID allocation to an IDA
dmaengine currently uses an IDR to allocate DMA IDs, but it only needs
to know whether IDs are in use or not; the ID to pointer functionality
of the IDR is unused.  That means it can use the more space-efficient IDA.

Signed-off-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 09:46:32 +05:30
M'boumba Cedric Madianga 57b5a32135 dmaengine: stm32-dma: Fix null pointer dereference in stm32_dma_tx_status
chan->desc is always set to NULL when a DMA transfer is complete.
As a DMA transfer could be complete during the call of stm32_dma_tx_status,
we need to be sure that chan->desc is not NULL before using this variable
to avoid a null pointer deference issue.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 09:28:52 +05:30
M'boumba Cedric Madianga 7e96304d99 dmaengine: stm32-dma: Set correct args number for DMA request from DT
This patch sets the right number of arguments to be used for DMA clients
which request channels from DT.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 09:28:52 +05:30
Jean Delvare 1032471b3e dmaengine: dw: fix typo in Kconfig
platfroms -> platforms

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Fixes: fed42c198b ("dma: dw: add PCI part of the driver")
Cc: Viresh Kumar <vireshk@kernel.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 08:13:00 +05:30
Dave Jiang 34a31f0af8 dmaengine: ioatdma: workaround SKX ioatdma version
The Skylake ioatdma is technically CBDMA 3.2+ and contains the same hardware
bits with some additional 3.3 features, but it's not really 3.3 where the
driver is concerned.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 08:12:59 +05:30
Dave Jiang 1594c18fd2 dmaengine: ioatdma: Add Skylake PCI Dev ID
Adding Skylake Xeon PCI device ids for ioatdma and related bits.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 08:12:59 +05:30
Thomas Gleixner 8b0e195314 ktime: Cleanup ktime_set() usage
ktime_set(S,N) was required for the timespec storage type and is still
useful for situations where a Seconds and Nanoseconds part of a time value
needs to be converted. For anything where the Seconds argument is 0, this
is pointless and can be replaced with a simple assignment.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
2016-12-25 17:21:22 +01:00
Linus Torvalds e3842cbfe0 dmaengine updates for 4.10-rc1
Fairly routine update this time around with all changes specific to drivers.
 
  o New driver for STMicroelectronics FDMA
  o Memory-to-memory transfers on dw dmac
  o Support for slave maps on pl08x devices
  o Bunch of driver fixes to use dma_pool_zalloc
  o Bunch of compile and warning fixes spread across drivers
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Merge tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "Fairly routine update this time around with all changes specific to
  drivers:

   - New driver for STMicroelectronics FDMA
   - Memory-to-memory transfers on dw dmac
   - Support for slave maps on pl08x devices
   - Bunch of driver fixes to use dma_pool_zalloc
   - Bunch of compile and warning fixes spread across drivers"

[ The ST FDMA driver already came in earlier through the remoteproc tree ]

* tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
  dmaengine: sirf-dma: remove unused ‘sdesc’
  dmaengine: pl330: remove unused ‘regs’
  dmaengine: s3c24xx: remove unused ‘cdata’
  dmaengine: stm32-dma: remove unused ‘src_addr’
  dmaengine: stm32-dma: remove unused ‘dst_addr’
  dmaengine: stm32-dma: remove unused ‘sfcr’
  dmaengine: pch_dma: remove unused ‘cookie’
  dmaengine: mic_x100_dma: remove unused ‘data’
  dmaengine: img-mdc: remove unused ‘prev_phys’
  dmaengine: usb-dmac: remove unused ‘uchan’
  dmaengine: ioat: remove unused ‘res’
  dmaengine: ioat: remove unused ‘ioat_dma’
  dmaengine: ioat: remove unused ‘is_raid_device’
  dmaengine: pl330: do not generate unaligned access
  dmaengine: k3dma: move to dma_pool_zalloc
  dmaengine: at_hdmac: move to dma_pool_zalloc
  dmaengine: at_xdmac: don't restore unsaved status
  dmaengine: ioat: set error code on failures
  dmaengine: ioat: set error code on failures
  dmaengine: DW DMAC: add multi-block property to device tree
  ...
2016-12-14 20:42:45 -08:00
Vinod Koul 4625d2a513 Merge branch 'topic/st_fdma' into for-linus 2016-12-14 09:07:07 +05:30
Vinod Koul 57fb7ee10c Merge branch 'topic/s3c64xx' into for-linus 2016-12-14 09:07:02 +05:30
Vinod Koul 90644ad7f2 Merge branch 'topic/qcom' into for-linus 2016-12-14 09:06:54 +05:30
Vinod Koul 83cb0dcaf1 Merge branch 'topic/pxa' into for-linus 2016-12-14 09:06:45 +05:30
Vinod Koul db82df3e81 Merge branch 'topic/omap' into for-linus 2016-12-14 09:06:30 +05:30
Vinod Koul 3f809e844c Merge branch 'topic/ioat' into for-linus 2016-12-14 09:06:23 +05:30
Linus Torvalds edc57ea92c remoteproc updates for v4.10
Introduces remoteproc "subdevice" support, which allows remoteproc
 driver to associate devices to the "running" state of the remoteproc,
 allowing devices to be probed and removed as the remote processor is
 booted, shut down or recovering from a crash.
 
 Handling of virtio device resources was improved, vring memory is now
 allocated as part of other memory allocation. This ensures that all
 vrings for all virtio devices are allocated before we boot the remote
 processor.
 
 The debugfs mechanism for starting and stopping remoteproc instances was
 replaced with a sysfs interface, also providing a mechanism for
 specifying firmware to use by the instance. This allows user space to
 load and boot use case specific firmware on remote processors.
 
 New drivers for the ST Slimcore and Qualcomm Hexagon DSP as well as
 removal of the unused StE modem loader.
 
 Finally support for crash recovery in the Qualcomm Wirelss subsystem
 (used for WiFi/BT/FM on a number of platforms) and a number of bug fixes
 and cleanups.
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Merge tag 'rproc-v4.10' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:

 - introduce remoteproc "subdevice" support, which allows remoteproc
   driver to associate devices to the "running" state of the remoteproc,
   allowing devices to be probed and removed as the remote processor is
   booted, shut down or recovering from a crash.

 - handling of virtio device resources was improved, vring memory is now
   allocated as part of other memory allocation. This ensures that all
   vrings for all virtio devices are allocated before we boot the remote
   processor.

 - the debugfs mechanism for starting and stopping remoteproc instances
   was replaced with a sysfs interface, also providing a mechanism for
   specifying firmware to use by the instance. This allows user space to
   load and boot use case specific firmware on remote processors.

 - new drivers for the ST Slimcore and Qualcomm Hexagon DSP as well as
   removal of the unused StE modem loader.

 - finally support for crash recovery in the Qualcomm Wirelss subsystem
   (used for WiFi/BT/FM on a number of platforms) and a number of bug
   fixes and cleanups

* tag 'rproc-v4.10' of git://github.com/andersson/remoteproc: (49 commits)
  remoteproc: qcom_adsp_pil: select qcom_scm
  remoteproc: Drop wait in __rproc_boot()
  remoteproc/ste: Delete unused driver
  remoteproc: Remove "experimental" warning
  remoteproc: qcom_adsp_pil: select qcom_scm
  dt-binding: soc: qcom: smd: Add label property
  remoteproc: qcom: mdt_loader: add include for sizes
  remoteproc: Update last rproc_put users to rproc_free
  remoteproc: qcom: adsp: Add missing MODULE_DEVICE_TABLE
  remoteproc: wcnss-pil: add QCOM_SMD dependency
  dmaengine: st_fdma: Revert: "Revert: Update st_fdma to 'depends on REMOTEPROC'"
  remoteproc: Add support for xo clock
  remoteproc: adsp-pil: fix recursive dependency
  remoteproc: Introduce Qualcomm ADSP PIL
  dt-binding: remoteproc: Introduce ADSP loader binding
  remoteproc: qcom_wcnss: Fix circular module dependency
  remoteproc: Merge table_ptr and cached_table pointers
  remoteproc: Remove custom vdev handler list
  remoteproc: Update max_notifyid as we allocate vrings
  remoteproc: Decouple vdev resources and devices
  ...
2016-12-13 08:49:12 -08:00
Linus Torvalds 212f30008a Merge branch 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 idle updates from Ingo Molnar:
 "There were two bigger changes in this development cycle:

   - remove idle notifiers:

       32 files changed, 74 insertions(+), 803 deletions(-)

     These notifiers were of questionable value and the main usecase,
     the i7300 driver, was essentially unmaintained and can be removed,
     plus modern power management concepts don't need the callback - so
     use this golden opportunity and get rid of this opaque and fragile
     callback from a latency sensitive code path.

     (Len Brown, Thomas Gleixner)

   - improve the AMD Erratum 400 workaround that used high overhead MSR
     polling in the idle loop (Borisla Petkov, Thomas Gleixner)"

* 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86: Remove empty idle.h header
  x86/amd: Simplify AMD E400 aware idle routine
  x86/amd: Check for the C1E bug post ACPI subsystem init
  x86/bugs: Separate AMD E400 erratum and C1E bug
  x86/cpufeature: Provide helper to set bugs bits
  x86/idle: Remove enter_idle(), exit_idle()
  x86: Remove x86_test_and_clear_bit_percpu()
  x86/idle: Remove is_idle flag
  x86/idle: Remove idle_notifier
  i7300_idle: Remove this driver
2016-12-12 14:55:04 -08:00
Vinod Koul 2ef7ff03a9 dmaengine: sirf-dma: remove unused ‘sdesc’
In sirfsoc_dma_pm_suspend(), variable ‘sdesc’ is initialized but never used, which
leads to warning with W=1.

drivers/dma/sirf-dma.c: In function 'sirfsoc_dma_pm_suspend':
drivers/dma/sirf-dma.c:1014:27: warning: variable 'sdesc' set but not used [-Wunused-but-set-variable]

So remove it.

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 920e00d62e dmaengine: pl330: remove unused ‘regs’
In pl330_add(), variable ‘regs’ is initialized but never used, which
leads to warning with W=1.

drivers/dma/pl330.c: In function 'pl330_add':
drivers/dma/pl330.c:1891:16: warning: variable 'regs' set but not used [-Wunused-but-set-variable]

So remove it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 963173fe48 dmaengine: s3c24xx: remove unused ‘cdata’
In s3c24xx_dma_get_phy(), variable ‘cdata’ is initialized but never used, which
leads to warning with W=1. Removing this make pdata unused.

drivers/dma/s3c24xx-dma.c: In function ‘s3c24xx_dma_get_phy’:
drivers/dma/s3c24xx-dma.c:293:30: warning: variable ‘cdata’ set but not used [-Wunused-but-set-variable]
  struct s3c24xx_dma_channel *cdata;

So remove both of them.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul cad0eca39f dmaengine: stm32-dma: remove unused ‘src_addr’
In stm32_dma_set_xfer_param(), variable ‘src_addr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:13: warning: variable ‘src_addr’ set but not used [-Wunused-but-set-variable]
  dma_addr_t src_addr, dst_addr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 2a440bd417 dmaengine: stm32-dma: remove unused ‘dst_addr’
In stm32_dma_set_xfer_param(), variable ‘dst_addr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:23: warning: variable ‘dst_addr’ set but not used [-Wunused-but-set-variable]
  dma_addr_t src_addr, dst_addr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 1bc4f06c24 dmaengine: stm32-dma: remove unused ‘sfcr’
In stm32_dma_chan_irq(), variable ‘sfcr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_chan_irq’:
drivers/dma/stm32-dma.c:530:19: warning: variable ‘sfcr’ set but not used [-Wunused-but-set-variable]
  u32 status, scr, sfcr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul b33f7832bb dmaengine: pch_dma: remove unused ‘cookie’
In pd_tx_submit(), variable ‘cookie’ is initialized but never used, which
leads to warning with W=1

drivers/dma/pch_dma.c: In function ‘pd_tx_submit’:
drivers/dma/pch_dma.c:420:15: warning: variable ‘cookie’ set but not used [-Wunused-but-set-variable]
  dma_cookie_t cookie;

So remove it.

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 765d2a6548 dmaengine: mic_x100_dma: remove unused ‘data’
In mic_dma_init(), variable ‘data’ is initialized but never used, which
leads to warning with W=1

drivers/dma/mic_x100_dma.c: In function ‘mic_dma_init’:
drivers/dma/mic_x100_dma.c:557:17: warning: variable ‘data’ set but not used [-Wunused-but-set-variable]
   unsigned long data;

So remove it.

Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul e5a6b3d5de dmaengine: img-mdc: remove unused ‘prev_phys’
In mdc_prep_dma_memcpy(), mdc_prep_dma_cyclic() and mdc_prep_slave_sg()
variable ‘prev_phys’ is initialized but never used, which
leads to warning with W=1

drivers/dma/img-mdc-dma.c: In function ‘mdc_prep_dma_memcpy’:
drivers/dma/img-mdc-dma.c:295:24: warning: variable ‘prev_phys’ set but not used [-Wunused-but-set-variable]
  dma_addr_t curr_phys, prev_phys;

drivers/dma/img-mdc-dma.c: In function ‘mdc_prep_dma_cyclic’:
drivers/dma/img-mdc-dma.c:378:24: warning: variable ‘prev_phys’ set but not used [-Wunused-but-set-variable]
  dma_addr_t curr_phys, prev_phys;

drivers/dma/img-mdc-dma.c: In function ‘mdc_prep_slave_sg’:
drivers/dma/img-mdc-dma.c:461:24: warning: variable ‘prev_phys’ set but not
used [-Wunused-but-set-variable]
  dma_addr_t curr_phys, prev_phys;

So remove it.

Cc: Damien.Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul 7833a31df7 dmaengine: usb-dmac: remove unused ‘uchan’
In usb_dmac_of_xlate(), variable ‘uchan’ is initialized but never used, which
leads to warning with W=1

drivers/dma/sh/usb-dmac.c: In function ‘usb_dmac_of_xlate’:
drivers/dma/sh/usb-dmac.c:655:24: warning: variable ‘uchan’ set but not used [-Wunused-but-set-variable]
  struct usb_dmac_chan *uchan;

So remove it.

Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:21 +05:30
Vinod Koul eef2c22cc3 dmaengine: ioat: remove unused ‘res’
In __cleanup(), variable ‘res’ is initialized but never used, which
leads to warning with W=1

drivers/dma/ioat/dma.c: In function ‘__cleanup’:
drivers/dma/ioat/dma.c:614:28: warning: variable ‘res’ set but not used [-Wunused-but-set-variable]
    struct dmaengine_result res;

So remove it.

Cc: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:21 +05:30
Vinod Koul 4cc8044148 dmaengine: ioat: remove unused ‘ioat_dma’
In ioat_tx_submit_unlock(), variable ‘ioat_dma’ is initialized but never
used, which leads to warning with W=1

drivers/dma/ioat/dma.c: In function ‘ioat_alloc_ring_ent’:
drivers/dma/ioat/dma.c:341:25: warning: variable ‘ioat_dma’ set but not used [-Wunused-but-set-variable]
  struct ioatdma_device *ioat_dma;

So remove it.

Cc: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:21 +05:30
Vinod Koul 56c492f341 dmaengine: ioat: remove unused ‘is_raid_device’
In ioat3_dma_probe(), variable ‘is_raid_device’ is initialized but never
used, which leads to warning with W=1

drivers/dma/ioat/init.c: In function ‘ioat3_dma_probe’:
drivers/dma/ioat/init.c:1084:7: warning: variable ‘is_raid_device’ set
but not used [-Wunused-but-set-variable]
  bool is_raid_device = false;

So remove it.

Cc: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:21 +05:30
Vladimir Murzin d07c9e1e21 dmaengine: pl330: do not generate unaligned access
When PL330 is used with !MMU the following fault is seen:

Unhandled fault: alignment exception (0x801) at 0x8f26a002
Internal error: : 801 [#1] ARM
Modules linked in:
CPU: 0 PID: 640 Comm: dma0chan0-copy0 Not tainted 4.8.0-6a82063-clean+ #1600
Hardware name: ARM-Versatile Express
task: 8f1baa80 task.stack: 8e6fe000
PC is at _setup_req+0x4c/0x350
LR is at 0x8f2cbc00
pc : [<801ea538>]    lr : [<8f2cbc00>]    psr: 60000093
sp : 8e6ffdc0  ip : 00000000  fp : 00000000
r10: 00000000  r9 : 8f2cba10  r8 : 8f2cbc00
r7 : 80000013  r6 : 8f21a050  r5 : 8f21a000  r4 : 8f2ac800
r3 : 8e6ffe18  r2 : 00944251  r1 : ffffffbc  r0 : 8f26a000
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 00c5387c
Process dma0chan0-copy0 (pid: 640, stack limit = 0x8e6fe210)
Stack: (0x8e6ffdc0 to 0x8e700000)
fdc0: 00000001 60000093 00000000 8f2cba10 8f26a000 00000004 8f0ae000 8f2cbc00
fde0: 8f0ae000 8f2ac800 8f21a000 8f21a050 80000013 8f2cbc00 8f2cba10 00000000
fe00: 60000093 801ebca0 8e6ffe18 000013ff 40000093 00000000 00944251 8f2ac800
fe20: a0000013 8f2b1320 00001986 00000000 00000001 000013ff 8f1e4f00 8f2cba10
fe40: 8e6fff6c 801e9044 00000003 00000000 fef98c80 002faf07 8e6ffe7c 00000000
fe60: 00000002 00000000 00001986 8f1f158d 8f1e4f00 80568de4 00000002 00000000
fe80: 00001986 8f1f53ff 40000001 80580500 8f1f158d 8001e00c 00000000 cfdfdfdf
fea0: fdae2a25 00000001 00000004 8e6fe000 00000008 00000010 00000000 00000005
fec0: 8f2b1330 8f2b1334 8e6ffe80 8e6ffe8c 00001986 00000000 8f21a014 00000001
fee0: 8e6ffe60 8e6ffe78 00000002 00000000 000013ff 00000001 80568de4 8f1e8018
ff00: 0000158d 8055ec30 00000001 803f6b00 00001986 8f2cba10 fdae2a25 00000001
ff20: 8f1baca8 8e6fff24 8e6fff24 00000000 8e6fff24 ac6f3037 00000000 00000000
ff40: 00000000 8e6fe000 8f1e4f40 00000000 8f1e4f40 8f1e4f00 801e84ec 00000000
ff60: 00000000 00000000 00000000 80031714 dfdfdfcf 00000000 dfdfdfcf 8f1e4f00
ff80: 00000000 8e6fff84 8e6fff84 00000000 8e6fff90 8e6fff90 8e6fffac 8f1e4f40
ffa0: 80031640 00000000 00000000 8000f548 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 dfdfdfcf cfdfdfdf
[<801ea538>] (_setup_req) from [<801ebca0>] (pl330_tasklet+0x41c/0x490)
[<801ebca0>] (pl330_tasklet) from [<801e9044>] (dmatest_func+0xb58/0x149c)
[<801e9044>] (dmatest_func) from [<80031714>] (kthread+0xd4/0xec)
[<80031714>] (kthread) from [<8000f548>] (ret_from_fork+0x14/0x2c)
Code: e3a03001 e3e01043 e5c03001 e59d3048 (e5802002)

This happens because _emit_{ADDH,MOV,GO) accessing to unaligned data
while writing to buffer. Fix it with writing to buffer byte by byte.

Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-08 21:26:28 +05:30
Vinod Koul 646b3b569e dmaengine: k3dma: move to dma_pool_zalloc
Replace dma_pool_alloc & memset with dma_pool_zalloc.

Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-08 21:24:21 +05:30
Vinod Koul 12154c8737 dmaengine: at_hdmac: move to dma_pool_zalloc
Replace dma_pool_alloc & memset with dma_pool_zalloc.

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-08 21:24:17 +05:30
Alexandre Belloni d3f8dc4202 dmaengine: at_xdmac: don't restore unsaved status
save_gs is supposed to save the channel status in order to be restored at
resume time but it is never updated and is always 0. Anyway, the channel
status is updated in the per channel loop later in the resume function.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-06 10:45:48 +05:30
Pan Bian 7393fca924 dmaengine: ioat: set error code on failures
In function ioat_xor_val_self_test(), when the calls to
dma_mapping_error() fail, the value of return variable err is 0
(indicates no error). As a result, the return value may be inconsistent
with the execution status. This patch fixes the bug by assigning
"-ENOMEM" to err on the error path.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=188601
Signed-off-by: Pan Bian <bianpan2016@163.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-06 10:28:18 +05:30