Граф коммитов

47456 Коммитов

Автор SHA1 Сообщение Дата
Linus Torvalds a4ce96ac35 Fix up trivial spelling errors ('taht' -> 'that')
Pointed out by Lucas who found the new one in a comment in
setup_percpu.c. And then I fixed the others that I grepped
for.

Reported-by: Lucas <canolucas@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-07-21 09:25:42 -07:00
Russell King 52d90145fb Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 2010-07-21 09:26:37 +01:00
Dmitry Torokhov 3fea60261e Input: twl40300-keypad - fix handling of "all ground" rows
The Nokia RX51 board code (arch/arm/mach-omap2/board-rx51-peripherals.c)
defines a key map for the matrix keypad keyboard. The hardware seems to
use all of the 8 rows and 8 columns of the keypad, although not all
possible locations are used.

The TWL4030 supports keypads with at most 8 rows and 8 columns. Most keys
are defined with a row and column number between 0 and 7, except

        KEY(0xff, 2, KEY_F9),
        KEY(0xff, 4, KEY_F10),
        KEY(0xff, 5, KEY_F11),

which represent keycodes that should be emitted when entire row is
connected to the ground.  since the driver handles this case as if we
had an extra column in the key matrix. Unfortunately we do not allocate
enough space and end up owerwriting some random memory.

Reported-and-tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: stable@kernel.org
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2010-07-20 20:29:48 -07:00
Yinghai Lu 9aebbdb637 x86, numa: fix boot without RAM on node0 again
Commit e534c7c5f8 ("numa: x86_64: use generic percpu var
numa_node_id() implementation") broke numa systems that don't have ram
on node0 when MEMORY_HOTPLUG is enabled, because cpu_up() will call
cpu_to_node() before per_cpu(numa_node) is setup for APs.

When Node0 doesn't have RAM, on x86, cpus already round it to nearest
node with RAM in x86_cpu_to_node_map.  and per_cpu(numa_node) is not set
up until in c_init for APs.

When later cpu_up() calling cpu_to_node() will get 0 again, and make it
online even there is no RAM on node0.  so later all APs can not booted up,
and later will have panic.

[    1.611101] On node 0 totalpages: 0
.........
[    2.608558] On node 0 totalpages: 0
[    2.612065] Brought up 1 CPUs
[    2.615199] Total of 1 processors activated (3990.31 BogoMIPS).
...
   93.225341] calling  loop_init+0x0/0x1a4 @ 1
[   93.229314] PERCPU: allocation failed, size=80 align=8, failed to populate
[   93.246539] Pid: 1, comm: swapper Tainted: G        W   2.6.35-rc4-tip-yh-04371-gd64e6c4-dirty #354
[   93.264621] Call Trace:
[   93.266533]  [<ffffffff81125e43>] pcpu_alloc+0x83a/0x8e7
[   93.270710]  [<ffffffff81125f15>] __alloc_percpu+0x10/0x12
[   93.285849]  [<ffffffff8140786c>] alloc_disk_node+0x94/0x16d
[   93.291811]  [<ffffffff81407956>] alloc_disk+0x11/0x13
[   93.306157]  [<ffffffff81503e51>] loop_alloc+0xa7/0x180
[   93.310538]  [<ffffffff8277ef48>] loop_init+0x9b/0x1a4
[   93.324909]  [<ffffffff8277eead>] ? loop_init+0x0/0x1a4
[   93.329650]  [<ffffffff810001f2>] do_one_initcall+0x57/0x136
[   93.345197]  [<ffffffff827486d0>] kernel_init+0x184/0x20e
[   93.348146]  [<ffffffff81034954>] kernel_thread_helper+0x4/0x10
[   93.365194]  [<ffffffff81c7cc3c>] ? restore_args+0x0/0x30
[   93.369305]  [<ffffffff8274854c>] ? kernel_init+0x0/0x20e
[   93.386011]  [<ffffffff81034950>] ? kernel_thread_helper+0x0/0x10
[   93.392047] loop: out of memory
...

Try to assign per_cpu(numa_node) early

[akpm@linux-foundation.org: tidy up code comment]
Signed-off-by: Yinghai <yinghai@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Denys Vlasenko <vda.linux@googlemail.com>
Acked-by: Lee Schermerhorn <lee.schermerhorn@hp.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-07-20 16:25:40 -07:00
Adam Lackorzynski 087b255a2b x86, i8259: Only register sysdev if we have a real 8259 PIC
My platform makes use of the null_legacy_pic choice and oopses when doing
a shutdown as the shutdown code goes through all the registered sysdevs
and calls their shutdown method which in my case poke on a non-existing
i8259.  Imho the i8259 specific sysdev should only be registered if the
i8259 is actually there.

Do not register the sysdev function when the null_legacy_pic is used so
that the i8259 resume, suspend and shutdown functions are not called.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
LKML-Reference: <201007202218.o6KMIJ3m020955@imap1.linux-foundation.org>
Cc: Jacob Pan <jacob.jun.pan@intel.com>
Cc: <stable@kernel.org> 2.6.34
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-07-20 15:27:33 -07:00
Dave Chinner 7f8275d0d6 mm: add context argument to shrinker callback
The current shrinker implementation requires the registered callback
to have global state to work from. This makes it difficult to shrink
caches that are not global (e.g. per-filesystem caches). Pass the shrinker
structure to the callback so that users can embed the shrinker structure
in the context the shrinker needs to operate on and get back to it in the
callback via container_of().

Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
2010-07-19 14:56:17 +10:00
Linus Torvalds d0c6f62584 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, pci, mrst: Add extra sanity check in walking the PCI extended cap chain
  x86: Fix x2apic preenabled system with kexec
  x86: Force HPET readback_cmp for all ATI chipsets
2010-07-19 13:19:32 -07:00
Linus Torvalds a9f7f2e74a Merge branch 'x86/kprobes' of git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland
* 'x86/kprobes' of git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland:
  x86: kprobes: fix swapped segment registers in kretprobe
2010-07-18 15:13:30 -07:00
Roland McGrath a197479848 x86: kprobes: fix swapped segment registers in kretprobe
In commit f007ea26, the order of the %es and %ds segment registers
got accidentally swapped, so synthesized 'struct pt_regs' frames
have the two values inverted.  It's almost sure that these values
never matter, and that they also never differ.  But wrong is wrong.

Signed-off-by: Roland McGrath <roland@redhat.com>
2010-07-18 15:05:34 -07:00
Jacob Pan f82c3d71d6 x86, pci, mrst: Add extra sanity check in walking the PCI extended cap chain
The fixed bar capability structure is searched in PCI extended
configuration space.  We need to make sure there is a valid capability
ID to begin with otherwise, the search code may stuck in a infinite
loop which results in boot hang.  This patch adds additional check for
cap ID 0, which is also invalid, and indicates end of chain.

End of chain is supposed to have all fields zero, but that doesn't
seem to always be the case in the field.

Suggested-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
LKML-Reference: <1279306706-27087-1-git-send-email-jacob.jun.pan@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-07-16 16:52:15 -07:00
Yinghai Lu fd19dce7ac x86: Fix x2apic preenabled system with kexec
Found one x2apic system kexec loop test failed
when CONFIG_NMI_WATCHDOG=y (old) or CONFIG_LOCKUP_DETECTOR=y (current tip)

first kernel can kexec second kernel, but second kernel can not kexec third one.

it can be duplicated on another system with BIOS preenabled x2apic.
First kernel can not kexec second kernel.

It turns out, when kernel boot with pre-enabled x2apic, it will not execute
disable_local_APIC on shutdown path.

when init_apic_mappings() is called in setup_arch, it will skip setting of
apic_phys when x2apic_mode is set. ( x2apic_mode is much early check_x2apic())
Then later, disable_local_APIC() will bail out early because !apic_phys.

So check !x2apic_mode in x2apic_mode in disable_local_APIC with !apic_phys.

another solution could be updating init_apic_mappings() to set apic_phys even
for preenabled x2apic system. Actually even for x2apic system, that lapic
address is mapped already in early stage.

BTW: is there any x2apic preenabled system with apicid of boot cpu > 255?

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4C3EB22B.3000701@kernel.org>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: stable@kernel.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-07-16 16:49:41 -07:00
Bjorn Helgaas 58c84eda07 PCI: fall back to original BIOS BAR addresses
If we fail to assign resources to a PCI BAR, this patch makes us try the
original address from BIOS rather than leaving it disabled.

Linux tries to make sure all PCI device BARs are inside the upstream
PCI host bridge or P2P bridge apertures, reassigning BARs if necessary.
Windows does similar reassignment.

Before this patch, if we could not move a BAR into an aperture, we left
the resource unassigned, i.e., at address zero.  Windows leaves such BARs
at the original BIOS addresses, and this patch makes Linux do the same.

This is a bit ugly because we disable the resource long before we try to
reassign it, so we have to keep track of the BIOS BAR address somewhere.
For lack of a better place, I put it in the struct pci_dev.

I think it would be cleaner to attempt the assignment immediately when the
claim fails, so we could easily remember the original address.  But we
currently claim motherboard resources in the middle, after attempting to
claim PCI resources and before assigning new PCI resources, and changing
that is a fairly big job.

Addresses https://bugzilla.kernel.org/show_bug.cgi?id=16263

Reported-by: Andrew <nitr0@seti.kr.ua>
Tested-by: Andrew <nitr0@seti.kr.ua>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-16 11:39:48 -07:00
Thomas Gleixner 08be97962b x86: Force HPET readback_cmp for all ATI chipsets
commit 30a564be (x86, hpet: Restrict read back to affected ATI
chipset) restricted the workaround for the HPET bug to SMX00
chipsets. This was reasonable as those were the only ones against
which we ever got a bug report.

Stephan Wolf reported now that this patch breaks his IXP400 based
machine. Though it's confirmed to work on other IXP400 based systems.

To error out on the safe side, we force the HPET readback workaround
for all ATI SMbus class chipsets.

Reported-by: Stephan Wolf <stephan@letzte-bankreihe.de>
LKML-Reference: <alpine.LFD.2.00.1007142134140.3321@localhost.localdomain>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Stephan Wolf <stephan@letzte-bankreihe.de>
Acked-by: Borislav Petkov <borislav.petkov@amd.com>
2010-07-15 17:10:02 +02:00
Linus Torvalds 2f7989efd4 Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6226/1: fix kprobe bug in ldr instruction emulation
  ARM: Update mach-types
  ARM: lockdep: fix unannotated irqs-on
  ARM: 6184/2: ux500: use neutral PRCMU base
  ARM: 6212/1: atomic ops: add memory constraints to inline asm
  ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
  ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
2010-07-14 17:28:13 -07:00
Linus Torvalds 6f7dd68b75 Merge branch 'lmb-to-memblock' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'lmb-to-memblock' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  lmb: rename to memblock
2010-07-14 17:27:44 -07:00
Linus Torvalds ea4c1a7e14 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/fsl-booke: Fix address issue when using relocatable kernels
  powerpc/cpm1: Mark micropatch code/data static and __init
  powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations
  powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
2010-07-14 17:27:29 -07:00
Nicolas Pitre 0ebe25f90c ARM: 6226/1: fix kprobe bug in ldr instruction emulation
From: Bin Yang <bin.yang@marvell.com>

Cc: stable@kernel.org
Signed-off-by: Bin Yang <bin.yang@marvell.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-14 23:28:06 +01:00
Yinghai Lu 95f72d1ed4 lmb: rename to memblock
via following scripts

      FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')

      sed -i \
        -e 's/lmb/memblock/g' \
        -e 's/LMB/MEMBLOCK/g' \
        $FILES

      for N in $(find . -name lmb.[ch]); do
        M=$(echo $N | sed 's/lmb/memblock/g')
        mv $N $M
      done

and remove some wrong change like lmbench and dlmb etc.

also move memblock.c from lib/ to mm/

Suggested-by: Ingo Molnar <mingo@elte.hu>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14 17:14:00 +10:00
Linus Torvalds bcefc8d0d3 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  input: i8042 - add runtime check in x86's i8042_platform_init
  Revert "Input: fixup X86_MRST selects"
  Revert "Input: do not force selecting i8042 on Moorestown"
  x86, mrst: Add i8042_detect API for Moorestwon platform
  x86: Add i8042 pre-detection hook to x86_platform_ops
  x86, platform: Export x86_platform to modules
2010-07-13 17:31:11 -07:00
Linus Torvalds 177dd7e1eb Merge branch 'kvm-updates/2.6.35' of git://git.kernel.org/pub/scm/virt/kvm/kvm
* 'kvm-updates/2.6.35' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: MMU: flush remote tlbs when overwriting spte with different pfn
  KVM: VMX: Fix host MSR_KERNEL_GS_BASE corruption
2010-07-13 17:30:49 -07:00
pieterg 7fad69861d [ARM] pxa/colibri-pxa300: fix AC97 init
The wrong CONFIG defines were checked, and the <mach/audio.h>
include was missing

Signed-off-by: pieter <p.grimmerink@inepro.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:07 +08:00
Eric Miao 5e16e3cb83 [ARM] pxa: fix incorrect order of AC97 reset pin configs
Reported-by: Dylan Cristiani <d.cristiani@idem-tech.it>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Marek Vasut 3d3d0fbf4d [ARM] pxa: cpufreq-pxa2xx: fix DRI recomputation routine
This patch:
1) Simpifies the DRI recomputation routine by pulling out the common code
2) Fixes a bug in PXA27x DRI recomputation caused by incorrect parenthesis

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Eric Miao 76d61e4ee0 [ARM] pxa/corgi: fix MMC/SD card detection failure
Reported-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-07-13 16:09:06 +08:00
Linus Torvalds c2330e286f Merge branch 'arm/defconfig/reduced-v2.6.35-rc1' of git://git.pengutronix.de/git/ukl/linux-2.6
* 'arm/defconfig/reduced-v2.6.35-rc1' of git://git.pengutronix.de/git/ukl/linux-2.6:
  ARM: reduce defconfigs

This is a big change, but results in no loss of information, despite us
losing almost 200k lines:

 177 files changed, 652 insertions(+), 194157 deletions(-)

and Grant Likely thinks powerpc can also use the same reduction
technique.

The python script that did the reduction looks like this:

    #! /usr/bin/env python
    # vim: set fileencoding=utf-8 :
    # Copyright (C) 2010 by Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

    import re
    import subprocess
    import os
    import sys

    # This prevents including a timestamp in the .config which makes comparing a
    # bit easier.
    os.environ['KCONFIG_NOTIMESTAMP'] = 'Yes, please'

    # XXX: get these using getopt
    kernel_tree = '' # os.path.join(os.environ['HOME'], 'gsrc', 'linux-2.6')
    arch = 'arm'
    target = sys.argv[1]
    defconfig_src = os.path.join(kernel_tree, 'arch/%s/configs/%s' % (arch, target))

    subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target])
    origconfig = list(open('.config'))
    config = list(origconfig)
    config_size = os.stat('.config').st_size

    i = 0

    while i < len(config):
        print 'test for %r' % config[i]
        defconfig = open(defconfig_src, 'w')
        defconfig.writelines(config[:i])
        defconfig.writelines(config[i + 1:])
        defconfig.close()
        subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target])
        if os.stat('.config').st_size == config_size and list(open('.config')) == origconfig:
            del config[i]
        else:
            i += 1

    defconfig = open(defconfig_src, 'w')
    defconfig.writelines(config)
    defconfig.close()

which is pretty self-explanatory.

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Acked-by: Russell King <linux@arm.linux.org.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-07-12 14:47:01 -07:00
Russell King d8495378e2 ARM: Update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-12 21:14:53 +01:00
Xiao Guangrong 91546356d0 KVM: MMU: flush remote tlbs when overwriting spte with different pfn
After remove a rmap, we should flush all vcpu's tlb

Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-07-12 14:05:56 -03:00
Matthew McClintock 77154a2026 powerpc/fsl-booke: Fix address issue when using relocatable kernels
When booting a relocatable kernel it needs to jump to the correct
start address, which for BookE parts is usually unchanged
regardless of the physical memory offset.

Recent changes cause problems with how we calculate the start
address, it was always adding the RMO into the start address
which is incorrect. This patch only adds in the RMO offset
if we are in the kexec code path, as it needs the RMO to work
correctly.

Instead of adding the RMO offset in in the common code path, we
can just set r6 to the RMO offset in the kexec code path instead
of to zero, and finally perform the masking in the common code
path

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-11 11:04:08 -05:00
Anton Vorontsov af71bcfeaa powerpc/cpm1: Mark micropatch code/data static and __init
This saves runtime memory and fixes lots of sparse warnings like this:

    CHECK   arch/powerpc/sysdev/micropatch.c
  arch/powerpc/sysdev/micropatch.c:27:6: warning: symbol 'patch_2000'
  was not declared. Should it be static?
  arch/powerpc/sysdev/micropatch.c:146:6: warning: symbol 'patch_2f00'
  was not declared. Should it be static?
  ...

Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-11 11:04:06 -05:00
Anton Vorontsov 2069a6ae19 powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations
Warnings are treated as errors for arch/powerpc code, so build fails
with CONFIG_I2C_SPI_UCODE_PATCH=y:

    CC      arch/powerpc/sysdev/micropatch.o
  cc1: warnings being treated as errors
  arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch':
  arch/powerpc/sysdev/micropatch.c:630: warning: unused variable 'smp'
  make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1

And with CONFIG_USB_SOF_UCODE_PATCH=y:

  CC      arch/powerpc/sysdev/micropatch.o
  cc1: warnings being treated as errors
  arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch':
  arch/powerpc/sysdev/micropatch.c:629: warning: unused variable 'spp'
  arch/powerpc/sysdev/micropatch.c:628: warning: unused variable 'iip'
  make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1

This patch fixes these issues by introducing proper #ifdefs.

Cc: <stable@kernel.org> [ .33, .34 ]
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-11 11:03:49 -05:00
Anton Vorontsov 56825c88ff powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
spi_t was removed in commit 644b2a680c
("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
it appears that the struct is needed for micropatch code. So, let's
reintroduce the struct.

Fixes the following build issue:

    CC      arch/powerpc/sysdev/micropatch.o
  micropatch.c: In function 'cpm_load_patch':
  micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token
  micropatch.c:629: error: 'spp' undeclared (first use in this function)
  micropatch.c:629: error: (Each undeclared identifier is reported only once
  micropatch.c:629: error: for each function it appears in.)

Reported-by: LEROY Christophe <christophe.leroy@c-s.fr>
Reported-by: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@kernel.org> [ .33, .34 ]
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-11 11:03:22 -05:00
Russell King ac78884e6d ARM: lockdep: fix unannotated irqs-on
CPU: Testing write buffer coherency: ok
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
Modules linked in:
[<c0035120>] (unwind_backtrace+0x0/0xf8) from [<c0355374>] (dump_stack+0x20/0x24)
[<c0355374>] (dump_stack+0x20/0x24) from [<c0060c04>] (warn_slowpath_common+0x58/0x70)
[<c0060c04>] (warn_slowpath_common+0x58/0x70) from [<c0060c3c>] (warn_slowpath_null+0x20/0x24)
[<c0060c3c>] (warn_slowpath_null+0x20/0x24) from [<c008f224>] (check_flags+0xcc/0x1dc)
[<c008f224>] (check_flags+0xcc/0x1dc) from [<c00945dc>] (lock_acquire+0x50/0x140)
[<c00945dc>] (lock_acquire+0x50/0x140) from [<c0358434>] (_raw_spin_lock+0x50/0x88)
[<c0358434>] (_raw_spin_lock+0x50/0x88) from [<c00fd114>] (set_task_comm+0x2c/0x60)
[<c00fd114>] (set_task_comm+0x2c/0x60) from [<c007e184>] (kthreadd+0x30/0x108)
[<c007e184>] (kthreadd+0x30/0x108) from [<c0030104>] (kernel_thread_exit+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
possible reason: unannotated irqs-on.
irq event stamp: 3
hardirqs last  enabled at (2): [<c0059bb0>] finish_task_switch+0x48/0xb0
hardirqs last disabled at (3): [<c002f0b0>] ret_slow_syscall+0xc/0x1c
softirqs last  enabled at (0): [<c005f3e0>] copy_process+0x394/0xe5c
softirqs last disabled at (0): [<(null)>] (null)

Fix this by ensuring that the lockdep interrupt state is manipulated in
the appropriate places.  We essentially treat userspace as an entirely
separate environment which isn't relevant to lockdep (lockdep doesn't
monitor userspace.)  We don't tell lockdep that IRQs will be enabled
in that environment.

Instead, when creating kernel threads (which is a rare event compared
to entering/leaving userspace) we have to update the lockdep state.  Do
this by starting threads with IRQs disabled, and in the kthread helper,
tell lockdep that IRQs are enabled, and enable them.

This provides lockdep with a consistent view of the current IRQ state
in kernel space.

This also revert portions of 0d928b0b61
which didn't fix the problem.

Tested-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-10 10:53:13 +01:00
Linus Walleij d9e38040cc ARM: 6184/2: ux500: use neutral PRCMU base
The MTU wallclock timing fix-up patch was hardwired to the DB8500
causing a regression. This makes it work on the DB5500 as well.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 14:46:47 +01:00
Will Deacon 398aa66827 ARM: 6212/1: atomic ops: add memory constraints to inline asm
Currently, the 32-bit and 64-bit atomic operations on ARM do not
include memory constraints in the inline assembly blocks. In the
case of barrier-less operations [for example, atomic_add], this
means that the compiler may constant fold values which have actually
been modified by a call to an atomic operation.

This issue can be observed in the atomic64_test routine in
<kernel root>/lib/atomic64_test.c:

00000000 <test_atomic64>:
   0:	e1a0c00d 	mov	ip, sp
   4:	e92dd830 	push	{r4, r5, fp, ip, lr, pc}
   8:	e24cb004 	sub	fp, ip, #4
   c:	e24dd008 	sub	sp, sp, #8
  10:	e24b3014 	sub	r3, fp, #20
  14:	e30d000d 	movw	r0, #53261	; 0xd00d
  18:	e3011337 	movw	r1, #4919	; 0x1337
  1c:	e34c0001 	movt	r0, #49153	; 0xc001
  20:	e34a1aa3 	movt	r1, #43683	; 0xaaa3
  24:	e16300f8 	strd	r0, [r3, #-8]!
  28:	e30c0afe 	movw	r0, #51966	; 0xcafe
  2c:	e30b1eef 	movw	r1, #48879	; 0xbeef
  30:	e34d0eaf 	movt	r0, #57007	; 0xdeaf
  34:	e34d1ead 	movt	r1, #57005	; 0xdead
  38:	e1b34f9f 	ldrexd	r4, [r3]
  3c:	e1a34f90 	strexd	r4, r0, [r3]
  40:	e3340000 	teq	r4, #0
  44:	1afffffb 	bne	38 <test_atomic64+0x38>
  48:	e59f0004 	ldr	r0, [pc, #4]	; 54 <test_atomic64+0x54>
  4c:	e3a0101e 	mov	r1, #30
  50:	ebfffffe 	bl	0 <__bug>
  54:	00000000 	.word	0x00000000

The atomic64_set (0x38-0x44) writes to the atomic64_t, but the
compiler doesn't see this, assumes the test condition is always
false and generates an unconditional branch to __bug. The rest of the
test is optimised away.

This patch adds suitable memory constraints to the atomic operations on ARM
to ensure that the compiler is informed of the correct data hazards. We have
to use the "Qo" constraints to avoid hitting the GCC anomaly described at
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44492 , where the compiler
makes assumptions about the writeback in the addressing mode used by the
inline assembly. These constraints forbid the use of auto{inc,dec} addressing
modes, so it doesn't matter if we don't use the operand exactly once.

Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:29:35 +01:00
Will Deacon 068de8d1be ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
The atomic64_add_unless function compares an atomic variable with
a given value and, if they are not equal, adds another given value
to the atomic variable. The function returns zero if the addition
did not occur and non-zero otherwise.

On ARM, the return value is initialised to 1 in C code. Inline assembly
code then performs the atomic64_add_unless operation, setting the
return value to 0 iff the addition does not occur. This means that
when the addition *does* occur, the value of ret must be preserved
across the inline assembly and therefore requires a "+r" constraint
rather than the current one of "=&r".

Thanks to Nicolas Pitre for helping to spot this.

Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:29:35 +01:00
Sascha Hauer 4082cfa776 ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset
default values. Allow them to be overwritten with the aux_val/aux_mask
arguments passed to l2x0_init().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 11:28:53 +01:00
Linus Torvalds 31016e9941 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix userspace build of ptrace.h
  powerpc: Fix default_machine_crash_shutdown #ifdef botch
  powerpc: Fix logic error in fixup_irqs
  powerpc/iseries: Fix possible null pointer dereference in iSeries_pcibios_fixup_resources
  powerpc: Linux cannot run with 0 cores
  powerpc: Fix feature-fixup tests for gcc 4.5
  powerpc: Disable SPARSE_IRQ by default
  powerpc: Fix compile errors in prom_init_check for gcc 4.5
  powerpc: Fix module building for gcc 4.5 and 64 bit
  powerpc/perf_event: Fix for power_pmu_disable()
2010-07-08 08:05:43 -07:00
Linus Torvalds 6741502095 Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: Fix on wrong function name for S5PV210 sdhci0
  ARM: S5P6442: Fix PLL setting announce message.
  ARM: SAMSUNG: Fix build without SDHCI controllers for S3C64XX
  ARM: S5PV210: Correct clock register properties
  ARM: S5P: Bug fix on external interrupt for S5P SoCs
2010-07-08 08:02:18 -07:00
Sam Ravnborg bf23690b89 powerpc: Fix userspace build of ptrace.h
Build of ptrace.h failed for assembly because it
pulls in stdint.h.
Use exportable types (__u32, __u64) to avoid the dependency
on stdint.h.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Andrey Volkov <avolkov@varma-el.com>
Cc: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:46 +10:00
Paul E. McKenney c2be05481f powerpc: Fix default_machine_crash_shutdown #ifdef botch
crash_kexec_wait_realmode() is defined only if CONFIG_PPC_STD_MMU_64
and CONFIG_SMP, but is called if CONFIG_PPC_STD_MMU_64 even if !CONFIG_SMP.
Fix the conditional compilation around the invocation.

Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:45 +10:00
Johannes Berg 3cd8519248 powerpc: Fix logic error in fixup_irqs
When SPARSE_IRQ is set, irq_to_desc() can
return NULL. While the code here has a
check for NULL, it's not really correct.
Fix it by separating the check for it.

This fixes CPU hot unplug for me.

Reported-by: Alastair Bridgewater <alastair.bridgewater@gmail.com>
Cc: stable@kernel.org [2.6.32+]
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:44 +10:00
Denis Kirjanov d3005fbc69 powerpc/iseries: Fix possible null pointer dereference in iSeries_pcibios_fixup_resources
I don't know if this is a right fix for the problem
since of_get_property can return NULL.
Since iseries_device_information is used only for informational purpose,
we can skip this function without valid HvSubBusNumber number.

Signed-off-by: Denis Kirjanov <dkirjanov@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:43 +10:00
Anton Blanchard 33ad5e4b6c powerpc: Linux cannot run with 0 cores
If we configure with CONFIG_SMP=n or set NR_CPUS less than the number of
SMT threads we will set the max cores property to 0 in the
ibm,client-architecture-support structure. On new versions of firmware that
understand this property it obliges and terminates our partition.

Use DIV_ROUND_UP so we handle not only the CONFIG_SMP=n case but also the
case where NR_CPUS isn't a multiple of the number of SMT threads.

Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:42 +10:00
Stephen Rothwell 3880ecb05b powerpc: Fix feature-fixup tests for gcc 4.5
The feature-fixup test declare some extern void variables and then take
their addresses.  Fix this by declaring them as extern u8 instead.

Fixes these warnings (treated as errors):

  CC      arch/powerpc/lib/feature-fixups.o
cc1: warnings being treated as errors
arch/powerpc/lib/feature-fixups.c: In function 'test_cpu_macros':
arch/powerpc/lib/feature-fixups.c:293:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:294:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:297:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:297:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c: In function 'test_fw_macros':
arch/powerpc/lib/feature-fixups.c:306:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:307:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:310:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:310:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c: In function 'test_lwsync_macros':
arch/powerpc/lib/feature-fixups.c:321:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:322:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:326:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:326:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:329:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:329:3: error: taking address of expression of type 'void'

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:41 +10:00
Yang Li 9ce91685f9 powerpc: Disable SPARSE_IRQ by default
The SPARSE_IRQ considerably adds overhead to critical path of IRQ
handling.  However it doesn't benefit much in space for most systems with
limited IRQ_NR.  Should be disabled unless really necessary.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:40 +10:00
Stephen Rothwell 5afd878a95 powerpc: Fix compile errors in prom_init_check for gcc 4.5
Just whitelist these extra compiler generated symbols.
Fixes these errors:

Error: External symbol '_restgpr0_14' referenced from prom_init.c
Error: External symbol '_restgpr0_20' referenced from prom_init.c
Error: External symbol '_restgpr0_22' referenced from prom_init.c
Error: External symbol '_restgpr0_24' referenced from prom_init.c
Error: External symbol '_restgpr0_25' referenced from prom_init.c
Error: External symbol '_restgpr0_26' referenced from prom_init.c
Error: External symbol '_restgpr0_27' referenced from prom_init.c
Error: External symbol '_restgpr0_28' referenced from prom_init.c
Error: External symbol '_restgpr0_29' referenced from prom_init.c
Error: External symbol '_restgpr0_31' referenced from prom_init.c
Error: External symbol '_savegpr0_14' referenced from prom_init.c
Error: External symbol '_savegpr0_20' referenced from prom_init.c
Error: External symbol '_savegpr0_22' referenced from prom_init.c
Error: External symbol '_savegpr0_24' referenced from prom_init.c
Error: External symbol '_savegpr0_25' referenced from prom_init.c
Error: External symbol '_savegpr0_26' referenced from prom_init.c
Error: External symbol '_savegpr0_27' referenced from prom_init.c
Error: External symbol '_savegpr0_28' referenced from prom_init.c
Error: External symbol '_savegpr0_29' referenced from prom_init.c
Error: External symbol '_savegpr0_31' referenced from prom_init.c

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:39 +10:00
Stephen Rothwell 7fca5dc8aa powerpc: Fix module building for gcc 4.5 and 64 bit
Gcc 4.5 is now generating out of line register save and restore
in the function prefix and postfix when we use -Os.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:38 +10:00
Matt Evans 219a92a4c4 powerpc/perf_event: Fix for power_pmu_disable()
When power_pmu_disable() removes the given event from a particular index into
cpuhw->event[], it shuffles down higher event[] entries.  But, this array is
paired with cpuhw->events[] and cpuhw->flags[] so should shuffle them
similarly.

If these arrays get out of sync, code such as power_check_constraints() will
fail.  This caused a bug where events were temporarily disabled and then failed
to be re-enabled; subsequent code tried to write_pmc() with its (disabled) idx
of 0, causing a message "oops trying to write PMC0".  This triggers this bug on
POWER7, running a miss-heavy test:

  perf record -e L1-dcache-load-misses -e L1-dcache-store-misses ./misstest

Signed-off-by: Matt Evans <matt@ozlabs.org>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-08 18:11:37 +10:00
Feng Tang 6d2cce6201 x86, mrst: Add i8042_detect API for Moorestwon platform
It will just return 0 as there is no i8042 controller

Signed-off-by: Feng Tang <feng.tang@intel.com>
LKML-Reference: <1278342202-10973-3-git-send-email-feng.tang@intel.com>
Acked-by: Dmitry Torokhov <dtor@mail.ru>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-07-07 17:05:06 -07:00
Feng Tang c516ac5839 x86: Add i8042 pre-detection hook to x86_platform_ops
Some x86 platforms like Intel MID platforms don't have i8042 controllers,
and i8042 driver's probe to some legacy IO ports may hang the MID
processor. With this hook, i8042 driver can runtime check and skip the
probe when the pretection fail which also saves some probe time

[ hpa note: this is currently a compile-time check, which breaks the
  i386 allyesconfig build.  This patch series thus does fix a regression. ]

Signed-off-by: Feng Tang <feng.tang@intel.com>
LKML-Reference: <1278342202-10973-2-git-send-email-feng.tang@intel.com>
Acked-by: Dmitry Torokhov <dtor@mail.ru>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-07-07 17:05:06 -07:00
H. Peter Anvin 72550b3ae5 x86, platform: Export x86_platform to modules
Export x86_platform to modules in preparation of using it for i8042
discovery control.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
LKML-Reference: <1278342202-10973-1-git-send-email-feng.tang@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Dmitry Torokhov <dtor@mail.ru>
2010-07-07 17:05:05 -07:00
Linus Torvalds 47a716cf0c Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  rbtree: Undo augmented trees performance damage and regression
  x86, Calgary: Limit the max PHB number to 256
2010-07-06 17:16:09 -07:00
Linus Torvalds 7491eb9b5f Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (22 commits)
  MIPS: Return after handling coprocessor 2 exception
  MIPS: BCM47xx: Add NVRAM support devices
  MIPS: Loongson: Define rtc device on MC146818-equipped systems
  MIPS: MT: Fix FPU affinity.
  MIPS: Oprofile: Fixup of loongson2_exit()
  MIPS: Alchemy: sleepcode without compile-time cputype dependencies
  MIPS: Tracing: Cleanup of address space checking
  MIPS: Tracing: Cleanup of function graph tracer
  MIPS: Tracing: Reduce the overhead of dynamic Function Tracer
  MIPS: Tracing: Cleanup of instructions used
  MIPS: Tracing: Fix 32-bit support with -mmcount-ra-address
  MIPS: Tracing: Fix argument passing of the 32bit support with gcc 4.5
  MIPS: Tracing: Cleanup comments
  MIPS: Tracing: Cleanup the arguments passing of prepare_ftrace_return
  MIPS: Tracing: Merge adjacent #ifdefs with same condition.
  MIPS: AR7, BCM63xx: fix gpio_to_irq() return value
  MIPS: Restore signalling NaN behaviour for abs.[sd]
  MIPS: Loongson: CS5536: Fix ISA support
  MIPS: Loongson: Add a missing break statement in CS5536 IDE code
  MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
  ...
2010-07-06 17:14:33 -07:00
Avi Kivity da38f43859 KVM: VMX: Fix host MSR_KERNEL_GS_BASE corruption
enter_lmode() and exit_lmode() modify the guest's EFER.LMA before calling
vmx_set_efer().  However, the latter function depends on the value of EFER.LMA
to determine whether MSR_KERNEL_GS_BASE needs reloading, via
vmx_load_host_state().  With EFER.LMA changing under its feet, it took the
wrong choice and corrupted userspace's %gs.

This causes 32-on-64 host userspace to fault.

Fix not touching EFER.LMA; instead ask vmx_set_efer() to change it.

Signed-off-by: Avi Kivity <avi@redhat.com>
2010-07-06 11:41:31 +03:00
Jesper Nilsson 55dc9d51a8 MIPS: Return after handling coprocessor 2 exception
Breaking here dropped us to the default code which always sends a SIGILL
to the current process, no matter what the CU2 notifier says.

[Ralf: Currently this only hurts on Cavium and possibly some out of tree
platforms.]

Signed-off-by: Jesper Nilsson <jesper@jni.nu>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1391/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:33 +01:00
Waldemar Brodkorb 121915c4ee MIPS: BCM47xx: Add NVRAM support devices
When trying to netboot a Linksys WRT54GS WLAN router, the bootup fails,
because of following error message:

...
[    0.424000] b44: b44.c:v2.0
[    0.424000] b44: Invalid MAC address found in EEPROM
[    0.432000] b44 ssb0:1: Problem fetching invariants of chip,aborting
[    0.436000] b44: probe of ssb0:1 failed with error -22
...

The router uses a CFE bootloader, but most of the needed environment
variables for network card initialization, are not available from CFE
via printenv and even though not via cfe_getenv().
The required environment variables are saved in a special partition
in flash memory. The attached patch implement nvram_getenv and enables
bootup via NFS root on my router.

Most of the patch is extracted from the OpenWrt subversion repository and
stripped down and cleaned up to just fix this issue.

[Ralf: sorted out header file inclusions.  Lots of unneded headers and such
that should have been included.]

Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
Reviewed-by: Phil Sutter <phil@nwl.cc>
To: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/1359/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:32 +01:00
Arnaud Patard 5df7435287 MIPS: Loongson: Define rtc device on MC146818-equipped systems
This patch declare the rtc device present on systems with clock compatible
with the mc146818 and handled by rtc-cmos.  Introduce a new Kconfig entry
because there are some systems without rtc_cmos compatible clock.

Signed-off-by: Arnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Cc: aba@not.so.argh.org
Patchwork: http://patchwork.linux-mips.org/patch/1320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:32 +01:00
Ralf Baechle 17c04139fd MIPS: MT: Fix FPU affinity.
The fragile MT sys_sched_setaffinity wrapper needs its regular dose of
fixes.

Nose-poked-at-pile-o-crap-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:32 +01:00
Wu Zhangjin 1d84267480 MIPS: Oprofile: Fixup of loongson2_exit()
When exiting from loongson2_exit(), we need to reset the counter
register too, this patch adds a function reset_counters() to do it, by
the way, this function will be shared by Perf.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1199/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:31 +01:00
Manuel Lauss 2e93d1ec08 MIPS: Alchemy: sleepcode without compile-time cputype dependencies
Split the low-level sleepcode into per-cpu functions instead of
relying on compile-time-defined cpu type.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1281/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:30 +01:00
Wu Zhangjin c9f84873c1 MIPS: Tracing: Cleanup of address space checking
This patch adds an inline function in_module() to check which space the
instruction pointer in, kernel space or module space.

Note:  This will not work when the kernel space and module space are the
same. If they are the same, we need to modify scripts/recordmcount.pl,
ftrace_make_nop/call() and the other related parts to ensure the
enabling/disabling of the calling site to _mcount is right for both
kernel and module.

[Ralf: It also is still incorrect for some 64-bit kernels.]

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1232/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:30 +01:00
Wu Zhangjin 68ccf7521d MIPS: Tracing: Cleanup of function graph tracer
Cleans up comments and ftrace_get_parent_addr() of function graph tracer.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1231/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:30 +01:00
Wu Zhangjin e424054000 MIPS: Tracing: Reduce the overhead of dynamic Function Tracer
With the help of uasm this patch encodes the instructions of the dynamic
function tracer in ftrace_dyn_arch_init() when initializing it.

As a result we can remove the dynamic encoding of instructions in
ftrace_make_nop()/call(), ftrace_enable_ftrace_graph_caller() and remove
the macro jump_insn_encode() and at last this reduce the overhead of
dynamic Function Tracer.  This also is cleaner.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1230/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:29 +01:00
Wu Zhangjin 4d6829f92a MIPS: Tracing: Cleanup of instructions used
This patch adds some cleanups of the instructions:
  o use macros instead of magic numbers
  o use macros instead of variables to reduce some overhead
  o add new macro for the jal instruction

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1229/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:29 +01:00
Wu Zhangjin 3a2af2dc1b MIPS: Tracing: Fix 32-bit support with -mmcount-ra-address
For 32-bit kernel the -mmcount-ra-address option of gcc 4.5 emits one
extra instruction before calling to _mcount so we need to use a different
"b 1f" for it.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1228/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:28 +01:00
Wu Zhangjin 56b49cd35f MIPS: Tracing: Fix argument passing of the 32bit support with gcc 4.5
As documented in the GCC 4.5 docs [1] -mmcount-ra-address uses register
$12 to pass the stack offset of the return address to the _mcount function.
On 64-bit kernels $12 is t0 but in 32-bit kernels it is t4 so we need to
use $12 instead of t0 here to be correct for both kernel types.

[1] GCC documentation: MIPS Options
http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1227/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:28 +01:00
Wu Zhangjin 042e571d22 MIPS: Tracing: Cleanup comments
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1225/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:27 +01:00
Wu Zhangjin cbe555b01b MIPS: Tracing: Cleanup the arguments passing of prepare_ftrace_return
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1226/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:27 +01:00
Wu Zhangjin 27b118342f MIPS: Tracing: Merge adjacent #ifdefs with same condition.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1224/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:27 +01:00
Yoichi Yuasa cdf22a4e90 MIPS: AR7, BCM63xx: fix gpio_to_irq() return value
The return value of gpio_to_irq() is not a pointer but an integer.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1280/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:26 +01:00
Chris Dearman e48682ddaa MIPS: Restore signalling NaN behaviour for abs.[sd]
Atsushi Nemoto <anemo@mba.ocn.ne.jp> spotted that this had been incorrectly
removed in a previous patch

Signed-off-by: Chris Dearman <chris@mips.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1213/
Tested-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:24 +01:00
Wu Zhangjin 4085467060 MIPS: Loongson: CS5536: Fix ISA support
The function _wrmsr() called by divil_lbar_disable()/enable() should be
called with the offset as the argument.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Patchwork: http://patchwork.linux-mips.org/patch/1252/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:22 +01:00
Wu Zhangjin aa5f858b16 MIPS: Loongson: Add a missing break statement in CS5536 IDE code
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: Hu Hongbing <huhb@lemote.com>
Patchwork: http://patchwork.linux-mips.org/patch/1251/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:21 +01:00
Wu Zhangjin f18b2f67ea MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
Add several missing RDMSRs for IDE and USB are missing to avoid the
agressive modification of the high 32 bits of the MSR.

Without this patch some usb devices may fail after printing "reset ehci
host ....." when reading the partition information.

Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: Hu Hongbing <huhb@lemote.com>
Patchwork: http://patchwork.linux-mips.org/patch/1250/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:20 +01:00
Florian Fainelli e1df057df8 MIPS: AR7: Fix typo in ar7.h
This fixes a typo on the AR7_RESET_PERIPHERAL define.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1247/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:18 +01:00
Florian Fainelli 154615d554 MIPS: AR7: Use correct UART port type
PORT_AR7 has the correct TRIG flag (UART_FCR_R_TRIG_00) as well as
UART_CAP_AFE being set. This fixes UART on TNETD7300 revision 0x02,
which would otherwise mangle some characters, no side effects on
other revisions.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1246/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:17 +01:00
Peter Zijlstra b945d6b255 rbtree: Undo augmented trees performance damage and regression
Reimplement augmented RB-trees without sprinkling extra branches
all over the RB-tree code (which lives in the scheduler hot path).

This approach is 'borrowed' from Fabio's BFQ implementation and
relies on traversing the rebalance path after the RB-tree-op to
correct the heap property for insertion/removal and make up for
the damage done by the tree rotations.

For insertion the rebalance path is trivially that from the new
node upwards to the root, for removal it is that from the deepest
node in the path from the to be removed node that will still
be around after the removal.

[ This patch also fixes a video driver regression reported by
  Ali Gholami Rudi - the memtype->subtree_max_end was updated
  incorrectly. ]

Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Venkatesh Pallipadi <venki@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Tested-by: Ali Gholami Rudi <ali@rudi.ir>
Cc: Fabio Checconi <fabio@gandalf.sssup.it>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <1275414172.27810.27961.camel@twins>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-07-05 14:43:50 +02:00
Hyuk Lee f50b8bc707 ARM: SAMSUNG: Fix on wrong function name for S5PV210 sdhci0
This patch fixes on wrong function name in include/plat/sdhci.h for Samsung.
The 's5pc100_default_sdhci0()' function should be chnaged to
's5pv210_default_sdhci0()'. Because 's5pv210_default_sdhci0()' must be pair.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
Thomas Abraham 4164acaf09 ARM: S5P6442: Fix PLL setting announce message.
The S5P6442 PLL setting announce message incorrectly displays S5P6440
as the SoC. Change it to S5P6442.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
Marek Szyprowski 6b34f498fe ARM: SAMSUNG: Fix build without SDHCI controllers for S3C64XX
This patch fixes the following compilation problem if only NCP machine
is selected:

arch/arm/mach-s3c64xx/s3c6410.c: In function 's3c6410_map_io':
arch/arm/mach-s3c64xx/s3c6410.c:51: error: implicit declaration of function 's3c6410_default_sdhci2'

And also adds missed 's3c6400_default_sdhci2'.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fix and added comments]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
MyungJoo Ham 154d62e4cd ARM: S5PV210: Correct clock register properties
1. Corrected shift values of I2S and UART clocks (CLK_GATE_IP3), which were
defined incorrectly.

2. Corrected shift values of sclk_audio, uclk1, sclk_fimd, sclk_mmc,
sclk_spi, sclk_pwm, which had duplicated .enable/.ctrlbit with their
twins defined in struct clk init_clocks_disable[] and struct clk
init_clocks[]. We've changed their .enable/.ctrlbit to use CLK_SRC_MASK
register to avoid the duplicated clock problem described below.

NOTE: Duplicated Clock Problem
Please note that each clock definition should access different control
register; otherwise, the system may suffer lockups. For example, if we
have two clock definitions "a" and "b" which access the same register
(and the shift value). Then, when we do:

	module A
	clk = clk_get("a");
	clk->clk_enable(clk);

	module B (context switch)
	clk = clk_get("b");
	clk->clk_enable(clk);
	do something with clk.
	clk->clk_disable(clk);

	module A (context switch)
	do something with clk
	* At this point, the system may hang.

Therefore, there should be no clock definitions with the same contol
register/shift. If we need to create "aliases", then, creating child
clocks sharing the clock should be fine.

3. Corrected other sclk_* shift values and access registers.

Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title and message fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
Boojin Kim 79fc72d6d3 ARM: S5P: Bug fix on external interrupt for S5P SoCs
This patch fixes bug on eint type set function, s5p_irq_eint_set_type().
In the IRQ_TYPE_EDGE_FALLING case, S5P_EXTINT_FALLEDGE is right
instead of S5P_EXTINT_RISEEDGE

Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
Linus Torvalds 71665963af Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6205/1: perf: ensure counter delta is treated as unsigned
  ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220
  ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
  ARM: 6195/1: OMAP3: pmu: make CPU_HAS_PMU dependent on OMAP3_EMU
  ARM: 6194/1: change definition of cpu_relax() for ARM11MPCore
  ARM: 6193/1: RealView: Align the machine_desc.phys_io to 1MB section
  ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
  ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
  ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
  ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
  ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
  [ARM] mmp: fix build failure due to IRQ_PMU depends on ARCH_PXA
  [ARM] pxa/mioa701: fix camera regression
  [ARM] pxa/z2: fix flash layout to final version
  [ARM] pxa/z2: fix missing include in battery driver
  [ARM] pxa: fix incorrect gpio type in udc_pxa2xx.h
2010-07-04 20:21:39 -07:00
Linus Torvalds 3f7d7b4bde Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  perf, x86: Fix incorrect branches event on AMD CPUs
  perf tools: Fix find tids routine by excluding "." and ".."
  x86: Send a SIGTRAP for user icebp traps
2010-07-04 20:20:53 -07:00
Will Deacon 446a5a8b1e ARM: 6205/1: perf: ensure counter delta is treated as unsigned
Hardware performance counters on ARM are 32-bits wide but atomic64_t
variables are used to represent counter data in the hw_perf_event structure.

The armpmu_event_update function right-shifts a signed 64-bit delta variable
and adds the result to the event count. This can lead to shifting in sign-bits
if the MSB of the 32-bit counter value is set. This results in perf output
such as:

 Performance counter stats for 'sleep 20':

 18446744073460670464  cycles             <-- 0xFFFFFFFFF12A6000
        7783773  instructions             #      0.000 IPC
            465  context-switches
            161  page-faults
        1172393  branches

   20.154242147  seconds time elapsed

This patch ensures that the delta value is treated as unsigned so that the
right shift sets the upper bits to zero.

Cc: <stable@kernel.org>
Acked-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-04 23:11:37 +01:00
Vince Weaver f287d332ce perf, x86: Fix incorrect branches event on AMD CPUs
While doing some performance counter validation tests on some
assembly language programs I noticed that the "branches:u"
count was very wrong on AMD machines.

It looks like the wrong event was selected.

Signed-off-by: Vince Weaver <vweaver1@eecs.utk.edu>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: <stable@kernel.org>
LKML-Reference: <alpine.DEB.2.00.1007011526010.23160@cl320.eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-07-03 15:19:34 +02:00
Catalin Marinas 42c4dafe80 ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220
RealView boards with certain revisions of the L210/L220 cache controller
may have issues (hardware deadlock) with the mandatory barriers (DSB
followed by an L2 cache sync) when ARM_DMA_MEM_BUFFERABLE is enabled.
The patch disables ARM_DMA_MEM_BUFFERABLE for these boards.

Tested-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-02 10:10:20 +01:00
Catalin Marinas 2503a5ecd8 ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
RealView boards with certain revisions of the L220 cache controller (ARM11*
processors only) may have issues (hardware deadlock) with the recent changes to
the mb() barrier implementation (DSB followed by an L2 cache sync). The patch
redefines the RealView ARM11MPCore mandatory barriers without the outer_sync()
call.

Cc: <stable@kernel.org>
Tested-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-02 10:10:09 +01:00
Linus Torvalds 1e31b0ffbb Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  [IA64] Fix spinaphore down_spin()
2010-07-01 09:36:15 -07:00
Russell King 00952d8f14 Merge branch 'imx-for-2.6.35' of git://git.pengutronix.de/git/imx/linux-2.6 2010-07-01 11:01:33 +01:00
Russell King fb35f1ce6b Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 2010-07-01 10:16:04 +01:00
Will Deacon 8954bb0da9 ARM: 6195/1: OMAP3: pmu: make CPU_HAS_PMU dependent on OMAP3_EMU
CPU performance event counters on v7 cores will only operate
if either the NIDEN or DBGEN signals are driven high.

For the OMAP3 platform, these signals are driven low by default
but DBGEN can be asserted by selecting the OMAP3_EMU Kconfig option,
which enables the virtual clock for hardware debugging peripherals.

Acked-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:13:58 +01:00
Will Deacon 534be1d5a2 ARM: 6194/1: change definition of cpu_relax() for ARM11MPCore
Linux expects that if a CPU modifies a memory location, then that
modification will eventually become visible to other CPUs in the system.

On an ARM11MPCore processor, loads are prioritised over stores so it is
possible for a store operation to be postponed if a polling loop immediately
follows it. If the variable being polled indirectly depends on the outstanding
store [for example, another CPU may be polling the variable that is pending
modification] then there is the potential for deadlock if interrupts are
disabled. This deadlock occurs in the KGDB testsuire when executing on an
SMP ARM11MPCore configuration.

This patch changes the definition of cpu_relax() to smp_mb() for ARMv6 cores,
forcing a flushing of the write buffer on SMP systems before the next load
takes place. If the Kernel is not compiled for SMP support, this will expand
to a barrier() as before.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:13:52 +01:00
Catalin Marinas cc9897df72 ARM: 6193/1: RealView: Align the machine_desc.phys_io to 1MB section
When not aligned, random bits could be written in the initial page table
by the __create_page_tables() function.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:13:46 +01:00
Catalin Marinas cf0bb91b3c ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
When not aligned, random bits could be written in the initial page table
by the __create_page_tables() function.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:13:41 +01:00
Catalin Marinas ad642d9f58 ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
Commit f4d6477f introduced a workaround for the lack of hardware
broadcasting of the cache maintenance operations on ARM11MPCore.
However, the workaround is only valid on CPUs that do not do speculative
loads into the D-cache.

This patch adds a Kconfig option with the corresponding help to make the
above clear. When the DMA_CACHE_RWFO option is disabled, the kernel
behaviour is that prior to the f4d6477f commit. This also allows ARMv6
UP processors with speculative loads to work correctly.

For other processors, a different workaround may be needed.

Cc: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:12:31 +01:00
Catalin Marinas ca57926d53 ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
A recent patch for DMA cache maintenance on ARM11MPCore added a write
for ownership trick to the v6_dma_inv_range() function. Such operation
destroys data already present in the buffer. However, this function is
used with with dma_sync_single_for_device() which is supposed to
preserve the existing data transfered into the buffer. This patch adds a
combination of read/write for ownership to preserve the original data.

Reported-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:12:14 +01:00
Catalin Marinas a5e9d38b22 ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
This macro is not defined when !CONFIG_MMU so this patch moves the
CONSISTENT_* definitions to the CONFIG_MMU section.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-01 10:12:07 +01:00
Daniel Mack 4d5d85906a ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
arch/arm/mach-mx3/built-in.o: In function `mx31lilly_board_init':
mach-kzm_arm11_01.c:(.init.text+0x674): undefined reference to `otg_ulpi_create'
mach-kzm_arm11_01.c:(.init.text+0x68c): undefined reference to `otg_ulpi_create'
mach-kzm_arm11_01.c:(.init.text+0x744): undefined reference to `mxc_ulpi_access_ops'
make: *** [.tmp_vmlinux1] Error 1

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-01 09:52:39 +02:00
Darrick J. Wong d596043d71 x86, Calgary: Limit the max PHB number to 256
The x3950 family can have as many as 256 PCI buses in a single system, so
change the limits to the maximum.  Since there can only be 256 PCI buses in one
domain, we no longer need the BUG_ON check.

Signed-off-by: Darrick J. Wong <djwong@us.ibm.com>
LKML-Reference: <20100701004519.GQ15515@tux1.beaverton.ibm.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-06-30 22:41:42 -07:00