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Stephen Warren 5608bd3ed2 ASoC: tegra: convert to standard DMA DT bindings
By passing no flags when calling snd_dmaengine_pcm_register() from
tegra_pcm.c, we end up using dma_request_slave_channel() rather than
dmaengine_pcm_compat_request_channel(), and hence rely on the standard
DMA DT bindings and stashing the DMA slave ID away during channel
allocation. This means there's no need to use a custom DT property to
store the slave ID. So, remove all the code that parsed it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
2013-12-11 16:43:57 -07:00
Stephen Warren 5185e0acc8 ASoC: tegra: use reset framework
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

This change also renames "clock"/"clk" to "modules"/"mod" in symbols
related to entries in configlink_clocks[], since:
- We don't care about clock handles any more, but rather reset handles,
  so the old name isn't applicable.
- It really is a list of modules on the bus, about which we currently
  only care about reset handles.
If we start caring about any other aspect of the modules in the future,
we won't have to rename all these symbols again.

Note: The addition of "depends COMMON_CLOCK" is something that was missing
before, not a new requirement.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:43:35 -07:00
Stephen Warren 5e049fce36 ASoC: tegra: support new register layouts in Tegra124
Tegra124 introduces some small changes to the layout of some registers.
Modify the affected drivers to program those registers appropriately
based on which SoC they're running on.

Tegra124 also introduced some new modules on the AHUB configlink register
bus. These will require new entries in configlink_clocks[] in the AHUB
driver. However, supporting that change likely relies on switching Tegra
to the common reset framework, so I'll defer that change for now.

Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-14 14:56:27 +01:00
Mark Brown d14bc151a4 Merge remote-tracking branch 'asoc/topic/tegra' into asoc-next 2013-04-12 13:57:21 +01:00
Lars-Peter Clausen 3489d5067a ASoC: tegra: Use common DAI DMA data struct
Use the common DAI DMA data struct for tegra, this allows us to use the common
helper function to configure the DMA slave config based on the DAI DMA data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-03 18:13:34 +01:00
Stephen Warren 95d3607569 ASoC: tegra: add Tegra114 support to the AHUB driver
Tegra114's AHUB shares a design with Tegra30, with the followin changes:
* Supports more (10 vs. 4) bi-directional FIFO channels into RAM.
* Requires a separate block of registers to support the above.
* Supports more attached clients, i.e. new audio multiplexing and
  de-multiplexing modules.
* Is affected by more clocks due to the above.

This change fully defines the device tree binding changes required to
represent these changes, and minimally extends the driver to support
the new hardware, without exposing any of the new FIFO channels.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-03-25 15:56:35 +00:00
Stephen Warren be944d42cc ASoC: tegra: add tegra30-ahub driver
The AHUB (Audio Hub) is a mux/crossbar which links all audio-related
devices except the HDA controller on Tegra30. The devices include the
DMA FIFOs, DAM (Digital Audio Mixers), I2S controllers, and SPDIF
controller. Audio data may be routed between these devices in various
combinations as required by board design/application.

Includes a squashed bugfix from Nikesh Oswal <noswal@nvidia.com>
Includes squashed bugfixes from Sumit Bhattacharya <sumitb@nvidia.com>

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-04-13 11:29:22 +01:00