3 Коммитов

Автор	SHA1	Сообщение	Дата
Jim Wilson	b8c8a9590e	RISC-V: Add FP register ptrace support for gdb. ... Add a variable and a macro to describe FP registers, assuming only D is supported. FP code is conditional on CONFIG_FPU. The FP regs and FCSR are copied separately to avoid copying struct padding. Tested by hand and with the gdb testsuite. Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2018-10-22 17:38:04 -07:00
Jim Wilson	1db9b80980	RISC-V: Fix PTRACE_SETREGSET bug. ... In riscv_gpr_set, pass regs instead of &regs to user_regset_copyin to fix gdb segfault. Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2018-07-04 14:12:47 -07:00
Palmer Dabbelt	e2c0cdfba7	RISC-V: User-facing API ... This patch contains code that is in some way visible to the user: including via system calls, the VDSO, module loading and signal handling. It also contains some generic code that is ABI visible. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>	2017-09-26 15:26:48 -07:00