Граф коммитов

31 Коммитов

Автор SHA1 Сообщение Дата
Alexandre Belloni b3b02eac33 clk: at91: Add sama5d2 suspend/resume
On sama5d2, VDD core maybe be cut while in suspend. This means registers
will be lost. Ensure they are saved and restored properly.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-29 18:47:35 -07:00
Alexandre Belloni 60cad091a5 clk: at91: pmc: remove useless capacities handling
Capacities only handles interrupts and they are not use anymore. Remove the
whole initialisation.

Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-02-17 17:53:04 +01:00
Alexandre Belloni af719c1807 clk: at91: pmc: drop at91_pmc_base
at91_pmc_base is not used anymore, remove it along with at91_pmc_read and
at91_pmc_write.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-17 17:53:03 +01:00
Alexandre Belloni fbc7edca5a ARM: at91: pm: move idle functions to pm.c
Avoid using code from clk/at91 for PM.
This also has the bonus effect of setting arm_pm_idle for sama5 platforms.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-02-17 17:53:02 +01:00
Alexandre Belloni ea52bc6467 clk: at91: pmc: move pmc structures to C file
pmc.c is now the only user of struct at91_pmc*, move their definition in
the C file.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-17 17:53:00 +01:00
Alexandre Belloni a5df602bd3 clk: at91: pmc: merge at91_pmc_init in atmel_pmc_probe
at91_pmc_init() doesn't do much anymore, merge it in atmel_pmc_probe().

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-17 17:53:00 +01:00
Alexandre Belloni 99a8170652 clk: at91: remove IRQ handling and use polling
The AT91 clock drivers make use of IRQs to avoid polling when waiting for
some clocks to be enabled. Unfortunately, this leads to a crash when those
IRQs are threaded (which happens when using preempt-rt) because they are
registered before thread creation is possible.

Use polling on those clocks instead to avoid the problem.

Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-02-17 17:52:59 +01:00
Boris Brezillon 1bdf02326b clk: at91: make use of syscon/regmap internally
Use the regmap coming from syscon to access the registers instead of using
pmc_read/pmc_write. This allows to avoid passing the at91_pmc structure to
the child nodes of the PMC.

The final benefit is to have each clock register itself instead of having
to iterate over the children.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-02-17 17:52:58 +01:00
Boris Brezillon 863a81c3be clk: at91: make use of syscon to share PMC registers in several drivers
The PMC block is providing several functionnalities:
 - system clk management
 - cpuidle
 - platform suspend

Replace the void __iomem *regs field by a regmap (retrieved using syscon)
so that we can later share the regmap across several drivers without
exporting a new specific API or a global void __iomem * variable.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-17 17:52:58 +01:00
Nicolas Ferre df70aeef60 clk: at91: add generated clock driver
Add a new type of clocks that can be provided to a peripheral.
In addition to the peripheral clock, this new clock that can use several
input clocks as parents can generate divided rates.
This would allow a peripheral to have finer grained clocks for generating
a baud rate, clocking an asynchronous part or having more
options in frequency.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[sboyd@codeaurora.org: Transition to new clk_hw provider APIs]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-01 12:48:11 -07:00
Nicolas Ferre a5752e57bb clk: at91: add PMC sama5d2 support
Add support for the new sama5d2 SoC and adapt capabilities.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-01 12:39:44 -07:00
Rob Herring 00f3ec37d2 clk: kill off set_irq_flags usage
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Mike Turquette <mturquette@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:41 -07:00
Krzysztof Kozlowski d6c2767867 clk: at91: Constify irq_domain_ops
The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-01 18:25:09 -07:00
Boris BREZILLON 947f5b1085 clk: at91: implement suspend/resume for the PMC irqchip
The irq line used by the PMC block is shared with several peripherals
including the init timer which is registering its handler with
IRQF_NO_SUSPEND.

Implement the appropriate suspend/resume callback for the PMC irqchip,
and inform irq core that PMC irq handler can be safely called while
the system is suspended by setting IRQF_COND_SUSPEND.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-03-04 22:11:17 +01:00
Alexandre Belloni 29ee506d0d ARM: at91: move at91rm9200_idle() to clk/at91/pmc.c
Move at91rm9200_idle() along with at91sam9_idle() in clk/at91/pmc.c.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-01-16 18:08:42 +01:00
Alexandre Belloni bcc5fd49a0 clk: at91: add a driver for the h32mx clock
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix
interconnect (h32mx) has a clock that can be setup at the half of the h64mx
clock (which is mck). The h32mx clock can not exceed 90 MHz.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-09-22 11:38:59 +02:00
Boris BREZILLON 80eded6ce8 clk: at91: add slow clks driver
AT91 slow clk is a clk multiplexer.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose among 2 sources: an internal RC oscillator circuit and an oscillator
using an external crystal.

In other Socs (sam9260 family) the multiplexer source is hardcoded with
the OSCSEL signal.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-07 18:27:45 +02:00
Boris BREZILLON 27cb1c2083 clk: at91: rework main clk implementation
AT91 main clk is a clk multiplexer and not a simple fixed rate clk as
currently implemented.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose among 2 sources: an internal RC oscillator circuit and an
oscillator using an external crystal.

In other Socs (sam9260, rm9200 families) the multiplexer source is
hardcoded to the external crystal oscillator.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-07 18:27:22 +02:00
Kevin Hilman 273c2279ca Second cleanup pull-request for 3.14:
- a tiny fix for the recent AT91 CCF implementation
 - the switch of one platform to DT with board file removal
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJSzV2DAAoJEAf03oE53VmQLl0H/2KFQx+lwcg1XWd6Sq05yW7h
 PtVKT6bCNZxDXGiUZ1mvZLBkDlVoQn7p35gX+NM05rsad8t9ibdmEutpe4ynPohc
 Es5UpQ20txhpzGoDiIIW+pWng+fajtMV1dV8xEC4pf/d4K7HSH8k/tUwZ4GrtaJb
 4eUyohznKBHdroavXao1aIuvM+MJvIu2qvxCZZPYDp0LBzTxlHR+ogcCcqO80YSL
 dHG2WzbGLr+XMkxpl0bJMF9bxYarg0NsHk+GPqmnOI479rNevptSncbLQRchvwGD
 auEAN8I77IwQGUpTuupssKgUrSbOU9JHTwiC2pv8zkaKdoYaIBQVPXCvmyV6kAk=
 =KYgN
 -----END PGP SIGNATURE-----

Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup

From Nicolas Ferre:
Second cleanup pull-request for 3.14:
- a tiny fix for the recent AT91 CCF implementation
- the switch of one platform to DT with board file removal

* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
  ARM: at91: switch Calao QIL-A9260 board to DT
  clk: at91: fix pmc_clk_ids data type attriubte

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2014-01-14 15:41:57 -08:00
Boris BREZILLON 7736c715d0 clk: at91: fix pmc_clk_ids data type attriubte
Fix pmc_clk_ids data type attribute (__initdata -> __initconst).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-19 16:00:24 +01:00
Nicolas Ferre 8330148011 ARM: at91: remove AT91_PROGRAMMABLE_CLOCKS configuration option
This AT91 specific Kconfig option removed the code that dealt with
programmable clocks. Each AT91 SoC embeds programmable clocks and
there is little gain to remove this code in case that such a clock
is not used.
If this option is not selected, it causes certain drivers to fail
to build. We simply remove this option instead of adding code just
to build a workaround.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-12 09:57:42 -08:00
Boris BREZILLON a9c0688fde clk: at91: add PMC smd clock
This patch adds at91 smd (Soft Modem) clock implementation using common clk
framework.

Not used by any driver right now.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:25 +01:00
Boris BREZILLON c84a61d872 clk: at91: add PMC usb clock
This patch adds new at91 usb clock implementation using common clk framework.
This clock is used to clock usb ports (ohci, ehci and udc).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:25 +01:00
Boris BREZILLON f090fb37de clk: at91: add PMC utmi clock
This adds new at91 utmi clock implementation using common clk framework.

This clock is a pll with a fixed factor (x40).
It is used as a source for usb clock.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:25 +01:00
Boris BREZILLON 1f22f8bb64 clk: at91: add PMC programmable clocks
This patch adds new at91 programmable clocks implementation using common clk
framework.
A programmable clock is a clock which can be exported on a given pin to clock
external devices.
Each programmable clock is given an id (from 0 to 8).
The number of available programmable clocks depends on the SoC you're using.
Programmable clock driver only implements the clock setting (clock rate and
parent setting). It must be chained to a system clock in order to
enable/disable the generated clock.
The PCKX pins used to output the clock signals must be assigned to the
appropriate peripheral (see atmel's datasheets).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:24 +01:00
Boris BREZILLON 6114067e43 clk: at91: add PMC peripheral clocks
This patch adds new at91 peripheral clock implementation using common clk
framework.

Almost all peripherals provided by at91 SoCs need a clock to work properly.
This clock is enabled/disabled using PCER/PCDR resgisters.

Each peripheral is given an id (see atmel's datasheets) which is used to
define and reference peripheral clocks.

Some new SoCs (at91sam9x5 and sama5d3) provide a new register (PCR) where you
can configure the peripheral clock as a division of the master clock.
This will help reducing the peripherals power comsumption.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:24 +01:00
Boris BREZILLON 5fba62ea26 clk: at91: add PMC system clocks
This patch adds new at91 system clock implementation using common clk
framework.

Some peripherals need to enable a "system" clock in order to work properly.
Each system clock is given an id based on the bit position in SCER/SCDR
registers.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:23 +01:00
Boris BREZILLON e442d23440 clk: at91: add PMC master clock
This patch adds new at91 master clock implementation using common clk
framework.

The master clock layout describe the MCKR register layout.
There are 2 master clock layouts:
- at91rm9200
- at91sam9x5

Master clocks are given characteristics:
- min/max clock output rate

These characteristics are checked during rate change to avoid
over/underclocking.

These characteristics are described in atmel's SoC datasheet in
"Electrical Characteristics" paragraph.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:23 +01:00
Boris BREZILLON 1a748d2bc5 clk: at91: add PMC pll clocks
This patch adds new at91 pll clock implementation using common clk framework.

The pll clock layout describe the PLLX register layout.
There are four pll clock layouts:
- at91rm9200
- at91sam9g20
- at91sam9g45
- sama5d3

PLL clocks are given characteristics:
- min/max clock source rate
- ranges of valid clock output rates
- values to set in out and icpll fields for each supported output range

These characteristics are checked during rate change to avoid
over/underclocking.

These characteristics are described in atmel's SoC datasheet in
"Electrical Characteristics" paragraph.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:22 +01:00
Boris BREZILLON 38d34c3120 clk: at91: add PMC main clock
This patch adds new at91 main oscillator clock implementation using common
clk framework.

If rate is not provided during clock registration it is calculated using
the slow clock (main clk parent in this case) rate and MCFR register.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:22 +01:00
Boris BREZILLON 0ad6125b15 clk: at91: add PMC base support
This patch adds at91 PMC (Power Management Controller) base support.

All at91 clocks managed by the PMC unit will use this framework.

This framework provides the following fonctionalities:
- define a new struct at91_pmc to hide PMC internals (lock, PMC memory
  mapping, irq domain, ...)
- read/write helper functions (pmc_read/write) to access PMC registers
- lock/unlock helper functions (pmc_lock/unlock) to lock/unlock access to
  pmc registers
- a new irq domain and its associated irq chip to request PMC specific
  interrupts (useful for clk prepare callbacks)

The PMC unit is declared as a dt clk provider (CLK_OF_DECLARE), and every
clk using this framework will declare a table of of_at91_clk_init_cb_t
and add it to the pmc_clk_ids table.

When the pmc dt clock setup function is called (by of_clk_init function),
it triggers the registration of every supported child clk (those matching
the definitions in pmc_clk_ids).

This patch copies at91_pmc_base (memory mapping) and at91sam9_idle
(function) from arch/arm/mach-at91/clock.c (which is not compiled if
COMMON_CLK_AT91 is enabled).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:13 +01:00