Граф коммитов

915390 Коммитов

Автор SHA1 Сообщение Дата
Geert Uytterhoeven 47fa5c971b pinctrl: amd: Add ACPI dependency
Currently the AMD pin controller driver supports ACPI platform only.
Make the PINCTRL_AMD config symbol depend on ACPI, to avoid asking the
user about it when configuring a kernel without ACPI support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507113751.24213-1-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16 11:23:11 +02:00
Geert Uytterhoeven 80691a8ac7 pinctrl: equilibrium: Add architecture dependency
The Equilibrium pin controller is only present on Intel Lightning
Mountain SoCs.  Add an architecture dependency to the
PINCTRL_EQUILIBRIUM config symbol, to avoid asking the user about it
when configuring a kernel for a non-x86 architecture.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507113626.24026-2-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16 11:21:25 +02:00
Linus Walleij 98a09fb4cb intel-pinctrl for v5.8-1
* Introduce GPIO driver for Jasper Lake
 * Fix long standing bug in Sunrisepoint-H PAD locking code
 * Enable pin configuration setting for GPIO chip for Baytrail
 * Work around race condition in Cherriview hardware when handle IRQ
 * Clean up Cherryview code to be closer to other drivers
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Use platform_get_irq_optional() explicitly
  -  Enable pin configuration setting for GPIO chip
 
 cannonlake:
  -  Use generic flag for special GPIO base treatment
 
 cherryview:
  -  Add missing spinlock usage in chv_gpio_irq_handler
  -  Use GENMASK() consistently
  -  Re-use data structures from pinctrl-intel.h (part 2)
 
 icelake:
  -  Use generic flag for special GPIO base treatment
 
 intel:
  -  Move npins closer to pin_base in struct intel_community
  -  Update description in struct intel_community
  -  Add Intel Jasper Lake pin controller support
  -  Introduce new flag to force GPIO base to be 0
  -  Introduce common flags for GPIO mapping scheme
 
 lynxpoint:
  -  Use platform_get_irq_optional() explicitly
 
 sunrisepoint:
  -  Fix PAD lock register offset for SPT-H
 
 tigerlake:
  -  Use generic flag for special GPIO base treatment
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Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v5.8-1

* Introduce GPIO driver for Jasper Lake
* Fix long standing bug in Sunrisepoint-H PAD locking code
* Enable pin configuration setting for GPIO chip for Baytrail
* Work around race condition in Cherriview hardware when handle IRQ
* Clean up Cherryview code to be closer to other drivers

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Use platform_get_irq_optional() explicitly
 -  Enable pin configuration setting for GPIO chip

cannonlake:
 -  Use generic flag for special GPIO base treatment

cherryview:
 -  Add missing spinlock usage in chv_gpio_irq_handler
 -  Use GENMASK() consistently
 -  Re-use data structures from pinctrl-intel.h (part 2)

icelake:
 -  Use generic flag for special GPIO base treatment

intel:
 -  Move npins closer to pin_base in struct intel_community
 -  Update description in struct intel_community
 -  Add Intel Jasper Lake pin controller support
 -  Introduce new flag to force GPIO base to be 0
 -  Introduce common flags for GPIO mapping scheme

lynxpoint:
 -  Use platform_get_irq_optional() explicitly

sunrisepoint:
 -  Fix PAD lock register offset for SPT-H

tigerlake:
 -  Use generic flag for special GPIO base treatment
2020-05-15 15:06:00 +02:00
Dafna Hirschfeld d7faa8ffb6 pinctrl: rockchip: fix memleak in rockchip_dt_node_to_map
In function rockchip_dt_node_to_map, a new_map variable is
allocated by:

new_map = devm_kcalloc(pctldev->dev, map_num, sizeof(*new_map),
		       GFP_KERNEL);

This uses devres and attaches new_map to the pinctrl driver.
This cause a leak since new_map is not released when the probed
driver is removed. Fix it by using kcalloc to allocate new_map
and free it in `rockchip_dt_free_map`

Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20200506100903.15420-1-dafna.hirschfeld@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 19:45:33 +02:00
Dafna Hirschfeld c4f333b758 pinctrl: rockchip: return ENOMEM instead of EINVAL if allocation fails
The function rockchip_pinctrl_parse_dt returns -EINVAL if
allocation fails. Change the return error to -ENOMEM

Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20200506101424.15691-1-dafna.hirschfeld@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:19:07 +02:00
Arnd Bergmann c7acd6fe8a pinctrl: mediatek: add pinctrl-mtk-common-v2 module license
Kbuild warns when this file is built as a loadable module:

WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.o
see include/linux/module.h for more information

Add the missing license/author/description tags.

Fixes: 8174a8512e ("pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200505140848.554957-1-arnd@arndb.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:10:36 +02:00
Paul Cercueil 9a0f1341df pinctrl: ingenic: Add irq_{request,release}_resources callbacks
These are called when a GPIO is to be used as IRQ.

Without these custom callbacks, when an interrupt is requested directly
and not through gpiod_to_irq(), the request fails because the GPIO is
not necesarily in input mode. These callbacks simply enforce that the
requested GPIO is in input mode.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20200503164549.163884-1-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:05:02 +02:00
Rikard Falkeborn 8068071c09 pinctrl: rk805: Constify rk805_gpio_cfgs
Mark pin_cfg as const, allowing the compiler to put the struct in
.rodata instead of .data.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200425203813.6442-1-rikard.falkeborn@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 13:35:33 +02:00
Linus Walleij 7740dda5b4 pinctrl: sh-pfc: Updates for v5.8
- Fix SWIO pins on RZ/A1L,
   - Add missing bindings to MAINTAINERS.
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Merge tag 'sh-pfc-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.8

  - Fix SWIO pins on RZ/A1L,
  - Add missing bindings to MAINTAINERS.
2020-05-09 00:37:04 +02:00
Linus Walleij 32c8a94660 pinctrl: db8500: Fix some old bugs
The Hulk robot reports these build warnings:

drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:899:20: warning:
‘sbag_groups’ defined but not used [-Wunused-const-variable=]
 DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
                    ^
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:570:23: warning:
‘ipgpio6_c_2_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
                       ^~~~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:472:23: warning:
‘mc1dir_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13,
DB8500_PIN_AG12,
                       ^~~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:453:23: warning:
‘modem_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22,
DB8500_PIN_C23,
                       ^~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:430:23: warning:
‘kpskaskb_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17,
DB8500_PIN_D16 };
                       ^~~~~~~~~~~~~~~~~

They are just very old bugs in seldomly used pin groups.
Fix the problem by using the pins and referencing the
function.

Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:33:08 +02:00
Linus Walleij 767972b9b4 pinctrl: ab8505: Define group for GPIO pin 50
The Hulk robot reports an usused varible:

drivers/pinctrl/nomadik/pinctrl-ab8505.c:137:23: warning:
‘gpio50_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
                       ^~~~~~~~~~~~~~~

This variable actually should be used. Probably an oversight
by the driver author.

Cc: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:32:57 +02:00
Jason Yan 0320d260a7 pinctrl: bm1880: add pwm37 to bm1880_pctrl_groups
The 'pwm37' is not added to bm1880_pctrl_groups, which triggers a gcc
build warning:

drivers/pinctrl/pinctrl-bm1880.c:263:27: warning: ‘pwm37_pins’ defined
but not used [-Wunused-const-variable=]
 static const unsigned int pwm37_pins[] = { 110 };

Signed-off-by: Jason Yan <yanaijie@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200428115543.33379-1-yanaijie@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:28:37 +02:00
Amelie Delaunay 36126f5309 pinctrl: stmfx: stmfx_pinconf_set doesn't require to get direction anymore
Pin direction is not used to set pin configuration.

Fixes: a502b343eb ("pinctrl: stmfx: update pinconf settings")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/20200422072513.8352-1-amelie.delaunay@st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 14:49:11 +02:00
Dejin Zheng d71ffeb9f2 pinctrl: fix several typos
use codespell to fix lots of typos over frontends.

Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
CC: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20200421142402.9524-1-zhengdejin5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 13:26:49 +02:00
Martin Blumenstingl f8f0aa0089 pinctrl: meson: wire up the gpio_chip's set_config callback
Use gpiochip_generic_config for the gpio_chip's set_config callback so
GPIO flags like GPIO_PULL_UP or GPIO_PULL_DOWN can be used in the board
.dts descriptions.
This is required for some Meson8m2 boards where GPIO_BSD_EN provides the
"MUTE" signal and requires enabling the internal pull-up resistor.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200417183349.1283092-3-martin.blumenstingl@googlemail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 12:00:46 +02:00
Martin Blumenstingl ef1d0bce38 pinctrl: meson: implement the gpio_chip get_direction callback
Implement the get_direction callback so we read the direction from the
actual GPIO controller register. This is recommended by the gpio_chip
kernel doc.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200417183349.1283092-2-martin.blumenstingl@googlemail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 12:00:46 +02:00
Venkata Narendra Kumar Gutta 4e3ec9e407 pinctrl: qcom: Add sm8250 pinctrl driver.
Add initial Qualcomm SM8250 pinctrl driver to support pin configuration
with pinctrl framework for SM8250 SoC.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org
[bjorn: Regrouped functions, upstream tiles implementation, dropped
        downstream-only features]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 11:18:05 +02:00
Bjorn Andersson 548e332059 dt-bindings: pinctrl: qcom: Add sm8250 pinctrl bindings
Add device tree binding Documentation details for Qualcomm SM8250
pinctrl driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417061907.1226490-2-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 11:17:36 +02:00
Andy Shevchenko 6d649fca34 pinctrl: intel: Move npins closer to pin_base in struct intel_community
It's common across the drivers to use the (pin_base, npins) pair to describe
community characteristics. Thus, move them in the struct intel_community
to be closer to each other.

While at it, add a blank line to cut driver usable fields from what core
reserves for itself.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-22 14:20:00 +03:00
Andy Shevchenko 2ccb9cc3b4 pinctrl: intel: Update description in struct intel_community
It appears that most of the drivers, that are using struct intel_community,
utilize gpps rather than gpp_size. Update comment accordingly.

While here, correct the description of gpp_size, i.e. remove double space
and drop redundant 'etc.' part.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-22 14:19:03 +03:00
Geert Uytterhoeven 41fe32ecc7 MAINTAINERS: Add DT Bindings for Renesas Pin Function Controllers
The "PIN CONTROLLER - RENESAS" section lacks the related DT bindings.
Add them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200417141003.22816-1-geert+renesas@glider.be
2020-04-20 13:14:05 +02:00
Jason Yan 4b4e8e93ec pinctrl: rza1: Fix wrong array assignment of rza1l_swio_entries
The rza1l_swio_entries referred to the wrong array rza1h_swio_pins,
which was intended to be rza1l_swio_pins. So let's fix it.

This is detected by the following gcc warning:

drivers/pinctrl/pinctrl-rza1.c:401:35: warning: ‘rza1l_swio_pins’
defined but not used [-Wunused-const-variable=]
 static const struct rza1_swio_pin rza1l_swio_pins[] = {
                                   ^~~~~~~~~~~~~~~

Fixes: 039bc58e73 ("pinctrl: rza1: Add support for RZ/A1L")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200417111604.19143-1-yanaijie@huawei.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-20 10:12:55 +02:00
Grace Kao 3dbf1ee6ab pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler
According to Braswell NDA Specification Update (#557593),
concurrent read accesses may result in returning 0xffffffff and write
instructions may be dropped. We have an established format for the
commit references, i.e.
cdca06e4e8 ("pinctrl: baytrail: Add missing spinlock usage in
byt_gpio_irq_handler")

Fixes: 0bd50d719b ("pinctrl: cherryview: prevent concurrent access to GPIO controllers")
Signed-off-by: Grace Kao <grace.kao@intel.com>
Reported-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-17 14:36:22 +03:00
Jason Yan 7045e673c2 pinctrl: mcp23s08: add module license
Fix the following build warning:

WARNING: modpost: missing MODULE_LICENSE() in
drivers/pinctrl/pinctrl-mcp23s08.o
see include/linux/module.h for more information

Signed-off-by: Jason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200417092125.12513-1-yanaijie@huawei.com
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-17 12:24:59 +02:00
YueHaibing 5da42a3d25 pinctrl: qcom: Remove duplicated include from pinctrl-msm.c
Remove duplicated include.

Fixes: 13bec8d49b ("pinctrl: qcom: use scm_call to route GPIO irq to Apps")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200408070504.134847-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-17 12:24:52 +02:00
Andy Shevchenko 5f3b82a168 pinctrl: lynxpoint: Use platform_get_irq_optional() explicitly
There is no need to repeat functionality of platform_get_irq_optional()
in the driver. Replace it with explicit call to the helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 18:54:34 +03:00
Andy Shevchenko 0f04a81784 pinctrl: mcp23s08: Split to three parts: core, I²C, SPI
Split the driver to three parts: core, I²C, SPI.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 7b04aaaf66 pinctrl: mcp23s08: Use for_each_set_bit() and hweight_long()
Here is a simplification of SPI code by using for_each_set_bit() and
hweight_long() library functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 1ac30db20b pinctrl: mcp23s08: Make use of device properties
Device property API allows to gather device resources from different sources,
such as ACPI. Convert the drivers to unleash the power of device property API.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 88af89b52a pinctrl: mcp23s08: Propagate error code from device_property_read_u32()
Return error code from device_property_read_u32() as is in mcp23s08_probe().
While here, drop status variable in mcp23s08_irq_set_type() which always 0.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 0874758ecb pinctrl: mcp23s08: Refactor mcp23s08_spi_regmap_init()
There is a lot of duplication for one small helper function.
Refactor mcp23s08_spi_regmap_init() to prepare everything first
and then register regmap at the end.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 0521701c8d pinctrl: mcp23s08: Drop unused parameter in mcp23s08_probe_one()
The cs parameter in mcp23s08_probe_one() is never used. Drop it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko d3da29b628 pinctrl: mcp23s08: Consolidate SPI and I²C code
There are three parts of each, SPI and I²C, driver spread over the code under
ifdeffery. Consolidate them so it will be only one for SPI and one for I²C.

The code has been cosmetically changed to avoid intrusive change.
Clean up is considered in the nearest future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 84d02e785d pinctrl: mcp23s08: Deduplicate IRQ chip filling
In both cases, SPI and I²C, IRQ chip is filled in the same way.
Deduplicate this by moving common part to mcp23s08_probe_one().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 6aba6ed879 pinctrl: mcp23s08: Get rid of legacy platform data
Platform data is a legacy interface to supply device properties
to the driver. In this case we even don't have in-kernel users
for it. Just remove it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Anson Huang f9a8744dde pinctrl: imx: Add imx8dxl driver
i.MX8DXL contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:22 +02:00
Anson Huang 087905f925 dt-bindings: arm: fsl-scu: Add imx8dxl pinctrl support
Update binding doc to support i.MX8DXL pinctrl.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1585306559-13973-1-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:22 +02:00
Corentin Labbe 39eb3cc8ab pinctrl: sunxi: handle probe defferal
When checking the logs on my sun8i-a33-olinuxino I saw:
sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing
but this driver was working after.
This message is just here because the reset controller was still not probed.
So don't say anything if the return code say to wait.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.com
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 10:23:02 +02:00
Light Hsieh 9c95f7c283 pinctrl: mediatek: make MediaTek MT6765 pinctrl ready for buiding loadable module
This patch make pinctrl-mt6765 ready for building as loadable module.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/42100afe6f97d28447c153bea6b54ea556cf95ca.1586289920.git.sean.wang@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:59:11 +02:00
Light Hsieh 8174a8512e pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module
In the future we want to be able to build the MediaTek pinctrl driver,
based on paris, as kernel module. This patch allows pinctrl-paris.c, the
external interrupt controller mtk-eint.c, and pinctrl-mtk-common-v2.c to
be loadable as module.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/9feeb04805e5a406fe22a92e3f280abda39ddda4.1586289920.git.sean.wang@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:59:11 +02:00
Ding Xiang 7e23ab72e7 pinctrl: nomadik:remove unneeded variable
ret is unneeded, just return 0.

Signed-off-by: Ding Xiang <dingxiang@cmss.chinamobile.com>
Link: https://lore.kernel.org/r/1585554986-26521-1-git-send-email-dingxiang@cmss.chinamobile.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:55:57 +02:00
Andy Shevchenko f86a1bb536 pinctrl: baytrail: Use platform_get_irq_optional() explicitly
There is no need to repeat functionality of platform_get_irq_optional()
in the driver. Replace it with explicit call to the helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-15 18:30:39 +03:00
Andy Shevchenko e278dcb704 pinctrl: intel: Add Intel Jasper Lake pin controller support
This driver adds pinctrl/GPIO support for Intel Jasper Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko 9bd59157e1 pinctrl: intel: Introduce new flag to force GPIO base to be 0
In some cases not the first group would like to have GPIO base to be 0.
It's not possible right now due to 0 has special meaning already. Thus,
introduce a new flag to allow drivers to force GPIO base to be 0 on
a certain group. It's assumed that it can be only one group per device
with such flag enabled.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko d4b41f8bb2 pinctrl: tigerlake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko cf2f2c3a44 pinctrl: icelake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko 5ba092edb9 pinctrl: cannonlake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko e5a4ab6a55 pinctrl: intel: Introduce common flags for GPIO mapping scheme
Few drivers are using the same flag to tell Intel pin control core
how to interpret GPIO base.

Provide a generic flags so all drivers can use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:12 +03:00
Andy Shevchenko 5707dd73c7 pinctrl: cherryview: Use GENMASK() consistently
Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00
Andy Shevchenko 36ad7b2448 pinctrl: cherryview: Re-use data structures from pinctrl-intel.h (part 2)
We have some data structures duplicated across the drivers.
Let's deduplicate them by using ones that being provided by
pinctrl-intel.h.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00