Граф коммитов

2621 Коммитов

Автор SHA1 Сообщение Дата
Lad Prabhakar c2ce1e7342 ARM: shmobile: Drop selecting SOC_BUS
Don't automatically select the SOC_BUS config option as we already have
automatically selected it as part of the SOC_RENESAS config option [0]
as renesas-soc.c [1] uses the APIs provided by SOC_BUS config option.

[0] drivers/soc/renesas/Kconfig
[1] drivers/soc/renesas/renesas-soc.c

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220915233852.415407-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-18 14:51:10 +02:00
Liang He 75a185fb92 ARM: shmobile: rcar-gen2: Increase refcount for new reference
In rcar_gen2_regulator_quirk(), for_each_matching_node_and_match() will
automatically increase and decrease the refcount.  However, we should
call of_node_get() for the new reference created in 'quirk->np'.
Besides, we also should call of_node_put() before the 'quirk' being
freed.

Signed-off-by: Liang He <windhl@126.com>
Link: https://lore.kernel.org/r/20220701121804.234223-1-windhl@126.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05 09:08:35 +02:00
Geert Uytterhoeven 7bc53f59fb ARM: shmobile: rcar-gen2: Drop comma after OF match table sentinel
It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.

Add a comment to clarify the purpose of the empty element.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/baaa4df6284401eb126573eb1c8ea5a88705cc37.1646311858.git.geert+renesas@glider.be
2022-05-05 12:32:40 +02:00
Geert Uytterhoeven 3238f82df0 ARM: shmobile: Drop commas after dt_compat sentinels
It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ab4acc22eebb96a0747eb301c878b24b1200736a.1646311825.git.geert+renesas@glider.be
2022-05-05 12:32:40 +02:00
Arnd Bergmann 2f618d5ef5 ARM: remove support for NOMMU ARMv4/v5
It is possible to build MMU-less kernels for Cortex-M base
microcrontrollers as well as a couple of older platforms that
have not been converted to CONFIG_ARCH_MULTIPLATFORM,
specifically ep93xx, footbridge, dove, sa1100 and s3c24xx.

It seems unlikely that anybody has tested those configurations
in recent years, as even building them is frequently broken.
A patch I submitted caused another build time regression
in this configuration. I sent a patch for that, but it seems
better to also remove the option entirely, leaving ARMv7-M
as the only supported Arm NOMMU target for simplicity.

A couple of platforms have dependencies on CONFIG_MMU, those
can all be removed now. Notably, mach-integrator tries to
support MMU-less CPU cores, but those have not actually been
selectable for a long time.

This addresses several build failures in randconfig builds that
have accumulated over the years.

Cc: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-17 09:13:13 +01:00
Wan Jiabing 85744f2d93 ARM: shmobile: rcar-gen2: Add missing of_node_put()
Fix following coccicheck warning:
./arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c:156:1-33: Function
for_each_matching_node_and_match should have of_node_put() before break
and goto.

Early exits from for_each_matching_node_and_match() should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Link: https://lore.kernel.org/r/20211018014503.7598-1-wanjiabing@vivo.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-15 09:58:53 +01:00
Geert Uytterhoeven d4a617c9bb ARM: shmobile: Stop using __raw_*() I/O accessors
There is no reason to keep on using the __raw_{read,write}l() I/O
accessors in Renesas ARM platform code.  Switch to using the plain
{read,write}l() I/O accessors, to have a chance that this works on
big-endian.

Suggested-by: Arnd Bergmann <arnd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20201117142447.2205664-1-geert+renesas@glider.be
2020-11-23 09:54:59 +01:00
Geert Uytterhoeven 5705747c0c ARM: shmobile: sh73a0: Remove obsolete static mapping
There are no more users of the statically mapped IOMEM region on
SH-Mobile AG5.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-8-geert+renesas@glider.be
2020-11-23 09:54:00 +01:00
Geert Uytterhoeven a0a6624dbe ARM: shmobile: sh73a0: Use ioremap() to map SMP registers
Replace using the legacy IOMEM() macro to map various registers related
to secondary CPU bringup by ioremap().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-7-geert+renesas@glider.be
2020-11-23 09:54:00 +01:00
Geert Uytterhoeven cc85e21d6d ARM: shmobile: sh73a0: Use ioremap() to map L2C registers
Replace using the legacy IOMEM() macro to map the L2C registers by
ioremap().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-6-geert+renesas@glider.be
2020-11-23 09:54:00 +01:00
Geert Uytterhoeven 5b0480f53d ARM: shmobile: r8a7779: Remove obsolete static mappings
There are no more users of the statically mapped IOMEM regions on R-Car
H1.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-5-geert+renesas@glider.be
2020-11-23 09:53:59 +01:00
Geert Uytterhoeven 617ff9e657 ARM: shmobile: r8a7779: Use ioremap() to map SMP registers
Replace using the legacy IOMEM() macro to map the ARM Reset Vector
Address Register (AVECR) by ioremap().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-4-geert+renesas@glider.be
2020-11-23 09:53:59 +01:00
Geert Uytterhoeven caf67a9357 ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers
Replace using the legacy IOMEM() macro to map various registers related
to INTC2 configuration by ioremap().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-3-geert+renesas@glider.be
2020-11-23 09:53:59 +01:00
Geert Uytterhoeven ae04aad75b ARM: shmobile: r8a7778: Introduce HPBREG_BASE
Replace the hardcoded address of the HPB Register block by a macro.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-2-geert+renesas@glider.be
2020-11-23 09:53:59 +01:00
Linus Torvalds e731f3146f ARM: SoC platform updates
SoC changes, a substantial part of this is cleanup of some of the older
 platforms that used to have a bunch of board files. In particular:
 
  - Removal of non-DT i.MX platforms that haven't seen activity in years,
    it's time to remove them.
  - A bunch of cleanup and removal of platform data for TI/OMAP platforms,
    moving over to genpd for power/reset control (yay!)
  - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
    closer to multiplatform support (not quite there yet, but getting
    close).
 
 THere are a few other changes too, smaller fixlets, etc. For new
 platform support, the primary ones re:
 
  - New SoC: Hisilicon SD5203, ARM926EJ-S platform.
  - Cpufreq support for i.MX7ULP
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC changes, a substantial part of this is cleanup of some of the
  older platforms that used to have a bunch of board files.

  In particular:

   - Remove non-DT i.MX platforms that haven't seen activity in years,
     it's time to remove them.

   - A bunch of cleanup and removal of platform data for TI/OMAP
     platforms, moving over to genpd for power/reset control (yay!)

   - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
     closer to multiplatform support (not quite there yet, but getting
     close).

  There are a few other changes too, smaller fixlets, etc. For new
  platform support, the primary ones are:

   - New SoC: Hisilicon SD5203, ARM926EJ-S platform.

   - Cpufreq support for i.MX7ULP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
  ARM: mstar: Select MStar intc
  ARM: stm32: Replace HTTP links with HTTPS ones
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC
  ARM: omap3: enable off mode automatically
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: imx: Remove remnant board file support pieces
  ...
2020-10-24 10:33:08 -07:00
Christoph Hellwig 0b1abd1fb7 dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>
Merge dma-contiguous.h into dma-map-ops.h, after removing the comment
describing the contiguous allocator into kernel/dma/contigous.c.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:04 +02:00
Geert Uytterhoeven 919c385dde ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static
As of commit 1e90fea35b ("ARM: shmobile: r8a7791: Use common R-Car
Gen2 machine definition"), there are no more users of
rcar_gen2_timer_init() and rcar_gen2_reserve() outside
arch/arm/mach-shmobile/setup-rcar-gen2.c.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200908074403.4379-1-geert+renesas@glider.be
2020-09-10 19:01:26 +02:00
Lad Prabhakar 135e7a156a ARM: shmobile: r8a7742: Basic SoC support
Add minimal support for the RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-28 10:13:58 +02:00
Geert Uytterhoeven 92d8495ce9 ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The R-Car Gen2 platform code is not a clock provider, and just needs to
call of_clk_init().

Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200212100830.446-6-geert+renesas@glider.be
2020-02-17 11:39:44 +01:00
Geert Uytterhoeven 408324a3c5 ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.

Enable the ARM global timer on these SoCs, which will be used for:
  - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
    4 ns,
  - delay loops, allowing removal of calls to shmobile_init_delay() from
    the corresponding machine vectors.

Note that when using an old DTB lacking the global timer, the kernel
will still work.  However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
2020-02-10 13:44:29 +01:00
Christoph Hellwig 4bdc0d676a remove ioremap_nocache and devm_ioremap_nocache
ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2020-01-06 09:45:59 +01:00
Geert Uytterhoeven 0a4319b5c8 ARM: shmobile: rcar-gen2: Drop legacy DT clock support
As of commit 362b334b17 ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.

Hence remove backward compatibility with old R-Car Gen2 device trees
describing a hierarchical representation of the various CPG and MSTP
clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be
2019-10-25 14:08:10 +02:00
Oleksandr Tyshchenko 51a0daf64d ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.

As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.

Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.

Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-31 11:38:01 +02:00
Wen Yang 115bbc30c6 ARM: shmobile: fix a leaked reference by adding missing of_node_put
The call to of_get_next_child returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.

Detected by coccinelle with the following warnings:
./arch/arm/mach-shmobile/pm-rcar-gen2.c:77:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.
./arch/arm/mach-shmobile/pm-rcar-gen2.c:85:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.
./arch/arm/mach-shmobile/pm-rcar-gen2.c:90:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.

Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18 10:32:36 +01:00
Marek Vasut d5aa84087e ARM: shmobile: porter: enable R-Car Gen2 regulator quirk
Porter needs the regulator quirk, just like the other boards.
But unlike the other boards, the Porter uses DA9063L, which
is at 0x5a. Otherwise, DA9063L and DA9210 IRQ line is still
connected to CPU IRQ2 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18 10:32:36 +01:00
Marek Vasut 5347a02037 ARM: shmobile: Fix R-Car Gen2 regulator quirk
The quirk code currently detects all compatible I2C chips with a shared
IRQ line on all I2C busses, adds them into a list, and registers a bus
notifier. For every chip for which the bus notifier triggers, the quirk
code performs I2C transfer on that I2C bus for all addresses in the list.
The problem is that this may generate transfers to non-existing chips on
systems with multiple I2C busses.

This patch adds a check to verify that the I2C bus to which the chip with
shared IRQ is attached to matches the I2C bus of the chip which triggered
the bus notifier and only starts the I2C transfer if they match.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Tested-by: Nguyen Viet Dung <dung.nguyen.aj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-07 13:24:07 +01:00
Geert Uytterhoeven 2ed29e15e4 ARM: shmobile: R-Mobile: Move pm-rmobile to drivers/soc/renesas/
The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs.  An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.

Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc.

Enable compile-testing on non-ARM and non-R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:29:11 +01:00
Geert Uytterhoeven 445aeb081b ARM: shmobile: R-Mobile: Clean up struct rmobile_pm_domain
Commit 59b89af1d5 ("ARM: shmobile: sh7372: Remove Legacy C
SoC code") removed the last user of the rmobile_pm_domain.resume()
callback.

Commit 44d88c754e ("ARM: shmobile: Remove legacy SoC code
for R-Mobile A1") removed the last user of the rmobile_pm_domain.no_debug
flag and of the "pm-rmobile.h" header file (outside the actual driver).

Hence remove no longer used rmobile_pm_domain members, and absorb the
header file into the driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:28:12 +01:00
Geert Uytterhoeven 062887bf5e ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven 79aac4b9b2 ARM: shmobile: Hide ARCH_RZN1 to improve consistency
Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs,
ARCH_RZN1 is user-visible.  As this symbol is already selected by the
SoC-specific ARCH_R9A06G032 symbol, there is no need for that.

Hide ARCH_RZN1 from the user, and move it up, where all other
family-specific Kconfig symbols live.  Drop the select of CPU_V7, as
this is already implied by the dependency of ARCH_RENESAS on
ARCH_MULTI_V7.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven e743454a0f ARM: shmobile: sh73a0: Remove obsolete inclusion of <asm/smp_twd.h>
As of commit 9a9863987b ("ARM: shmobile: Remove legacy SoC code
for SH-Mobile AG5"), this header file is no longer used.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven 94cf946b8c ARM: shmobile: Restrict TWD support to SoCs that have it
Currently support for the ARM Timer and Watchdog Unit is included
unconditionally, while only some Renesas multicore Cortex-A9 SoCs have
a TWD.

This decreases kernel image size by ca. 2 KiB on SoCs without a TWD.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven af3a03cded ARM: shmobile: Restrict SCU support to SoCs that have it
Currently support for the ARM Cortex-A9 Snoop Control Unit is included
unconditionally, while only Renesas multicore Cortex-A9 SoCs have this
kind of SCU.

This decreases kernel image size by ca. 300 bytes on SoCs without such
an SCU.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Linus Torvalds 4b42745211 ARM: SoC platform updates for 4.20
A couple of platforms change hands in the MAINTAINERS file:
 
 - Linus Walleij lists himself for the ARM Reference platforms:
   versatile, vexpress, integrator and realview. He has been the main
   contributor for these for a while, and makes it official now.
 
 - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood
 
 - Manivannan Sadhasivam becomes a secondary maintainer for the
   Actions Semi machines
 
 - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
   platform: Ludovic Desroches is now a co-maintainer for the platform, and
   several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev,
   Codrin Ciubotariu) take over individual device drivers.
 
 Thanks everyone for working on this, and welcome to the new maintainers!
 
 The "virt" platform on qemy or kvm can now be used in big-endian mode
 without additional tricks, thanks to Jason Donenfeld.
 
 Once again, we gain support for another NXP i.MX6 variant, this time
 it's the i.MX 6ULZ 32-bit single-core version.
 
 On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
 and RZ/G2M (r8a774a1). These are described as microcontrollers on the
 manufacturer website, but appear to be rather powerful. The RZ/G2M is
 used on the reference board for the CIP Super Long Term Support (SLTS)
 Linux Kernels.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "A couple of platforms change hands in the MAINTAINERS file:

   - Linus Walleij lists himself for the ARM Reference platforms:
     versatile, vexpress, integrator and realview. He has been the main
     contributor for these for a while, and makes it official now.

   - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
     Eastwood

   - Manivannan Sadhasivam becomes a secondary maintainer for the
     Actions Semi machines

   - Nicolas Ferre lists updates the MAINTAINER listing for the AT91
     platform: Ludovic Desroches is now a co-maintainer for the
     platform, and several other people (Claudiu Beznea, Cristian
     Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
     device drivers.

  Thanks everyone for working on this, and welcome to the new
  maintainers!

  The "virt" platform on qemy or kvm can now be used in big-endian mode
  without additional tricks, thanks to Jason Donenfeld.

  Once again, we gain support for another NXP i.MX6 variant, this time
  it's the i.MX 6ULZ 32-bit single-core version.

  On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
  and RZ/G2M (r8a774a1). These are described as microcontrollers on the
  manufacturer website, but appear to be rather powerful. The RZ/G2M is
  used on the reference board for the CIP Super Long Term Support (SLTS)
  Linux Kernels"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
  arm64: exynos: Enable generic power domain support
  MAINTAINERS: remove non-exsiting email address of Baoyou
  MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
  MAINTAINERS: Drop dt-bindings/genpd/k2g.h
  ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
  arm64: actions: Enable PINCTRL in platforms Kconfig
  MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
  MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
  MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
  ARM: imx: add i.mx6ulz msl support
  ARM: Assume maintainership of ARM reference designs
  ARM: support big-endian for the virt architecture
  MAINTAINERS: sdhci: move the Microchip entry to proper location
  MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
  MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
  MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
  MAINTAINERS: pwm: add entry for Microchip pwm driver
  MAINTAINERS: dmaengine: add files to Microchip dma entry
  MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
  ...
2018-10-29 15:37:33 -07:00
Linus Torvalds b22b6beae6 ARM: SoC driver updates for 4.17
The most noteworthy SoC driver changes this time include:
 
 - The TEE subsystem gains an in-kernel interface to access the TEE
   from device drivers.
 
 - The reset controller subsystem gains a driver for the Qualcomm
   Snapdragon 845 Power Domain Controller.
 
 - The Xilinx Zynq platform now has a firmware interface for its
   platform management unit. This contains a firmware "ioctl" interface
   that was a little controversial at first, but the version we merged
   solved that by not exposing arbitrary firmware calls to user space.
 
 - The Amlogic Meson platform gains a "canvas" driver that is used
   for video processing and shared between different high-level drivers.
 
 The rest is more of the usual, mostly related to SoC specific power
 management support and core drivers in drivers/soc:
 
 - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
   features related to power and reset control.
 
 - The Mediatek mt8183 and mt6765 SoC platforms gain support for
   their respective power management chips.
 
 - A new driver for NXP i.MX8, which need a firmware interface for
   power management.
 
 - The SCPI firmware interface now contains support estimating power
   usage of performance states
 
 - The NVIDIA Tegra "pmc" driver gains a few new features, in particular
   a pinctrl interface for configuring the pads.
 
 - Lots of small changes for Qualcomm, in particular the "smem"
   device driver.
 
 - Some cleanups for the TI OMAP series related to their sysc
   controller.
 
 Additional cleanups and bugfixes in SoC specific drivers include the
 Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "The most noteworthy SoC driver changes this time include:

   - The TEE subsystem gains an in-kernel interface to access the TEE
     from device drivers.

   - The reset controller subsystem gains a driver for the Qualcomm
     Snapdragon 845 Power Domain Controller.

   - The Xilinx Zynq platform now has a firmware interface for its
     platform management unit. This contains a firmware "ioctl"
     interface that was a little controversial at first, but the version
     we merged solved that by not exposing arbitrary firmware calls to
     user space.

   - The Amlogic Meson platform gains a "canvas" driver that is used for
     video processing and shared between different high-level drivers.

  The rest is more of the usual, mostly related to SoC specific power
  management support and core drivers in drivers/soc:

   - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
     features related to power and reset control.

   - The Mediatek mt8183 and mt6765 SoC platforms gain support for their
     respective power management chips.

   - A new driver for NXP i.MX8, which need a firmware interface for
     power management.

   - The SCPI firmware interface now contains support estimating power
     usage of performance states

   - The NVIDIA Tegra "pmc" driver gains a few new features, in
     particular a pinctrl interface for configuring the pads.

   - Lots of small changes for Qualcomm, in particular the "smem" device
     driver.

   - Some cleanups for the TI OMAP series related to their sysc
     controller.

  Additional cleanups and bugfixes in SoC specific drivers include the
  Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
  firmware: tegra: bpmp: Implement suspend/resume support
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs
  MAINTAINERS: imx: include drivers/firmware/imx path
  firmware: imx: add misc svc support
  firmware: imx: add SCU firmware driver support
  reset: Fix potential use-after-free in __of_reset_control_get()
  dt-bindings: arm: fsl: add scu binding doc
  soc: fsl: qbman: add interrupt coalesce changing APIs
  soc: fsl: bman_portals: defer probe after bman's probe
  soc: fsl: qbman: Use last response to determine valid bit
  soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
  soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc: fsl: qbman: Check if CPU is offline when initializing portals
  reset: qcom: PDC Global (Power Domain Controller) reset controller
  dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
  reset: Grammar s/more then once/more than once/
  bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
  ...
2018-10-29 15:16:01 -07:00
Rob Herring 5af5d40c40 ARM: shmobile: use for_each_of_cpu_node iterator
Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
has the side effect of defaulting to iterating using "cpu" node names in
preference to the deprecated (for FDT) device_type == "cpu".

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-09-28 14:25:58 -05:00
Marek Vasut 6d14d4d313 ARM: shmobile: Rework the PMIC IRQ line quirk
Rather than hard-coding the quirk topology, which stopped scaling,
parse the information from DT. The code looks for all compatible
PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
to the same pin. If so, the code sends a matching sequence to the
PMIC to deassert the IRQ.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> (on Koelsch)
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-19 11:11:46 +02:00
Biju Das bc88715362 ARM: shmobile: r8a7744: Basic SoC support
Add minimal support for the RZ/G1N (R8A7744) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:47:46 +02:00
Kuninori Morimoto e2f2594b8e ARM: shmobile: convert to SPDX identifiers
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11 15:41:30 +02:00
Rob Herring b9fad74bfe ARM: shmobile: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-30 16:36:56 +02:00
Geert Uytterhoeven 08e735233e ARM: shmobile: Remove the ARCH_SHMOBILE Kconfig symbol
All drivers for Renesas ARM SoCs have gained proper ARCH_RENESAS
platform dependencies.  Hence finish the conversion from ARCH_SHMOBILE
to ARCH_RENESAS for Renesas 32-bit ARM SoCs, as started by commit
9b5ba0df4e ("ARM: shmobile: Introduce ARCH_RENESAS").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-30 16:13:02 +02:00
Chris Brandt 332df9828e ARM: shmobile: Add basic RZ/A2 SoC support
Add the RZ/A2 SoC to the Renesas SoC collection.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:06:42 +02:00
Geert Uytterhoeven ad73cc2b91 ARM: shmobile: r8a7779: Remove unused includes
Presumable unused since commit c99cd90d98 ("ARM: shmobile:
r8a7779: Remove legacy SoC code").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:02:54 +02:00
Geert Uytterhoeven 54f464e0c9 ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
  - Remove the calls to shmobile_init_delay() from the corresponding
    machine vectors,
  - Remove a check in timer setup specific to R-Car Gen2,
  - Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20 13:44:10 +02:00
Arnd Bergmann 8fc0d470bc ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of
r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning
without CONFIG_HOTPLUG_CPU:

arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function]

This moves the function inside of that #ifdef to avoid the warning.

Fixes: 62f55ce683 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20 13:44:09 +02:00
Geert Uytterhoeven 23295aeebf ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP
As of commit cad160ed0a ("ARM: shmobile: Convert file to use
cntvoff"), there's no non-SMP code left in headsmp-apmu.S.

Hence build the file for SMP only, and drop the no longer needed check
for CONFIG_SMP inside the file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-27 17:08:52 +02:00
Wolfram Sang c44e182e53 ARM: shmobile: convert to SPDX identifier
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:29 +02:00
Geert Uytterhoeven 16acd53b15 ARM: shmobile: r8a7779: Remove explicit SYSC config and init
If the R-Car H1 system controller is described in DT, the rcar-sysc
driver configures SYSCIER and SYSCIMR based on the SoC-specific power
area definitions in r8a7779-sysc.  The platform code still passed this
information to the rcar-sysc driver, for compatibility with old DTBs
predating commit b2df3aa487 ("ARM: dts: r8a7779: Add SYSC PM
Domains") in v4.7.  The time has come to drop backwards compatibility,
and delegate everything to the DT enabled rcar-sysc driver.

After stopping powering down secondary CPUs during early boot, there is
no longer a need to force an early initialization of the rcar-sysc
driver.  It will be initialized in time for secondary CPU bringup by its
early_initcall().

Hence all explicit SYSC configuration and initialization can be removed
from the R-Car H1 platform code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:28 +02:00
Geert Uytterhoeven 9d65c89158 ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()
The r8a7779 SMP code calls rcar_sysc_power_{down,up}() to control power
to the SYSC power areas containing CPUs. This requires passing full CPU
power area parameter blocks.

Migrate the code to call the new rcar_sysc_power_{down,up}_cpu()
helpers, which just take a CPU index, and use the SYSC power area
definitions from the r8a7779-sysc driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:28 +02:00
Geert Uytterhoeven 62f55ce683 ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot
At .smp_prepare_cpus() time, CPUs 1-3 are still powered down:
  - The bootloader doesn't enable CPUs 1-3,
  - Non-boot CPUs are disabled by kexec before starting the new kernel.

Hence there is no need to try to power them down again, as it will fail
silently with -EIO anyway.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:26 +02:00