Граф коммитов

3028 Коммитов

Автор SHA1 Сообщение Дата
Konrad Dybcio 2d48e6ea30 dt-bindings: power: rpmpd: Add SM6375 power domains
Add the bindings for SM6375 RPMPDs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220716193201.455728-1-konrad.dybcio@somainline.org
2022-09-13 22:25:35 -05:00
Stephan Gerhold c40668048f dt-bindings: clock: Add schema for MSM8909 GCC
The Global Clock Controller (GCC) in the MSM8909 SoC provides clocks,
resets and power domains for the various hardware blocks in the SoC.
Add a DT schema to describe it, similar to other Qualcomm SoCs.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220706134132.3623415-2-stephan.gerhold@kernkonzept.com
2022-09-13 22:07:25 -05:00
Richard Acayan 657e932665 dt-bindings: clock: gcc-sdm845: add sdm670 global clocks
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
of the new clocks, GDSCs, and resets already have reserved IDs but there
are some resources that don't. Add the new clock from Snapdragon 670 and
document the differences between the SoC parent clocks.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
2022-09-13 21:20:33 -05:00
Taniya Das c9a406b42f dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
Support external mclk to interface external MI2S clocks for SC7280.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:57:24 -05:00
Taniya Das 42801e6185 dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:57:23 -05:00
Taniya Das 1c3f9df77a dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
Support external mclk to interface external MI2S clocks for SC7280.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:47:35 -05:00
Taniya Das be9439df23 dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.

Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
2022-09-13 09:47:35 -05:00
Vignesh Raghavendra 1607e6f928 dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A
Add pinctrl macros for AM62AX SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220901141328.899100-4-vigneshr@ti.com
2022-09-13 15:58:16 +05:30
Vignesh Raghavendra a3c5297741 dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically
Rearrange SOC specific IOPAD macros alphabetically, so that its easier
to read. No functional change intended.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220901141328.899100-2-vigneshr@ti.com
2022-09-13 15:58:05 +05:30
Arnd Bergmann 2c12f88cef Samsung DTS ARM64 changes for v6.0
1. Add binding headers for several Exynos850 and ExynosAutov9 clocks.
 2. ExynosAutov9: Add FSYS clock controller nodes.
 3. ExynosAutov9: Document serial compatible (used in DTS).
 4. Exynos850: Add Audio, IS, MFC clock controllers. Add IOMMU nodes.
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Merge tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v6.0

1. Add binding headers for several Exynos850 and ExynosAutov9 clocks.
2. ExynosAutov9: Add FSYS clock controller nodes.
3. ExynosAutov9: Document serial compatible (used in DTS).
4. Exynos850: Add Audio, IS, MFC clock controllers. Add IOMMU nodes.

* tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: serial: samsung: add exynosautov9-uart compatible
  arm64: dts: exynos: Add SysMMU nodes for Exynos850
  arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850
  arm64: dts: exynosautov9: add fsys0/1 clock DT nodes
  dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
  dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
  dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
  dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
  dt-bindings: clock: exynosautov9: add fsys1 clock definitions
  dt-bindings: clock: exynosautov9: add fys0 clock definitions
  dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1

Link: https://lore.kernel.org/r/20220909150849.820523-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-12 17:19:57 +02:00
Finley Xiao 67944950c2 dt-bindings: power: add power-domain header for rk3588
Add all the power domains listed in the RK3588 TRM.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220906143825.199089-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-09 19:01:44 +02:00
Olliver Schinagl 472d7b9e81 dt-bindings: leds: Expand LED_COLOR_ID definitions
In commit 853a78a7d6 (dt-bindings: leds: Add LED_COLOR_ID definitions,
Sun Jun 9 20:19:04 2019 +0200) the most basic color definitions where
added. However, there's a little more very common LED colors.

While the documentation states 'add what is missing', engineers tend to
be lazy and will just use what currently exists. So this patch will take
(a) list from online retailers [0], [1], [2] and use the common LED colors from
there, this being reasonable as this is what is currently available to purchase.

Note, that LIME seems to be the modern take to 'Yellow-green' or
'Yellowish-green' from some older datasheets.

[0]: https://www.digikey.com/en/products/filter/led-lighting-color/125
[1]: https://eu.mouser.com/c/optoelectronics/led-lighting/led-emitters/standard-leds-smd
[2]: https://nl.farnell.com/en-NL/c/optoelectronics-displays/led-products/standard-single-colour-leds-under-75ma

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexander Dahl <ada@thorsis.com>
Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
Link: https://lore.kernel.org/r/20220830134613.1564059-1-oliver@schinagl.nl
Signed-off-by: Rob Herring <robh@kernel.org>
2022-09-08 13:16:10 -05:00
Jagan Teki daf7dc8651 dt-bindings: power: Add power-domain header for RV1126
Add power-domain header for RV1126 SoC from description in TRM.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220818124132.125304-2-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-09-05 11:52:25 +02:00
AngeloGioacchino Del Regno 697b551e29 dt-bindings: reset: mt8195: Add resets for USB/PCIe t-phy port 1
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB
or PCI-Express PHY reset.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-2-angelogioacchino.delregno@collabora.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:16:45 -07:00
AngeloGioacchino Del Regno 7e5073a74f dt-bindings: reset: mt8195: Add resets for PCIE controllers
Add the reset index for PCIe P0 and P1 (PCIe0, PCIe1) on MT8195.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220629105205.173471-2-angelogioacchino.delregno@collabora.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-31 18:13:53 -07:00
Swapnil Jakhade 288440de9e dt-bindings: phy: Add PHY_TYPE_USXGMII definition
Add definition for USXGMII phy type.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-3-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30 10:42:57 +05:30
Neal Liu dffc3c566b dt-bindings: clock: Add AST2500/AST2600 HACE reset definition
Add HACE reset bit definition for AST2500/AST2600.

Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-08-26 18:50:38 +08:00
Hui.Liu 9f1bdd7e82 dt-bindings: pinctrl: mediatek: add support for mt8188
Add the pinctrl header file on MediaTek mt8188.
Add the new binding document for pinctrl on MediaTek mt8188.

Signed-off-by: Hui.Liu <hui.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220818075012.20880-2-hui.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-25 14:50:44 +02:00
Sam Protsenko 8f3fc0ed70 dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
CMU_MFCMSCL generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL.
Add clock indices and binding documentation for CMU_MFCMSCL.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-4-semen.protsenko@linaro.org
2022-08-23 09:12:01 +03:00
Sam Protsenko f20f35f46f dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add
clock indices and bindings documentation for CMU_IS domain.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-3-semen.protsenko@linaro.org
2022-08-23 09:11:50 +03:00
Sam Protsenko 45bbf4d76a dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
CMU_AUD generates Cortex-A32 clock, bus clock and audio clocks for
BLK_AUD. Add clock indices and binding documentation for CMU_AUD.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-2-semen.protsenko@linaro.org
2022-08-23 09:11:36 +03:00
Chanho Park 3c073243c5 dt-bindings: clock: exynosautov9: add fsys1 clock definitions
Add fsys1(for usb and mmc) clock definitions.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/debb6335cb2bcc935f7572bed25d76a85e80cfaa.1659054220.git.chanho61.park@samsung.com
2022-08-23 09:07:17 +03:00
Chanho Park 153da489e5 dt-bindings: clock: exynosautov9: add fys0 clock definitions
Add fsys0(for PCIe) clock definitions.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/6f70a59164ad2c5ce5581047ca39a91afc1105d9.1659054220.git.chanho61.park@samsung.com
2022-08-23 09:07:12 +03:00
Chanho Park b6740089b7 dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.

Fixes: 680e1c8370 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220727021357.152421-2-chanho61.park@samsung.com
2022-08-23 09:03:49 +03:00
Lukas Bulwahn ba6165bc83 dt-bindings: clock: Move versaclock.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

This was discovered while investigating the state of ownership of the
files in include/dt-bindings/ according to the MAINTAINERS file.

This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-3-lukas.bulwahn@gmail.com
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-22 16:04:01 -07:00
Lukas Bulwahn 0384759b3d dt-bindings: clock: Move lochnagar.h to dt-bindings/clock
Most of the clock-related dt-binding header files are located in
include/dt-bindings/clock. It would be good to keep all the similar
header files at a single location.

This was discovered while investigating the state of ownership of the files
in include/dt-bindings/ according to the MAINTAINERS file.

This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-2-lukas.bulwahn@gmail.com
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-08-22 16:04:00 -07:00
Krzysztof Kozlowski 9d92925768 dt-bindings: pinctrl: samsung: deprecate header with register constants
For convenience (less code duplication, some meaning added to raw
number), the pin controller pin configuration register values
were defined in the bindings header.  These are not some IDs or other
abstraction layer but raw numbers used in the registers

These constants do not fit the purpose of bindings.  They do not provide
any abstraction, any hardware and driver independent ID.  With minor
exceptions, the Linux drivers actually do not use the bindings header at
all.

All of the constants were moved already to headers local to DTS
(residing in DTS directory) and to Samsung pinctrl driver (where
applicable), so remove any references to the bindings header and add a
warning tha tit is deprecated.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220816133016.77553-3-krzysztof.kozlowski@linaro.org
2022-08-19 16:54:10 +03:00
Srinivas Kandagatla ea15d3bd3c
ASoC: qcom: qdsp6: q6prm: add new clocks
Add support to new clocks that are added in Q6DSP as part of newer version
of LPASS support on SM8450 and SC8280XP.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220816170118.13470-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-17 13:00:28 +01:00
Lad Prabhakar 80c4ece67b dt-bindings: interrupt-controller: Add macros for NMI and IRQ0-7 interrupts present on RZ/G2L SoC
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-16 09:37:01 +02:00
Claudiu Beznea cb6e097d93 dt-bindings: iio: adc: at91-sama5d2_adc: add id for temperature channel
Add ID for temperature channel of AT91 SAMA5D2 ADC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220803102855.2191070-17-claudiu.beznea@microchip.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-08-15 22:29:58 +01:00
Linus Torvalds f7cdaeeab8 power supply and reset changes for the v6.0 series
power-supply core:
  - none
 
 drivers:
  - pwr-mlxbf: new reset driver for Mellanox BlueField
  - at91-reset: SAMA7G5 support
  - ab8500: continue refurbishing
  - misc. minor fixes
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Merge tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply

Pull power supply and reset updates from Sebastian Reichel:
 "No core patches, only driver updates:

   - pwr-mlxbf: new reset driver for Mellanox BlueField

   - at91-reset: SAMA7G5 support

   - ab8500: continue refurbishing

   - misc minor fixes"

* tag 'for-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (29 commits)
  power: supply: olpc_battery: Hold the reference returned by of_find_compatible_node
  power: supply: ab8500: add missing destroy_workqueue in ab8500_charger_bind
  power: supply: ab8500: Remove flush_scheduled_work() call.
  power: supply: ab8500_fg: drop duplicated 'is' in comment
  power: supply: ab8500: Drop external charger leftovers
  power: supply: ab8500: Add MAINTAINERS entry
  dt-bindings: power: reset: qcom,pshold: convert to dtschema
  power: supply: Fix typo in power_supply_check_supplies
  power: reset: pwr-mlxbf: change rst_pwr_hid and low_pwr_hid from global to local variables
  power: reset: pwr-mlxbf: add missing include
  power: reset: at91-reset: add support for SAMA7G5
  power: reset: at91-reset: add reset_controller_dev support
  power: reset: at91-reset: add at91_reset_data
  power: reset: at91-reset: document structures and enums
  dt-bindings: reset: add sama7g5 definitions
  dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings
  dt-bindings: reset: convert Atmel/Microchip reset controller to YAML
  power: reset: pwr-mlxbf: add BlueField SoC power control driver
  power: supply: ab8500: Exit maintenance if too low voltage
  power: supply: ab8500: Respect charge_restart_voltage_uv
  ...
2022-08-12 09:37:33 -07:00
Linus Torvalds 5e2e7383b5 Pin control bulk changes for v6.0:
Core changes:
 
 - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
 
 New drivers:
 
 - Intel Meteor Lake support.
 
 - Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
 
 - AXP209 variants AXP221, AXP223 and AXP809.
 
 - Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
 
 - Allwinner D1.
 
 Improvements:
 
 - Proper pin multiplexing in the AMD driver.
 
 - Mediatek MT8192 can use generic drive strength and pin
   bias, then fixes on top plus some I2C pin group fixes.
 
 - Have the Allwinner Sunplus SP7021 use the generic DT schema and
   make interrupts optional.
 
 - Handle Qualcomm SC7280 ADSP.
 
 - Handle Qualcomm MSM8916 CAMSS GP clock muxing.
 
 - High impedance bias on ZynqMP.
 
 - Serialize StarFive access to MMIO.
 
 - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO.
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Merge tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Outside the pinctrl driver and DT bindings we hit some Arm DT files,
  patched by the maintainers.

  Other than that it is business as usual.

  Core changes:

   - Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).

  New drivers:

   - Intel Meteor Lake support.

   - Reneasas RZ/V2M and r8a779g0 (R-Car V4H).

   - AXP209 variants AXP221, AXP223 and AXP809.

   - Qualcomm MSM8909, PM8226, PMP8074 and SM6375.

   - Allwinner D1.

  Improvements:

   - Proper pin multiplexing in the AMD driver.

   - Mediatek MT8192 can use generic drive strength and pin bias, then
     fixes on top plus some I2C pin group fixes.

   - Have the Allwinner Sunplus SP7021 use the generic DT schema and
     make interrupts optional.

   - Handle Qualcomm SC7280 ADSP.

   - Handle Qualcomm MSM8916 CAMSS GP clock muxing.

   - High impedance bias on ZynqMP.

   - Serialize StarFive access to MMIO.

   - Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"

* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
  dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
  pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
  pinctrl: qcom: sm8250: Fix PDC map
  pinctrl: amd: Fix an unused variable
  dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
  dt-bindings: pinctrl: mt8186: Add gpio-line-names property
  ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
  pinctrl: amd: Use unicode for debugfs output
  pinctrl: amd: Fix newline declaration in debugfs output
  pinctrl: at91: Fix typo 'the the' in comment
  dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
  pinctrl: mvebu: Missing a blank line after declarations.
  pinctrl: qcom: Add SM6375 TLMM driver
  dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
  dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
  Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
  pinctrl: imx93: Add MODULE_DEVICE_TABLE()
  pinctrl: sunxi: Add driver for Allwinner D1
  pinctrl: sunxi: Make some layout parameters dynamic
  pinctrl: sunxi: Refactor register/offset calculation
  ...
2022-08-10 11:01:44 -07:00
Linus Torvalds 668c3c237f sound updates for 6.0-rc1
As diffstat shows, we've had lots of developments in a wide range
 at this time; the majority of changes are about ASoC, including
 subsystem-wide cleanups, continued SOF / Intel updates and a
 bunch of new drivers (as usual), while there have been some
 significant (but almost invisible) improvements in ALSA core
 side, too.  Below are some highlights:
 
 Core:
 - Faster lookups of control elements with Xarray; normal user
   won't notice, but on the devices with tons of control elements,
   it can be visibly faster
 - Support for input validation for controls; this will harden
   for badly written drivers in general with a slight overhead
 - Deferred async signal handling for working around the potential
   deadlocks
 - Cleanup / refactoring raw MIDI locking code
 
 ASoC:
 - Restructing of the set_fmt() callbacks for making things clearer
   in situations like CODEC to CODEC links
 - Clean up and modernizing the DAI naming scheme setups
 - Merge of more of the Intel AVS driver stack, including some
   board integrations
 - New version 4 mechanism for communication with SOF DSPs
 - Suppoort for dynamically selecting the PLL to use at runtime on
   i.MX platforms
 - Improvements for CODEC to CODEC support in the generic cards
 - Support for AMD Jadeite and various machines, AMD RPL, Intel
   MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
   MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
   WAS883x, and Texas Instruments TAS2780
 
 HD- and USB-audio:
 - Continued improvement for CS35L41 (sub)codec support
 - More quirks for various devices (HP, Lenovo, Dell, Clevo)
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Merge tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "As the diffstat shows, we've had lots of developments in a wide range
  at this time; the majority of changes are about ASoC, including
  subsystem-wide cleanups, continued SOF / Intel updates and a bunch of
  new drivers (as usual), while there have been some significant (but
  almost invisible) improvements in ALSA core side, too.

  Below are some highlights:

  Core:

   - Faster lookups of control elements with Xarray; normal user won't
     notice, but on the devices with tons of control elements, it can be
     visibly faster

   - Support for input validation for controls; this will harden for
     badly written drivers in general with a slight overhead

   - Deferred async signal handling for working around the potential
     deadlocks

   - Cleanup / refactoring raw MIDI locking code

  ASoC:

   - Restructing of the set_fmt() callbacks for making things clearer in
     situations like CODEC to CODEC links

   - Clean up and modernizing the DAI naming scheme setups

   - Merge of more of the Intel AVS driver stack, including some board
     integrations

   - New version 4 mechanism for communication with SOF DSPs

   - Suppoort for dynamically selecting the PLL to use at runtime on
     i.MX platforms

   - Improvements for CODEC to CODEC support in the generic cards

   - Support for AMD Jadeite and various machines, AMD RPL, Intel
     MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
     MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
     WAS883x, and Texas Instruments TAS2780

  HD- and USB-audio:

   - Continued improvement for CS35L41 (sub)codec support

   - More quirks for various devices (HP, Lenovo, Dell, Clevo)"

* tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (778 commits)
  ALSA: hda/realtek: Add quirk for HP Spectre x360 15-eb0xxx
  ALSA: line6: Replace sprintf() with sysfs_emit()
  ALSA: hda: Replace sprintf() with sysfs_emit()
  ALSA: pcm: Replace sprintf() with sysfs_emit()
  ALSA: core: Replace scnprintf() with sysfs_emit()
  ALSA: control-led: Replace sprintf() with sysfs_emit()
  ALSA: aoa: Replace sprintf() with sysfs_emit()
  ALSA: ac97: Replace sprintf() with sysfs_emit()
  ALSA: hda/realtek: Add quirk for Clevo NV45PZ
  ALSA: hda/realtek: Add quirk for Lenovo Yoga9 14IAP7
  ALSA: control: Use deferred fasync helper
  ALSA: pcm: Use deferred fasync helper
  ALSA: timer: Use deferred fasync helper
  ALSA: core: Add async signal helpers
  ASoC: q6asm: use kcalloc() instead of kzalloc()
  ACPI: scan: Add CLSA0101 Laptop Support
  ALSA: hda: cs35l41: Support CLSA0101
  ALSA: hda: cs35l41: Use the CS35L41 HDA internal define
  ASoC: dt-bindings: use spi-peripheral-props.yaml
  ASoC: codecs: va-macro: use fsgen as clock
  ...
2022-08-06 10:19:51 -07:00
Linus Torvalds 36001a2fa6 The clk core gains a new set of APIs that allow drivers to both acquire clks
and prepare and enable them at the same time. This also comes with devm support
 so that drivers can make a single call to get and prepare and enable the clk
 and have that all undone when their driver is removed. Many folks have
 requested this feature over the years, but we've had disagreements about how to
 implement it and if it was worthwhile to encourage drivers to use such an API.
 Now it's here, so let's see how it goes. I hope that by introducing this API we
 can identify drivers that would benefit from further consolidation of clk API
 usage, possibly by moving such logic to the bus layer and out of drivers
 altogether.
 
 Outside of that major API update, we have the usual collection of driver
 updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time
 around. Then we have the long tail of non-critical fixes and minor feature
 additions to various clk drivers. And finally more clk provider migration to
 struct clk_parent_data, reducing boot times in the process.
 
 Core:
  - devm helpers for clk_get() + clk_prepare() and clk_enable()
 
 New Drivers:
  - Support for the camera clock controller in Qualcomm SM8450 and
    the display and gpu clock controllers in Qualcomm SM8350
  - Add support for the Renesas RZ/Five SoC
 
 Updates:
  - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074
  - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916
    GCC driver
  - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe
    GDSCs
  - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation
  - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are
    migrated to use clk_parent_data
  - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and
    SM8250
  - Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
  - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the
    design in IPQ8074 to allow the GCC driver to probe earlier.
  - The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped,
    as the only upstream target that adapted this interface was transitioned
    several kernel versions ago
  - Qualcomm GDSCs found to be enabled at boot will now reflect in the enable
    count of the supply, as was done with the regulator supplies previously
  - Correct adc1, nic_media and edma1's parents for NXP i.MX93
  - rdiv, mfd values, the return rate in recalc_rate and add more frequencies in
    the table for fracn-gppll on i.MX
  - Remove Allwinner workaround logic/compatible in fixed factor code
  - MediaTek clk driver cleanups
  - Add reset support to more MediaTek clk drivers
  - deduplicate Allwinner ccu_clks arrays
  - Allwinner H6 GPU DFS support
  - Adjust Allwinner Kconfig to limit choice
  - Fix initconst confusion on Renesas R-Car Gen4
  - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
  - Add PFC and WDT clocks and resets on Renesas RZ/V2M
  - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
    Renesas R-Car S4-8
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The clk core gains a new set of APIs that allow drivers to both
  acquire clks and prepare and enable them at the same time. This also
  comes with devm support so that drivers can make a single call to get
  and prepare and enable the clk and have that all undone when their
  driver is removed.

  Many folks have requested this feature over the years, but we've had
  disagreements about how to implement it and if it was worthwhile to
  encourage drivers to use such an API.

  Now it's here, so let's see how it goes.

  I hope that by introducing this API we can identify drivers that would
  benefit from further consolidation of clk API usage, possibly by
  moving such logic to the bus layer and out of drivers altogether.

  Outside of that major API update, we have the usual collection of
  driver updates. A few new SoCs are supported, mostly Qualcomm and
  Renesas this time around. Then we have the long tail of non-critical
  fixes and minor feature additions to various clk drivers.

  And finally more clk provider migration to struct clk_parent_data,
  reducing boot times in the process.

  Summary:

  Core:

   - devm helpers for clk_get() + clk_prepare() and clk_enable()

  New Drivers:

   - Support for the camera clock controller in Qualcomm SM8450 and the
     display and gpu clock controllers in Qualcomm SM8350

   - Add support for the Renesas RZ/Five SoC

  Updates:

   - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
     IPQ8074

   - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
     MSM8916 GCC driver

   - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
     PCIe GDSCs

   - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
     implementation

   - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
     GCC are migrated to use clk_parent_data

   - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
     and SM8250

   - Qualcomm MSM8916 gains more possible frequencies for its GP clocks.

   - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
     the design in IPQ8074 to allow the GCC driver to probe earlier.

   - The regulator based mmcx supply for Qualcomm dispcc and videocc is
     dropped, as the only upstream target that adapted this interface
     was transitioned several kernel versions ago

   - Qualcomm GDSCs found to be enabled at boot will now reflect in the
     enable count of the supply, as was done with the regulator supplies
     previously

   - Correct adc1, nic_media and edma1's parents for NXP i.MX93

   - rdiv, mfd values, the return rate in recalc_rate and add more
     frequencies in the table for fracn-gppll on i.MX

   - Remove Allwinner workaround logic/compatible in fixed factor code

   - MediaTek clk driver cleanups

   - Add reset support to more MediaTek clk drivers

   - deduplicate Allwinner ccu_clks arrays

   - Allwinner H6 GPU DFS support

   - Adjust Allwinner Kconfig to limit choice

   - Fix initconst confusion on Renesas R-Car Gen4

   - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L

   - Add PFC and WDT clocks and resets on Renesas RZ/V2M

   - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
     Renesas R-Car S4-8"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
  clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
  clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
  clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
  clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
  clk: qcom: clk-rpm: convert to parent_data API
  dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
  clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
  clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
  clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
  clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
  clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
  clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
  clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
  clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
  clk: qcom: fix build error initializer element is not constant
  clk: sprd: Add dt-bindings include file for UMS512
  dt-bindings: clk: sprd: Add bindings for ums512 clock controller
  clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
  dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
  clk: qcom: add support for SM8350 DISPCC
  ...
2022-08-04 18:40:08 -07:00
Linus Torvalds 37644cac6e gpio: updates for v6.0-rc1
- remove gpio-vr41xx driver as the only platform using it got dropped too
 - add support for suspend/resume to gpio-davinci
 - improvements to the GPIO character device code
 - add support for disabling bias for in-kernel users (up until now
   only user-space could set it)
 - drop unused devm_gpio_free()
 - fix a refcount issue in gpiolib OF
 - use device match helpers where applicable
 - add support for a new model to gpio-rockchip
 - non-functional improvements in gpio-adp5588
 - improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
 - modernize the gpio-74xx-mmio and gpio-adnp drivers
 - coding style improvements in gpio-xilinx, gpio-104-idi-48
 - support new model (pca9571) in gpio-pca9570
 - convert the DT bindings to YAML for gpio-mvebu and update the document
 - don't return error codes from remove() in gpio-brcmstb
 - add a library for the intel 8255 PPI interface and use it in drivers
 - reduce using magic numbers and improve code readability in several drivers
 - convert DT bindings to YAML for gpio-tpic2810
 - add new models to DT bindings for gpio-frl-imx
 - Kconfig improvements
 - other minor tweaks and improvements
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Merge tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "Here are the updates for this merge window from the GPIO subsystem.

  We have more lines removed than added thanks to dropping of a driver
  for a platform that's no longer supported. Otherwise the changes are
  pretty straightforward: support for some new models, various
  improvements to existing drivers, some tweaks to the core library code
  and DT bindings updates.

  Summary:

   - remove gpio-vr41xx driver as the only platform using it got dropped
     too

   - add support for suspend/resume to gpio-davinci

   - improvements to the GPIO character device code

   - add support for disabling bias for in-kernel users (up until now
     only user-space could set it)

   - drop unused devm_gpio_free()

   - fix a refcount issue in gpiolib OF

   - use device match helpers where applicable

   - add support for a new model to gpio-rockchip

   - non-functional improvements in gpio-adp5588

   - improve and simplify teardown in gpio-twl4030 and gpio-ucb1400

   - modernize the gpio-74xx-mmio and gpio-adnp drivers

   - coding style improvements in gpio-xilinx, gpio-104-idi-48

   - support new model (pca9571) in gpio-pca9570

   - convert the DT bindings to YAML for gpio-mvebu and update the
     document

   - don't return error codes from remove() in gpio-brcmstb

   - add a library for the intel 8255 PPI interface and use it in
     drivers

   - reduce using magic numbers and improve code readability in several
     drivers

   - convert DT bindings to YAML for gpio-tpic2810

   - add new models to DT bindings for gpio-frl-imx

   - Kconfig improvements

   - other minor tweaks and improvements"

* tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (52 commits)
  dt-bindings: gpio: fsl-imx-gpio: Add i.MXRT compatibles
  gpio: 74xx-mmio: Use bits instead of plain numbers for flags
  gpio: xilinx: add missing blank line after declarations
  MAINTAINERS: Update Intel 8255 GPIO driver file list
  gpio: gpio-mm: Implement and utilize register structures
  gpio: 104-idi-48: Implement and utilize register structures
  gpio: 104-dio-48e: Implement and utilize register structures
  gpio: i8255: Introduce the Intel 8255 interface library module
  gpio: 104-idio-16: Implement and utilize register structures
  gpio: ws16c48: Implement and utilize register structures
  gpio: remove VR41XX related gpio driver
  dt-bindings: gpio: add pull-disable flag
  gpiolib: acpi: support bias pull disable
  gpiolib: of: support bias pull disable
  gpiolib: add support for bias pull disable
  gpio: 74xx-mmio: use bits.h macros for all masks
  gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()
  gpio: 74xx-mmio: Make use of device properties
  gpiolib: cdev: compile out HTE unless CONFIG_HTE selected
  gpiolib: cdev: consolidate edge detector configuration flags
  ...
2022-08-04 18:34:05 -07:00
Linus Torvalds da8d07af4b Devicetree updates for v6.0:
Bindings:
 - Add spi-peripheral-props.yaml references to various SPI device
   bindings
 
 - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
   skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm CCN
   PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and arm-firmware-suite
   bindings to DT schema format
 
 - New bindings for Arm virtual platforms display, Qualcomm IMEM memory
   region, Samsung S5PV210 ChipID, EM Microelectronic EM3027 RTC, and
   arm,cortex-a78ae
 
 - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
   quanta, and densitron
 
 - Add missing MSI and IOMMU properties to host-generic-pci
 
 - Remove bindings for removed EFM32 platform
 
 - Remove old chosen.txt binding (replaced by schema)
 
 - Treewide add missing type information for properties
 
 - Treewide fixing of typos and its vs. it's in bindings. Its all good
   now.
 
 - Drop unnecessary quoting in power related schemas
 
 - Several LED binding updates which didn't get picked up
 
 - Move various bindings to proper directories
 
 DT core code:
 - Convert unittest GPIO related tests to use fwnode
 
 - Check ima-kexec-buffer against memory bounds
 
 - Print reserved-memory allocation/reservation failures as errors
 
 - Cleanup early_init_dt_reserve_memory_arch()
 
 - Simplify of_overlay_fdt_apply() tail
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Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Add spi-peripheral-props.yaml references to various SPI device
     bindings

   - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
     skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
     CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
     arm-firmware-suite bindings to DT schema format

   - New bindings for Arm virtual platforms display, Qualcomm IMEM
     memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
     RTC, and arm,cortex-a78ae

   - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
     quanta, and densitron

   - Add missing MSI and IOMMU properties to host-generic-pci

   - Remove bindings for removed EFM32 platform

   - Remove old chosen.txt binding (replaced by schema)

   - Treewide add missing type information for properties

   - Treewide fixing of typos and its vs. it's in bindings. Its all good
     now.

   - Drop unnecessary quoting in power related schemas

   - Several LED binding updates which didn't get picked up

   - Move various bindings to proper directories

  DT core code:

   - Convert unittest GPIO related tests to use fwnode

   - Check ima-kexec-buffer against memory bounds

   - Print reserved-memory allocation/reservation failures as errors

   - Cleanup early_init_dt_reserve_memory_arch()

   - Simplify of_overlay_fdt_apply() tail"

* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
  dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
  dt-bindings: power: supply: drop quotes when not needed
  dt-bindings: power: reset: drop quotes when not needed
  dt-bindings: power: drop quotes when not needed
  dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
  of/fdt: declared return type does not match actual return type
  devicetree/bindings: correct possessive "its" typos
  dt-bindings: net: convert emac_rockchip.txt to YAML
  dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
  dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
  dt-bindings: display: use spi-peripheral-props.yaml
  dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
  dt-bindings: power: reset: qcom,pon: use absolute path to other schema
  dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
  dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
  dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
  of/fdt: Clean up early_init_dt_reserve_memory_arch()
  dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
  dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
  dt-bindings: rtc: ds1307: Convert to json-schema
  ...
2022-08-04 18:08:34 -07:00
Linus Torvalds c1c76700a0 SPDX changes for 6.0-rc1
Here is the set of SPDX comment updates for 6.0-rc1.
 
 Nothing huge here, just a number of updated SPDX license tags and
 cleanups based on the review of a number of common patterns in GPLv2
 boilerplate text.  Also included in here are a few other minor updates,
 2 USB files, and one Documentation file update to get the SPDX lines
 correct.
 
 All of these have been in the linux-next tree for a very long time.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx

Pull SPDX updates from Greg KH:
 "Here is the set of SPDX comment updates for 6.0-rc1.

  Nothing huge here, just a number of updated SPDX license tags and
  cleanups based on the review of a number of common patterns in GPLv2
  boilerplate text.

  Also included in here are a few other minor updates, two USB files,
  and one Documentation file update to get the SPDX lines correct.

  All of these have been in the linux-next tree for a very long time"

* tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits)
  Documentation: samsung-s3c24xx: Add blank line after SPDX directive
  x86/crypto: Remove stray comment terminator
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1)
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE
  treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
  ...
2022-08-04 12:12:54 -07:00
Linus Torvalds 228dfe98a3 Char / Misc driver changes for 6.0-rc1
Here is the large set of char and misc and other driver subsystem
 changes for 6.0-rc1.
 
 Highlights include:
 	- large set of IIO driver updates, additions, and cleanups
 	- new habanalabs device support added (loads of register maps
 	  much like GPUs have)
 	- soundwire driver updates
 	- phy driver updates
 	- slimbus driver updates
 	- tiny virt driver fixes and updates
 	- misc driver fixes and updates
 	- interconnect driver updates
 	- hwtracing driver updates
 	- fpga driver updates
 	- extcon driver updates
 	- firmware driver updates
 	- counter driver update
 	- mhi driver fixes and updates
 	- binder driver fixes and updates
 	- speakup driver fixes
 
 Full details are in the long shortlog contents.
 
 All of these have been in linux-next for a while without any reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the large set of char and misc and other driver subsystem
  changes for 6.0-rc1.

  Highlights include:

   - large set of IIO driver updates, additions, and cleanups

   - new habanalabs device support added (loads of register maps much
     like GPUs have)

   - soundwire driver updates

   - phy driver updates

   - slimbus driver updates

   - tiny virt driver fixes and updates

   - misc driver fixes and updates

   - interconnect driver updates

   - hwtracing driver updates

   - fpga driver updates

   - extcon driver updates

   - firmware driver updates

   - counter driver update

   - mhi driver fixes and updates

   - binder driver fixes and updates

   - speakup driver fixes

  All of these have been in linux-next for a while without any reported
  problems"

* tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (634 commits)
  drivers: lkdtm: fix clang -Wformat warning
  char: remove VR41XX related char driver
  misc: Mark MICROCODE_MINOR unused
  spmi: trace: fix stack-out-of-bound access in SPMI tracing functions
  dt-bindings: iio: adc: Add compatible for MT8188
  iio: light: isl29028: Fix the warning in isl29028_remove()
  iio: accel: sca3300: Extend the trigger buffer from 16 to 32 bytes
  iio: fix iio_format_avail_range() printing for none IIO_VAL_INT
  iio: adc: max1027: unlock on error path in max1027_read_single_value()
  iio: proximity: sx9324: add empty line in front of bullet list
  iio: magnetometer: hmc5843: Remove duplicate 'the'
  iio: magn: yas530: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: magnetometer: ak8974: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: veml6030: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: vcnl4035: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: vcnl4000: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
  iio: light: tsl2591: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
  iio: light: tsl2583: Use DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
  iio: light: isl29028: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
  iio: light: gp2ap002: Switch to DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
  ...
2022-08-04 11:05:48 -07:00
Stephen Boyd dfcbbd73dd Merge branches 'clk-renesas', 'clk-spreadtrum', 'clk-imx' and 'clk-qcom' into clk-next
* clk-renesas: (22 commits)
  clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
  clk: renesas: r9a07g043: Add support for RZ/Five SoC
  dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
  clk: renesas: r8a779f0: Add HSCIF clocks
  clk: renesas: r8a779f0: Add PCIe clocks
  clk: renesas: r8a779f0: Add Z0 and Z1 clock support
  dt-bindings: clock: renesas,rzg2l: Simplify header file references
  clk: renesas: rza1: Remove struct rz_cpg
  clk: renesas: r8a7779: Remove struct r8a7779_cpg
  clk: renesas: r8a7778: Remove struct r8a7778_cpg
  clk: renesas: sh73a0: Remove sh73a0_cpg.reg
  clk: renesas: r8a7740: Remove r8a7740_cpg.reg
  clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg
  clk: renesas: r8a779f0: Add SDHI0 clock
  clk: renesas: r8a779f0: Add thermal clock
  clk: renesas: rzg2l: Fix reset status function
  clk: renesas: r9a06g032: Fix UART clkgrp bitsel
  clk: renesas: r9a06g032: Drop some unused fields
  clk: renesas: r9a09g011: Add WDT clock and reset entries
  clk: renesas: r9a09g011: Add PFC clock and reset entries
  ...

* clk-spreadtrum:
  clk: sprd: Add dt-bindings include file for UMS512
  dt-bindings: clk: sprd: Add bindings for ums512 clock controller

* clk-imx:
  clk: imx: clk-fracn-gppll: Add more freq config for video pll
  clk: imx: clk-fracn-gppll: correct rdiv
  clk: imx: clk-fracn-gppll: Return rate in rate table properly in ->recalc_rate()
  clk: imx: clk-fracn-gppll: fix mfd value
  clk: imx93: Correct the edma1's parent clock
  clk: imx93: correct nic_media parent
  clk: imx93: use adc_root as the parent clock of adc1

* clk-qcom: (62 commits)
  clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
  clk: qcom: clk-rpm: convert to parent_data API
  dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
  clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
  clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
  clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
  clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
  clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
  clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
  clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
  clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
  clk: qcom: fix build error initializer element is not constant
  dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
  clk: qcom: add support for SM8350 DISPCC
  clk: qcom: add support for SM8350 GPUCC
  clk: qcom: add camera clock controller driver for SM8450 SoC
  clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfaces
  clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces
  clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code
  clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description
  ...
2022-08-02 12:20:33 -07:00
Linus Torvalds dd65b96492 ARM: new SoC support for 6.0
This adds initial support for two SoC families that have been under
 review for a while. In both cases, the origonal idea was to have a
 minimally functional version, but we ended up leaving out the clk drivers
 that are still under review and will be merged through the corresponding
 subsystem tree.
 
 The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
 based on the 32-bit NPCM7xx family but is now getting added to
 arch/arm64 as well.
 
 Sunplus SP7021, also known as Plus1, is a general-purpose
 System-in-Package design based on the 32-bit Cortex-A7 SoC
 on the main chip, plus an I/O chip and memory in the same
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Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM new SoC support from Arnd Bergmann:
 "This adds initial support for two SoC families that have been under
  review for a while. In both cases, the origonal idea was to have a
  minimally functional version, but we ended up leaving out the clk
  drivers that are still under review and will be merged through the
  corresponding subsystem tree.

  The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
  based on the 32-bit NPCM7xx family but is now getting added to
  arch/arm64 as well.

  Sunplus SP7021, also known as Plus1, is a general-purpose
  System-in-Package design based on the 32-bit Cortex-A7 SoC on the main
  chip, plus an I/O chip and memory in the same"

* tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE
  arm64: defconfig: Add Nuvoton NPCM family support
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add maintainer
  reset: npcm: Add NPCM8XX support
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: using syscon instead of device data
  ARM: dts: nuvoton: add reset syscon property
  dt-bindings: reset: npcm: add GCR syscon property
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-bindings: timer: npcm: Add npcm845 compatible string
  ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree
  ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig
  ARM: sunplus: Add initial support for Sunplus SP7021 SoC
  irqchip: Add Sunplus SP7021 interrupt controller driver
  ...
2022-08-02 08:29:18 -07:00
Linus Torvalds 3976d758e0 ARM: DT changes for 6.0
As usual, the bulk of the changes for the SoC tree are devicetree file
 updates, and most of these changes are for 64-bit embedded machines.
 As before, there are a ton of style cleanups, and additional hardware
 support for existing machines.
 
 Looking only at the new SoC, the notable additions are:
 
  - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
    BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
    BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813.
    Each SoC comes with a corresponding reference board.
 
  - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
    i.MX8 embedded SoCs, now using Cortex-A55 cores and the
    Ethos-U65 NPU.
 
  - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end
    of Arm based Laptop SoCs, and its automotive cousin, the
    SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s
    laptop that also gets added here in addition to the reference
    boards.
 
  - Allwinner H616, a newer version of the H6 SoC, targeted at
    Set-top-box applications. It comes with dts files for the
    Orange Pi zero2 single-board computer and the X96 Mate
    set-top-box
 
  - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip
    in the Armada SoC family based on the Cortex-A55 core.
 
 New machines based on previously supported SoCs include:
 
  - Several new machines on NXP i.MX platforms: multiple Toradex
    Colibri boards using the "Iris" and "Ixora" carriers,
    DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems
    TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM.
 
  - Google Chameleon v3 FPGA board based on Intel Arria10 and
    Stratix 10 Software Virtual platform, both in the SoCFPGA
    platform.
 
  - Two new wireless devices based on Broadcom SoCs:
    The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point
 
  - Improved Chromebook support for both the Mediatek and Qualcomm
    SoC families brought added machines: Acer Chromebook 514 (MT8192),
    Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based
    machines including the Lenovo IdeaPad Chromebook Duet 3.
 
  - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
    Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
 
  - Finally, there are a few development board on other chips:
    PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308)
    DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm
    SDM660)
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Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
 "As usual, the bulk of the changes for the SoC tree are devicetree file
  updates, and most of these changes are for 64-bit embedded machines.
  As before, there are a ton of style cleanups, and additional hardware
  support for existing machines.

  Looking only at the new SoC, the notable additions are:

   - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
     BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
     BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
     with a corresponding reference board.

   - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
     i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
     NPU.

   - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
     Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
     SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
     added here in addition to the reference boards.

   - Allwinner H616, a newer version of the H6 SoC, targeted at
     Set-top-box applications. It comes with dts files for the Orange Pi
     zero2 single-board computer and the X96 Mate set-top-box

   - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
     Armada SoC family based on the Cortex-A55 core.

  New machines based on previously supported SoCs include:

   - Several new machines on NXP i.MX platforms: multiple Toradex
     Colibri boards using the "Iris" and "Ixora" carriers, DH
     electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
     phytech phyBOARD-Polis-i.MX8MM.

   - Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
     10 Software Virtual platform, both in the SoCFPGA platform.

   - Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
     Router and the Cisco Meraki MR26 access point

   - Improved Chromebook support for both the Mediatek and Qualcomm SoC
     families brought added machines: Acer Chromebook 514 (MT8192), Acer
     Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
     including the Lenovo IdeaPad Chromebook Duet 3.

   - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
     Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.

   - Finally, there are a few development board on other chips: PCB8309
     (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
     Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"

* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
  dt-bindings: soc: bcm: use absolute path to other schema
  dt-bindings: soc: bcm: drop quotes when not needed
  dt-bindings: soc: microchip: use absolute path to other schema
  dt-bindings: soc: microchip: drop quotes when not needed
  ARM: dts: lan966x: keep lan966 entries alphabetically sorted
  ARM: dts: lan966x: add support for pcb8309
  dt-bindings: arm: at91: add lan966 pcb8309 board
  ARM: dts: lan966x: Enable network driver on pcb8291
  ARM: dts: lan966x: Disable can0 on pcb8291
  ARM: dts: lan966x: Add gpio-restart
  dt-bindings: arm: aspeed: add Aspeed Evaluation boards
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  ...
2022-08-02 08:15:25 -07:00
Arnd Bergmann 99978d2fd9 More Qualcomm driver changes for v5.20
This adds support for booting secondary cores, SPM, SMD-RPM and RPM
 power-domain support for the MSM8909 platform.
 
 It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in
 socinfo and a Kconfig build dependency for QCOM_RPMPD.
 
 Lastly it continues to clean up up the Devicetree bindings for the
 Qualcomm drivers.
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Merge tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

More Qualcomm driver changes for v5.20

This adds support for booting secondary cores, SPM, SMD-RPM and RPM
power-domain support for the MSM8909 platform.

It drops an unnecessary print in icc-bwmon, corrects SA8540P entries in
socinfo and a Kconfig build dependency for QCOM_RPMPD.

Lastly it continues to clean up up the Devicetree bindings for the
Qualcomm drivers.

* tag 'qcom-drivers-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
  dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
  dt-bindings: soc: qcom,rpmh-rsc: simplify qcom,tcs-config
  ARM: mach-qcom: Add support for MSM8909
  dt-bindings: arm: cpus: Document "qcom,msm8909-smp" enable-method
  soc: qcom: spm: Add CPU data for MSM8909
  dt-bindings: soc: qcom: spm: Add MSM8909 CPU compatible
  soc: qcom: rpmpd: Add compatible for MSM8909
  dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains
  soc: qcom: smd-rpm: Add compatible for MSM8909
  dt-bindings: soc: qcom: smd-rpm: Add MSM8909
  soc: qcom: icc-bwmon: Remove unnecessary print function dev_err()
  soc: qcom: socinfo: Fix the id of SA8540P SoC
  soc: qcom: Make QCOM_RPMPD depend on PM

Link: https://lore.kernel.org/r/20220720230648.2113609-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-21 15:00:19 +02:00
Arnd Bergmann 2d0f3f13a9 Merge branch 'nuvoton/newsoc' into arm/newsoc
Merge the new SoC support from Tomer Maimon:
 "This patchset  adds initial support for the Nuvoton
  Arbel NPCM8XX Board Management controller (BMC) SoC family.

  The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC.
  The NPCM8XX computing subsystem comprises a quadcore ARM
  Cortex A35 ARM-V8 architecture.

  This patchset adds minimal architecture and drivers such as:
  Clocksource, Clock, Reset, and WD.

  Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX.

  This patchset was tested on the Arbel NPCM8XX evaluation board."

I'm leaving out the clk controller driver, which is still under
review.

* nuvoton/newsoc:
  arm64: defconfig: Add Nuvoton NPCM family support
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add maintainer
  reset: npcm: Add NPCM8XX support
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: using syscon instead of device data
  ARM: dts: nuvoton: add reset syscon property
  dt-bindings: reset: npcm: add GCR syscon property
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-bindings: timer: npcm: Add npcm845 compatible string
2022-07-19 15:42:00 +02:00
Tomer Maimon 08e950449c dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
Add binding for the Arbel BMC NPCM8XX Clock controller.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:39:50 +02:00
Nuno Sá d042656a21 dt-bindings: gpio: add pull-disable flag
This extends the flags that can be used in GPIO specifiers to indicate
that no bias is intended in the pin.

Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-07-19 10:24:17 +02:00
Stephan Gerhold c61c6c6507 dt-bindings: power: qcom-rpmpd: Add MSM8909 power domains
MSM8909 has the same power domains as MSM8916 so just define them
as aliases for the existing definitions.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705143523.3390944-4-stephan.gerhold@kernkonzept.com
2022-07-18 18:05:07 -05:00
Greg Kroah-Hartman 6598a382bd interconnect changes for 5.20
Here are the interconnect changes for the 5.20-rc1 merge window consisting
 of two new drivers, misc driver improvements and new device managed API.
 
  Core change:
 - Add device managed bulk API
 
  Driver changes:
 - New driver for NXP i.MX8MP platforms
 - New driver for Qualcomm SM6350 platforms
 - Multiple bucket support for Qualcomm RPM-based drivers.
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Merge tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.20

Here are the interconnect changes for the 5.20-rc1 merge window consisting
of two new drivers, misc driver improvements and new device managed API.

 Core change:
- Add device managed bulk API

 Driver changes:
- New driver for NXP i.MX8MP platforms
- New driver for Qualcomm SM6350 platforms
- Multiple bucket support for Qualcomm RPM-based drivers.

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.20-rc1-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  PM / devfreq: imx: Register i.MX8MP interconnect device
  interconnect: imx: Add platform driver for imx8mp
  interconnect: imx: configure NoC mode/prioriry/ext_control
  interconnect: imx: introduce imx_icc_provider
  interconnect: imx: set src node
  interconnect: imx: fix max_node_id
  interconnect: qcom: icc-rpm: Set bandwidth and clock for bucket values
  interconnect: qcom: icc-rpm: Support multiple buckets
  interconnect: qcom: icc-rpm: Change to use qcom_icc_xlate_extended()
  interconnect: qcom: Move qcom_icc_xlate_extended() to a common file
  dt-bindings: interconnect: Update property for icc-rpm path tag
  interconnect: icc-rpm: Set destination bandwidth as well as source bandwidth
  interconnect: qcom: msm8939: Use icc_sync_state
  interconnect: add device managed bulk API
  dt-bindings: interconnect: add fsl,imx8mp.h
  dt-bindings: interconnect: imx8m: Add bindings for imx8mp noc
  interconnect: qcom: Add SM6350 driver support
  dt-bindings: interconnect: Add Qualcomm SM6350 NoC support
  dt-bindings: interconnect: qcom: Split out rpmh-common bindings
  interconnect: qcom: icc-rpmh: Support child NoC device probe
2022-07-16 07:22:21 +02:00
Georgi Djakov 33f033dc30 Merge branch 'icc-imx8mp' into icc-next
This patchset is to support i.MX8MP NoC settings, i.MX8MP NoC initial
value after power up is invalid, need set a valid value after related
power domain up.

This patchset also includes two patch[1,2] during my development to enable
the ICC feature for i.MX8MP.

I not include ddrc DVFS in this patchset, ths patchset is only to
support NoC value mode/priority/ext_control being set to a valid value
that suggested by i.MX Chip Design Team. The value is same as NXP
downstream one inside Arm Trusted Firmware:
https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/i/gpc.c?h=lf_v2.4#n97

Link: https://lore.kernel.org/r/20220703091132.1412063-1-peng.fan@oss.nxp.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-07-15 17:55:48 +03:00
Arnd Bergmann e0a5925055 Qualcomm ARM64 DTS updates for v5.20
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
 Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
 Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
 G7 ThinQ and LG V35 ThinQ.
 
 With IPQ8074 gaining GDSC support, this was expressed in the gcc node
 and defined for the USB nodes. The SDHCI reset line was defined to get
 the storage devices into a known state.
 
 For MSM8996 interconnect providers, the second DSI interface, resets for
 SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
 and the Dragonboard 820c gains definitions for its LEDs.
 
 The MSM8998 platform changes consists of a various cleanup patches, the
 FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
 on the "Yoshino" platform gains ToF sensor.
 
 On SC7180 five new Trogdor based boards are added and the description of
 keyboard and detachables is improved.
 
 On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
 clock rate is changed, WiFi is enabled and the modem firmware path is
 updated. The Villager boards gains touchscreen, and keyboard backlight.
 
 This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
 related automotive platforms are introduced, with support for the
 Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
 Automotive Development Platform.
 
 In addition to a wide range of smaller fixes on the SDM630 and SDM660
 platforms, support for the secondary high speed USB controller is
 introduced and the Sony Xperia "Nile" platform gains support for the RGB
 status LED. Support for the Inforce IFC6560 board is introduced.
 
 On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
 scale LLCC clock rate based on profiling. CPU and cluster idle states
 are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
 support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
 added.
 
 DLL/DDR configuration for SDHCI nodes are defined for SM6125.
 
 On SM8250 the GPU per-process page tables is enabled and for RB5 the
 Light Pulse Generator-based LEDs are added.
 
 The display clock controller is introduced for SM8350.
 
 On SM8450 this introduces the camera clock controller and the UART
 typically used for Bluetooth. The interconnect path for the crypto
 engine is added to the SCM node, to ensure this is adequately clocked.
 
 The assigned-clock-rate for the display processor is dropped from
 several platforms, now that the driver derrives the min and max from the
 clock.
 
 In addition to this a wide range of fixes for stylistic issues and
 issues discovered through Devicetree binding validation across many
 platforms and boards are introduced.
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Merge tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS updates for v5.20

This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.

With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.

For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.

The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.

On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.

On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.

This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.

In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.

On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.

DLL/DDR configuration for SDHCI nodes are defined for SM6125.

On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.

The display clock controller is introduced for SM8350.

On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.

The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.

In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.

* tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits)
  arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
  arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
  arm64: dts: qcom: sc7280: fix PCIe clock reference
  docs: arm: index.rst: add google/chromebook-boot-flow
  arm64: dts: qcom: msm8996: clean up PCIe PHY node
  arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
  arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
  arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8450: drop USB PHY clock index
  arm64: dts: qcom: sm8350: drop USB PHY clock index
  arm64: dts: qcom: msm8998: drop USB PHY clock index
  arm64: dts: qcom: ipq8074: drop USB PHY clock index
  arm64: dts: qcom: ipq6018: drop USB PHY clock index
  arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
  arm64: dts: qcom: sc7280: drop PCIe PHY clock index
  Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
  arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
  arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
  arm64: dts: qcom: msm8996: add missing DSI clock assignments
  ...

Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-14 17:02:12 +02:00
Arnd Bergmann f10c00ae86 memory: tegra: Changes for v5.20-rc1
Add memory client definitions for the Multi-Gigabit Ethernet (MGBE)
 controllers found on Tegra234.
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Merge tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

memory: tegra: Changes for v5.20-rc1

Add memory client definitions for the Multi-Gigabit Ethernet (MGBE)
controllers found on Tegra234.

* tag 'tegra-for-5.20-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add MGBE memory clients for Tegra234
  dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
  dt-bindings: memory: Add Tegra234 MGBE memory clients
  dt-bindings: Add Tegra234 MGBE clocks and resets
  dt-bindings: power: Add Tegra234 MGBE power domains
  dt-bindings: Add headers for Tegra234 GPCDMA

Link: https://lore.kernel.org/r/20220708185608.676474-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-12 22:53:08 +02:00
Cixi Geng 8c18fece15 clk: sprd: Add dt-bindings include file for UMS512
This file defines all UMS512 clock indexes, it should be included in the
device tree in which there's device using the clocks.

Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220505101433.1575096-4-gengcixi@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-07-11 12:59:19 -07:00
Arnd Bergmann a41bf1aabd dt-bindings: Changes for v5.20-rc1
These changes add clock, reset, memory client and power domain
 definitions for various devices found on Tegra234 along with a few
 device tree bindings for new hardware.
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Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.20-rc1

These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.

* tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: tegra-ccplex-cluster: Remove status from required properties
  dt-bindings: Add headers for Host1x and VIC on Tegra234
  dt-bindings: timer: Add Tegra186 & Tegra234 Timer
  dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
  dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
  dt-bindings: memory: Add Tegra234 MGBE memory clients
  dt-bindings: Add Tegra234 MGBE clocks and resets
  dt-bindings: power: Add Tegra234 MGBE power domains
  dt-bindings: Add headers for Tegra234 GPCDMA

Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-11 17:36:17 +02:00
Mikko Perttunen 63a6ef2360 dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 16:17:04 +02:00
Claudiu Beznea 4d5e3b06e1 dt-bindings: microchip-otpc: document Microchip OTPC
Document Microchip OTP controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220706100627.6534-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-08 15:45:04 +02:00
Qin Jian 5543604a05 dt-bindings: clock: Add bindings for SP7021 clock driver
Add documentation to describe Sunplus SP7021 clock driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 14:23:39 +02:00
Qin Jian 55bfc376b8 dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 14:23:39 +02:00
Arnd Bergmann 132582d210 Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
     development board,
   - AA1024XD12 panel overlay support for the Draak, Ebisu, and
     Salvator-X(S) development boards,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.20 (take two)

  - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
    development board,
  - AA1024XD12 panel overlay support for the Draak, Ebisu, and
    Salvator-X(S) development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
  arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
  arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
  arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
  ARM: dts: r9a06g032-rzn1d400-db: Add switch description
  dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
  ARM: dts: r9a06g032: Describe switch
  ARM: dts: r9a06g032: Describe GMAC2
  ARM: dts: r9a06g032: Describe MII converter
  arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
  ARM: dts: renesas: Fix DA9063 watchdog subnode names
  arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz

Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 13:40:19 +02:00
AngeloGioacchino Del Regno 2b48db01a0 dt-bindings: power: Add MediaTek Helio X10 MT6795 power domains
Add power domains dt-bindings for MediaTek Helio X10 (MT6795).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503141441.125852-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08 10:26:30 +02:00
Thierry Reding 833f5a7eb2 dt-bindings: memory: Add Tegra234 MGBE memory clients
Add the memory client and stream ID definitions for the MGBE hardware
found on Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding b0aedf342b dt-bindings: Add Tegra234 MGBE clocks and resets
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding 5de7d31b50 dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on
Tegra234.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Bjorn Andersson 1352b15288 Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20 2022-07-06 15:23:07 -05:00
Bjorn Andersson 8273ea8994 Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20 2022-07-06 15:22:54 -05:00
Bjorn Andersson 7e06c69221 Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into clk-for-5.20 2022-07-06 15:20:59 -05:00
Bjorn Andersson fb162534b3 Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into clk-for-5.20 2022-07-06 15:20:51 -05:00
Vladimir Zapolskiy 494e984af5 dt-bindings: clock: add QCOM SM8450 camera clock bindings
The change adds device tree bindings for camera clock controller
found on SM8450 SoC.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org
2022-07-06 15:18:32 -05:00
Jonathan Marek 909e5be2ca dt-bindings: clock: Add Qcom SM8350 DISPCC bindings
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
bindings. Update the documentation with the new compatible.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org
2022-07-06 15:15:15 -05:00
Robert Foss e67a004482 dt-bindings: clock: Add Qcom SM8350 GPUCC bindings
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8350 SoCs.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org
2022-07-06 15:15:15 -05:00
Geert Uytterhoeven ce05f30dc3 Renesas RZ/Five DT Binding Definitions
Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC,
 shared by driver and DT source files.
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Merge tag 'renesas-r9a07g043-dt-binding-defs-tag2' into HEAD

Renesas RZ/Five DT Binding Definitions

Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC,
shared by driver and DT source files.
2022-07-05 09:20:22 +02:00
Lad Prabhakar 668d361c9d dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
Renesas RZ/Five SoC has almost the same clock structure compared to the
Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just
amend the RZ/Five CPG clock and reset definitions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220622181723.13033-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05 09:15:52 +02:00
Peng Fan e2a4a0eeb0 dt-bindings: interconnect: add fsl,imx8mp.h
Add fsl,imx8mp.h for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220703091132.1412063-3-peng.fan@oss.nxp.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-07-04 16:14:22 +03:00
Bjorn Andersson 877460f6a4 Merge branch '20220515210048.483898-8-robimarko@gmail.com' into arm64-for-5.20 2022-07-02 22:17:02 -05:00
Phil Edworthy 34e3b69b1e dt-bindings: pinctrl: Add DT bindings for Renesas RZ/V2M pinctrl
Add device tree binding documentation and header file for Renesas
RZ/V2M pinctrl.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220624084833.22605-2-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-01 09:04:40 +02:00
Bjorn Andersson c87969d218 Merge branch '20220515210048.483898-8-robimarko@gmail.com' into clk-for-5.20 2022-06-30 18:24:35 -05:00
Robert Marko 74622e401e dt-bindings: clock: qcom: ipq8074: add USB GDSCs
Add bindings for the USB GDSCs found in IPQ8074 GCC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-8-robimarko@gmail.com
2022-06-30 18:23:44 -05:00
Robert Marko 90e6d29060 dt-bindings: clock: qcom: ipq8074: add PPE crypto clock
Add binding for the PPE crypto clock in IPQ8074.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-4-robimarko@gmail.com
2022-06-30 18:06:13 -05:00
Bjorn Andersson 36a7b63f06 dt-bindings: mailbox: qcom-ipcc: Add NSP1 client
Add a client for the NSP1 found in some recent Qualcomm platforms.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220629041438.1352536-3-bjorn.andersson@linaro.org
2022-06-30 08:50:00 -05:00
Bryan O'Donoghue 07e7fcf171 clk: qcom: gcc-msm8939: Add missing SYSTEM_MM_NOC_BFDCD_CLK_SRC
When adding in the indexes for this clock-controller we missed
SYSTEM_MM_NOC_BFDCD_CLK_SRC.

Add it in now.

Fixes: 4c71d6abc4 ("clk: qcom: Add DT bindings for MSM8939 GCC")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220504163835.40130-2-bryan.odonoghue@linaro.org
2022-06-29 22:47:15 -05:00
Yassine Oudjana 57b8b2113e
ASoC: dt-bindings: Add bindings for WCD9335 DAIs
Add bindings for the DAIs available in WCD9335 to avoid
having to use unclear number indices in device trees.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220622161322.168017-2-y.oudjana@protonmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-29 18:11:27 +01:00
Clément Léger 45ed13d9b4 dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
This MII converter can be found on the RZ/N1 processor family. The MII
converter ports are declared as subnodes which are then referenced by
users of the PCS driver such as the switch.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-5-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29 16:08:06 +02:00
Geert Uytterhoeven a71a62dd5e dt-bindings: pinctrl: renesas: Remove spaces before #define
Remove spaces at the beginning of lines with #defines.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/5188ef93a911ce3781b16530fdebbf0f0af462b6.1655301264.git.geert+renesas@glider.be
2022-06-29 15:21:58 +02:00
Krzysztof Kozlowski 1a4f20cab6 Merge branch 'for-v5.20/exynos7885-emmc-clk' into next/dt64 2022-06-24 09:12:47 +02:00
David Virag e756e932a3 dt-bindings: clock: Add indices for Exynos7885 TREX clocks
TREX D Core and P core clocks seem to be related to the BTS (Bus Traffic
Shaper) inside the Exynos7885 SoC, and are needed for the SoC to
function correctly.

Add indices for these clocks.

Signed-off-by: David Virag <virag.david003@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220601233743.56317-3-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-20 13:57:20 +02:00
David Virag cd268e309c dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS
CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD,
MMC_SDIO), and USB30DRD.

Add clock indices and bindings documentation for CMU_FSYS domain.

Signed-off-by: David Virag <virag.david003@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220601233743.56317-2-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-20 13:57:03 +02:00
Luca Weiss 394fb16954 dt-bindings: interconnect: Add Qualcomm SM6350 NoC support
Add bindings for Qualcomm SM6350 Network-On-Chip interconnect devices.

As SM6350 has two pairs of NoCs sharing the same reg, allow this in the
binding documentation, as was done for qcm2290.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220525144404.200390-4-luca.weiss@fairphone.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-06-20 14:27:03 +03:00
Claudiu Beznea 5994f58977 dt-bindings: reset: add sama7g5 definitions
Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2022-06-17 17:20:00 +02:00
Wolfram Sang ee774c40fa dt-bindings: efm32: remove bindings for deleted platform
Commit cc6111375c ("ARM: drop efm32 platform") removed the platform,
so no need to still carry the bindings.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220615210720.6363-1-wsa@kernel.org
2022-06-16 12:01:14 -06:00
Rex-BC Chen 5ea61b478f dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
To support reset of infra_ao, add the index of infra_ao reset of
thermal/svs for MT8186.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-18-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-06-15 17:24:25 -07:00
Rex-BC Chen fb91526b5f dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195
To support reset of infra_ao, add the index of infra_ao reset of
thermal/svs/pcei for MT8192 and thermal/svs for MT8195.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[Nícolas: Test for MT8192]
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-14-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-06-15 17:24:13 -07:00
Thomas Gleixner 5a729246e5 treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    as is without any warranty of any kind whether express or implied
    without even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:36 +02:00
Thomas Gleixner 94c0ded75c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    in the hope that it will be useful merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Thomas Gleixner 2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Akhil R 3ffb20f5c7 dt-bindings: Add headers for Tegra234 GPCDMA
Add reset and IOMMU header for Tegra234 GPCDMA

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-06-08 15:50:24 +02:00
Chanho Park 9509995155 dt-bindings: soc: add samsung,boot-mode definitions
Adds samsung,boot-mode.h header file which contains boot mode
definitions for bootloader. As for now, there are only boot mode
definitions for Exynos Auto v9 SoC.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220523121244.67341-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-06 10:33:25 +02:00
Linus Torvalds 6f9b5ed8ca Char / Misc / Other smaller driver subsystem updates for 5.19-rc1
Here is the large set of char, misc, and other driver subsystem updates
 for 5.19-rc1.  The merge request for this has been delayed as I wanted
 to get lots of linux-next testing due to some late arrivals of changes
 for the habannalabs driver.
 
 Highlights of this merge are:
 	- habanalabs driver updates for new hardware types and fixes and
 	  other updates
 	- IIO driver tree merge which includes loads of new IIO drivers
 	  and cleanups and additions
 	- PHY driver tree merge with new drivers and small updates to
 	  existing ones
 	- interconnect driver tree merge with fixes and updates
 	- soundwire driver tree merge with some small fixes
 	- coresight driver tree merge with small fixes and updates
 	- mhi bus driver tree merge with lots of updates and new device
 	  support
 	- firmware driver updates
 	- fpga driver updates
 	- lkdtm driver updates (with a merge conflict, more on that
 	  below)
 	- extcon driver tree merge with small updates
 	- lots of other tiny driver updates and fixes and cleanups, full
 	  details in the shortlog.
 
 All of these have been in linux-next for almost 2 weeks with no reported
 problems.
 
 Note, there are 3 merge conflicts when merging this with your tree:
 	- MAINTAINERS, should be easy to resolve
 	- drivers/slimbus/qcom-ctrl.c, should be straightforward
 	  resolution
 	- drivers/misc/lkdtm/stackleak.c, not an easy resolution.  This
 	  has been noted in the linux-next tree for a while, and
 	  resolved there, here's a link to the resolution that Stephen
 	  came up with and that Kees says is correct:
 	  	https://lore.kernel.org/r/20220509185344.3fe1a354@canb.auug.org.au
 
 I will be glad to provide a merge point that contains these resolutions
 if that makes things any easier for you.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc / other smaller driver subsystem updates from Greg KH:
 "Here is the large set of char, misc, and other driver subsystem
  updates for 5.19-rc1. The merge request for this has been delayed as I
  wanted to get lots of linux-next testing due to some late arrivals of
  changes for the habannalabs driver.

  Highlights of this merge are:

   - habanalabs driver updates for new hardware types and fixes and
     other updates

   - IIO driver tree merge which includes loads of new IIO drivers and
     cleanups and additions

   - PHY driver tree merge with new drivers and small updates to
     existing ones

   - interconnect driver tree merge with fixes and updates

   - soundwire driver tree merge with some small fixes

   - coresight driver tree merge with small fixes and updates

   - mhi bus driver tree merge with lots of updates and new device
     support

   - firmware driver updates

   - fpga driver updates

   - lkdtm driver updates (with a merge conflict, more on that below)

   - extcon driver tree merge with small updates

   - lots of other tiny driver updates and fixes and cleanups, full
     details in the shortlog.

  All of these have been in linux-next for almost 2 weeks with no
  reported problems"

* tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (387 commits)
  habanalabs: use separate structure info for each error collect data
  habanalabs: fix missing handle shift during mmap
  habanalabs: remove hdev from hl_ctx_get args
  habanalabs: do MMU prefetch as deferred work
  habanalabs: order memory manager messages
  habanalabs: return -EFAULT on copy_to_user error
  habanalabs: use NULL for eventfd
  habanalabs: update firmware header
  habanalabs: add support for notification via eventfd
  habanalabs: add topic to memory manager buffer
  habanalabs: handle race in driver fini
  habanalabs: add device memory scrub ability through debugfs
  habanalabs: use unified memory manager for CB flow
  habanalabs: unified memory manager new code for CB flow
  habanalabs/gaudi: set arbitration timeout to a high value
  habanalabs: add put by handle method to memory manager
  habanalabs: hide memory manager page shift
  habanalabs: Add separate poll interval value for protocol
  habanalabs: use get_task_pid() to take PID
  habanalabs: add prefetch flag to the MAP operation
  ...
2022-06-03 11:36:34 -07:00
Linus Torvalds 96752be4d7 linux-watchdog 5.19-rc1 tag
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Merge tag 'linux-watchdog-5.19-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - Add MediaTek MT8186 support

 - Add Mediatek MT7986 reset-controller support

 - Add i.MX93 support

 - Add watchdog driver for Sunplus SP7021

 - Add SC8180X and SC8280XP compatibles

 - Add Renesas RZ/N1 Watchdog driver and support for RZ/N1

 - rzg2l_wdt improvements and fixes

 - Several other improvements and fixes

* tag 'linux-watchdog-5.19-rc1' of git://www.linux-watchdog.org/linux-watchdog: (38 commits)
  watchdog: ts4800_wdt: Fix refcount leak in ts4800_wdt_probe
  dt-bindings: watchdog: renesas,wdt: R-Car V3U is R-Car Gen4
  watchdog: Add Renesas RZ/N1 Watchdog driver
  dt-bindings: watchdog: renesas,wdt: Add support for RZ/N1
  watchdog: wdat_wdt: Stop watchdog when uninstalling module
  watchdog: wdat_wdt: Stop watchdog when rebooting the system
  watchdog: wdat_wdt: Using the existing function to check parameter timeout
  dt-bindings: watchdog: da9062: add watchdog timeout mode
  dt-bindings: watchdog: renesas,wdt: Document RZ/G2UL SoC
  watchdog: iTCO_wdt: Using existing macro define covers more scenarios
  watchdog: rti-wdt: Fix pm_runtime_get_sync() error checking
  dt-bindings: watchdog: Add SC8180X and SC8280XP compatibles
  watchdog: rti_wdt: Fix calculation and evaluation of preset heartbeat
  dt-bindings: watchdog: uniphier: Use unevaluatedProperties
  watchdog: sp805: disable watchdog on remove
  watchdog: da9063: optionally disable watchdog during suspend
  dt-bindings: mfd: da9063: watchdog: add suspend disable option
  dt-bindings: watchdog: sunxi: clarify clock support
  dt-bindings: watchdog: sunxi: fix F1C100s compatible
  watchdog: Add watchdog driver for Sunplus SP7021
  ...
2022-06-01 14:05:16 -07:00
Linus Torvalds 8eca6b0a64 pwm: Changes for v5.19-rc1
Quite a large number of conversions this time around, courtesy of Uwe
 who has been working tirelessly on these. No drivers of the legacy API
 are left at this point, so as a next step the old API can be removed.
 
 Support is added for a few new devices such as the Xilinx AXI timer-
 based PWMs and the PWM IP found on Sunplus SoCs.
 
 Other than that, there's a number of fixes, cleanups and optimizations.
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Merge tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "Quite a large number of conversions this time around, courtesy of Uwe
  who has been working tirelessly on these. No drivers of the legacy API
  are left at this point, so as a next step the old API can be removed.

  Support is added for a few new devices such as the Xilinx AXI timer-
  based PWMs and the PWM IP found on Sunplus SoCs.

  Other than that, there's a number of fixes, cleanups and optimizations"

* tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (43 commits)
  pwm: pwm-cros-ec: Add channel type support
  dt-bindings: google,cros-ec-pwm: Add the new -type compatible
  dt-bindings: Add mfd/cros_ec definitions
  pwm: Document that the pinstate of a disabled PWM isn't reliable
  pwm: twl-led: Implement .apply() callback
  pwm: lpc18xx: Implement .apply() callback
  pwm: mediatek: Implement .apply() callback
  pwm: lpc32xx: Implement .apply() callback
  pwm: tegra: Implement .apply() callback
  pwm: stmpe: Implement .apply() callback
  pwm: sti: Implement .apply() callback
  pwm: pwm-mediatek: Add support for MediaTek Helio X10 MT6795
  dt-bindings: pwm: pwm-mediatek: Add documentation for MT6795 SoC
  pwm: tegra: Optimize period calculation
  pwm: renesas-tpu: Improve precision of period and duty_cycle calculation
  pwm: renesas-tpu: Improve maths to compute register settings
  pwm: renesas-tpu: Rename variables to match the usual naming
  pwm: renesas-tpu: Implement .apply() callback
  pwm: renesas-tpu: Make use of devm functions
  pwm: renesas-tpu: Make use of dev_err_probe()
  ...
2022-06-01 10:49:11 -07:00
Linus Torvalds e1cbc3b96a IOMMU Updates for Linux v5.19
Including:
 
 	- Intel VT-d driver updates
 	  - Domain force snooping improvement.
 	  - Cleanups, no intentional functional changes.
 
 	- ARM SMMU driver updates
 	  - Add new Qualcomm device-tree compatible strings
 	  - Add new Nvidia device-tree compatible string for Tegra234
 	  - Fix UAF in SMMUv3 shared virtual addressing code
 	  - Force identity-mapped domains for users of ye olde SMMU
 	    legacy binding
 	  - Minor cleanups
 
 	- Patches to fix a BUG_ON in the vfio_iommu_group_notifier
 	  - Groundwork for upcoming iommufd framework
 	  - Introduction of DMA ownership so that an entire IOMMU group
 	    is either controlled by the kernel or by user-space
 
 	- MT8195 and MT8186 support in the Mediatek IOMMU driver
 
 	- Patches to make forcing of cache-coherent DMA more coherent
 	  between IOMMU drivers
 
 	- Fixes for thunderbolt device DMA protection
 
 	- Various smaller fixes and cleanups
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Merge tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - Intel VT-d driver updates:
     - Domain force snooping improvement.
     - Cleanups, no intentional functional changes.

 - ARM SMMU driver updates:
     - Add new Qualcomm device-tree compatible strings
     - Add new Nvidia device-tree compatible string for Tegra234
     - Fix UAF in SMMUv3 shared virtual addressing code
     - Force identity-mapped domains for users of ye olde SMMU legacy
       binding
     - Minor cleanups

 - Fix a BUG_ON in the vfio_iommu_group_notifier:
     - Groundwork for upcoming iommufd framework
     - Introduction of DMA ownership so that an entire IOMMU group is
       either controlled by the kernel or by user-space

 - MT8195 and MT8186 support in the Mediatek IOMMU driver

 - Make forcing of cache-coherent DMA more coherent between IOMMU
   drivers

 - Fixes for thunderbolt device DMA protection

 - Various smaller fixes and cleanups

* tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (88 commits)
  iommu/amd: Increase timeout waiting for GA log enablement
  iommu/s390: Tolerate repeat attach_dev calls
  iommu/vt-d: Remove hard coding PGSNP bit in PASID entries
  iommu/vt-d: Remove domain_update_iommu_snooping()
  iommu/vt-d: Check domain force_snooping against attached devices
  iommu/vt-d: Block force-snoop domain attaching if no SC support
  iommu/vt-d: Size Page Request Queue to avoid overflow condition
  iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller
  iommu/vt-d: Change return type of dmar_insert_one_dev_info()
  iommu/vt-d: Remove unneeded validity check on dev
  iommu/dma: Explicitly sort PCI DMA windows
  iommu/dma: Fix iova map result check bug
  iommu/mediatek: Fix NULL pointer dereference when printing dev_name
  iommu: iommu_group_claim_dma_owner() must always assign a domain
  iommu/arm-smmu: Force identity domains for legacy binding
  iommu/arm-smmu: Support Tegra234 SMMU
  dt-bindings: arm-smmu: Add compatible for Tegra234 SOC
  dt-bindings: arm-smmu: Document nvidia,memory-controller property
  iommu/arm-smmu-qcom: Add SC8280XP support
  dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP
  ...
2022-05-31 09:56:54 -07:00
Linus Torvalds 907bb57aa7 Pin control bulk changes for the v5.19 series:
Core changes:
 
 - New helpers from Andy such as for_each_gpiochip_node() affecting both
   GPIO and pin control, improving a bunch of drivers in the process.
 
 - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started
   to apply fixups on top.
 
 New drivers:
 
 - New driver for Marvell MVEBU 98DX2530.
 
 - New driver for Mediatek MT8195.
 
 - Support Qualcomm PMX65 and PM6125.
 
 - New driver for Qualcomm SC7280 LPASS pin control.
 
 - New driver for Rockchip RK3588.
 
 - New driver for NXP Freescale i.MXRT1170.
 
 - New driver for Mediatek MT6795 Helio X10.
 
 Improvements:
 
 - Several Aspeed G6 cleanups and non-critical fixes.
 
 - Thorought refactoring of some of the ever improving Renesas drivers.
 
 - Clean up Mediatek MT8192 bindings a bit.
 
 - PWM output and clock monitoring in the Ocelot LAN966x driver.
 
 - Thorough refactoring and cleanup of the Ralink drivers such as
   RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper
   sub-drivers.
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Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pretty big this time. Mostly due to (nice) Renesas refactorings.

  Core changes:

   - New helpers from Andy such as for_each_gpiochip_node() affecting
     both GPIO and pin control, improving a bunch of drivers in the
     process.

   - Pulled in Marc Zyngiers work to make IRQ chips immutable, and
     started to apply fixups on top.

  New drivers:

   - New driver for Marvell MVEBU 98DX2530.

   - New driver for Mediatek MT8195.

   - Support Qualcomm PMX65 and PM6125.

   - New driver for Qualcomm SC7280 LPASS pin control.

   - New driver for Rockchip RK3588.

   - New driver for NXP Freescale i.MXRT1170.

   - New driver for Mediatek MT6795 Helio X10.

  Improvements:

   - Several Aspeed G6 cleanups and non-critical fixes.

   - Thorought refactoring of some of the ever improving Renesas
     drivers.

   - Clean up Mediatek MT8192 bindings a bit.

   - PWM output and clock monitoring in the Ocelot LAN966x driver.

   - Thorough refactoring and cleanup of the Ralink drivers such as
     RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
     proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
  pinctrl: apple: Use a raw spinlock for the regmap
  pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
  pinctrl: intel: Fix kernel doc format, i.e. add return sections
  dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
  pinctrl: starfive: Make the irqchip immutable
  pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
  dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
  pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
  dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
  dt-bindings: pinctrl: rockchip: increase max amount of device functions
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
  dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
  dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
  dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
  dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
  pinctrl: qcom: spmi-gpio: Add pm6125 compatible
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
  pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
  pinctrl: intel: make irq_chip immutable
  pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
  ...
2022-05-28 11:15:54 -07:00
Linus Torvalds 6b0e34a030 Mainly driver updates this time around. There's a single patch to the core clk
framework that simplifies a runtime PM call. Otherwise the majority of the diff
 falls to a few SoC drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some
 new hardware support and what comes along with that is quite a few lines of
 data and some clk_ops code. Beyond the new hardware support we have the usual
 pile of driver updates that add missing clks on already supported SoCs or fix
 up problems like bad clk tree descriptions. It's nice to see that more drivers
 are moving to clk_hw based APIs too.
 
 New Drivers:
  - Add STM32MP13 RCC driver (Reset Clock Controller)
  - MediaTek MT8186 SoC clk support
  - Airoha EN7523 SoC system clocks
  - Clock driver for exynosautov9 SoC
  - Renesas R-Car V4H and RZ/V2M SoCs
  - Renesas RZ/G2UL SoC
  - LPASS clk driver for Qualcomm sc7280 SoC
  - GCC clk driver for Qualcomm SC8280XP SoC
 
 Updates:
  - SDCC uses floor clk ops on Qualcomm MSM8976
  - Add modem reset and fix RPM clks on Qualcomm MSM8976
  - Add the two missing CLKOUT clocks for U8500/DB8500 SoC
  - Mark some clks critical on Ingenic X1000
  - Convert ux500 to clk_hw
  - Move MediaTek driver to clk_hw provider APIs
  - Use i2c driver probe_new to avoid id scans
  - Convert a number of Rockchip dt bindings to YAML
  - Mark hclk_vo critical on Rockchip rk3568
  - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
  - Various cleanups like memory allocation error checks and plugged leaks
  - Allwinner H6 RTC clock support
  - Allwinner H616 32 kHz clock support
  - Add the Universal Flash Storage clock on Renesas R-Car S4-8
  - Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
    I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas RZ/G2UL
  - Add display clock support on Renesas RZ/G2L
  - Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
  - Add 27 MHz phy PLL ref clock on i.MX
  - Add mcore_booted module parameter to tell kernel M core has already booted
    for i.MX
  - Remove snvs clock on i.MX because it was for secure world only
  - Add dt bindings for i.MX8MN GPT
  - Add DISP2 pixel clock for i.MX8MP
  - Add clkout1/2 for i.MX8MP
  - Fix parent clock of ubs_root_clk for i.MX8MP
  - Implement better RCG parking on Qualcomm SoCs using the shared RCG clk ops
  - Kerneldoc fixes
  - Switch Tegra BPMP to determine_rate clk op
  - Add a pointer to dt schema for generic clock bindings
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Mainly driver updates this time around.

  There's a single patch to the core clk framework that simplifies a
  runtime PM call. Otherwise the majority of the diff falls to a few SoC
  drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some new
  hardware support and what comes along with that is quite a few lines
  of data and some clk_ops code.

  Beyond the new hardware support we have the usual pile of driver
  updates that add missing clks on already supported SoCs or fix up
  problems like bad clk tree descriptions. It's nice to see that more
  drivers are moving to clk_hw based APIs too.

  New Drivers:
   - Add STM32MP13 RCC driver (Reset Clock Controller)
   - MediaTek MT8186 SoC clk support
   - Airoha EN7523 SoC system clocks
   - Clock driver for exynosautov9 SoC
   - Renesas R-Car V4H and RZ/V2M SoCs
   - Renesas RZ/G2UL SoC
   - LPASS clk driver for Qualcomm sc7280 SoC
   - GCC clk driver for Qualcomm SC8280XP SoC

  Updates:
   - SDCC uses floor clk ops on Qualcomm MSM8976
   - Add modem reset and fix RPM clks on Qualcomm MSM8976
   - Add the two missing CLKOUT clocks for U8500/DB8500 SoC
   - Mark some clks critical on Ingenic X1000
   - Convert ux500 to clk_hw
   - Move MediaTek driver to clk_hw provider APIs
   - Use i2c driver probe_new to avoid id scans
   - Convert a number of Rockchip dt bindings to YAML
   - Mark hclk_vo critical on Rockchip rk3568
   - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
   - Various cleanups like memory allocation error checks and plugged
     leaks
   - Allwinner H6 RTC clock support
   - Allwinner H616 32 kHz clock support
   - Add the Universal Flash Storage clock on Renesas R-Car S4-8
   - Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi
     I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas
     RZ/G2UL
   - Add display clock support on Renesas RZ/G2L
   - Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3
   - Add 27 MHz phy PLL ref clock on i.MX
   - Add mcore_booted module parameter to tell kernel M core has already
     booted for i.MX
   - Remove snvs clock on i.MX because it was for secure world only
   - Add dt bindings for i.MX8MN GPT
   - Add DISP2 pixel clock for i.MX8MP
   - Add clkout1/2 for i.MX8MP
   - Fix parent clock of ubs_root_clk for i.MX8MP
   - Implement better RCG parking on Qualcomm SoCs using the shared RCG
     clk ops
   - Kerneldoc fixes
   - Switch Tegra BPMP to determine_rate clk op
   - Add a pointer to dt schema for generic clock bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (168 commits)
  Revert "clk: qcom: regmap-mux: add pipe clk implementation"
  Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks"
  clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc()
  clk: stm32mp13: add safe mux management
  clk: stm32mp13: add multi mux function
  clk: stm32mp13: add all STM32MP13 kernel clocks
  clk: stm32mp13: add all STM32MP13 peripheral clocks
  clk: stm32mp13: manage secured clocks
  clk: stm32mp13: add composite clock
  clk: stm32mp13: add stm32 divider clock
  clk: stm32mp13: add stm32_gate management
  clk: stm32mp13: add stm32_mux clock management
  clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)
  dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
  clk: ti: clkctrl: replace usage of found with dedicated list iterator variable
  clk: ti: composite: Prefer kcalloc over open coded arithmetic
  dt-bindings: clock: exynosautov9: correct count of NR_CLK
  clk: mediatek: mt8173: Switch to clk_hw provider APIs
  clk: mediatek: Switch to clk_hw provider APIs
  ...
2022-05-27 15:33:24 -07:00