2 Коммитов

Автор	SHA1	Сообщение	Дата
Paul Mundt	88253e8459	sh: Zero out aliases counter when using SH-X3 hardware assistance. ... This zeroes out the number of cache aliases in the cache info descriptors when hardware alias avoidance is enabled. This cuts down on the amount of flushing taken care of by common code, and also permits coherency control to be disabled for the single CPU and 4k page size case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>	2010-04-20 15:37:23 +09:00
Paul Mundt	3cf6fa1e33	sh: Enable SH-X3 hardware synonym avoidance handling. ... This enables support for the hardware synonym avoidance handling on SH-X3 CPUs for the case where dcache aliases are possible. icache handling is retained, but we flip on broadcasting of the block invalidations due to the lack of coherency otherwise on SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>	2010-04-19 17:27:17 +09:00