The integrated assembler of Clang 10 and earlier do not allow to access
the VFP registers through the coprocessor load/store instructions:
<instantiation>:4:6: error: invalid operand for instruction
LDC p11, cr0, [r10],#32*4 @ FLDMIAD r10!, {d0-d15}
^
This has been addressed with Clang 11 [0]. However, to support earlier
versions of Clang and for better readability use of VFP assembler
mnemonics still is preferred.
Replace the coprocessor load/store instructions with explicit assembler
mnemonics to accessing the floating point coprocessor registers. Use
assembler directives to select the appropriate FPU version.
This allows to build these macros with GNU assembler as well as with
Clang's built-in assembler.
[0] https://reviews.llvm.org/D59733
Link: https://github.com/ClangBuiltLinux/linux/issues/905
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Explicit FPU selection has been introduced in commit 1a6be26d5b
("[ARM] Enable VFP to be built when non-VFP capable CPUs are selected")
to make use of assembler mnemonics for VFP instructions.
However, clang currently does not support passing assembler flags
like this and errors out with:
clang-10: error: the clang compiler does not support '-Wa,-mfpu=softvfp+vfp'
Make use of the .fpu assembler directives to select the floating point
hardware selectively. Also use the new unified assembler language
mnemonics. This allows to build these procedures with Clang.
Link: https://github.com/ClangBuiltLinux/linux/issues/762
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The act_mm assembly macro is actually partly reimplementing
get_thread_info so let's just use that.
Suggested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use the standard obj-y form to specify the sub-directories under
arch/arm/. No functional change intended.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Commit
84e6ffb2c4 ("arm: add support for folded p4d page tables")
updated create_mapping_late() to take folded P4Ds into account when
creating mappings, but inverted the p4d_alloc() failure test, resulting
in no mapping to be created at all.
When the EFI rtc driver subsequently tries to invoke the EFI GetTime()
service, the memory regions covering the EFI data structures are missing
from the page tables, resulting in a crash like
Unable to handle kernel paging request at virtual address 5ae0cf28
pgd = (ptrval)
[5ae0cf28] *pgd=80000040205003, *pmd=00000000
Internal error: Oops: 207 [#1] SMP THUMB2
Modules linked in:
CPU: 0 PID: 7 Comm: kworker/u32:0 Not tainted 5.7.0+ #92
Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015
Workqueue: efi_rts_wq efi_call_rts
PC is at efi_call_rts+0x94/0x294
LR is at efi_call_rts+0x83/0x294
pc : [<c0b4f098>] lr : [<c0b4f087>] psr: 30000033
sp : e6219ef0 ip : 00000000 fp : ffffe000
r10: 00000000 r9 : 00000000 r8 : 30000013
r7 : e6201dd0 r6 : e6201ddc r5 : 00000000 r4 : c181f264
r3 : 5ae0cf10 r2 : 00000001 r1 : e6201dd0 r0 : e6201ddc
Flags: nzCV IRQs on FIQs on Mode SVC_32 ISA Thumb Segment none
Control: 70c5383d Table: 661cc840 DAC: 00000001
Process kworker/u32:0 (pid: 7, stack limit = 0x(ptrval))
...
[<c0b4f098>] (efi_call_rts) from [<c0448219>] (process_one_work+0x16d/0x3d8)
[<c0448219>] (process_one_work) from [<c0448581>] (worker_thread+0xfd/0x408)
[<c0448581>] (worker_thread) from [<c044ca7b>] (kthread+0x103/0x104)
...
Fixes: 84e6ffb2c4 ("arm: add support for folded p4d page tables")
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
__vdso_*() should be removed and fallback used if CNTCVT is not
available by cntvct_functional(). __vdso_clock_gettime64 when added
previous commit is using the incorrect CNTCVT value in that state.
__vdso_clock_gettime64 is also added to remove it's symbol.
Cc: stable@vger.kernel.org
Fixes: 74d06efb9c ("ARM: 8932/1: Add clock_gettime64 entry point")
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Robin Murphy <robin.mruphy@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Unprivileged memory accesses generated by the so-called "translated"
instructions (e.g. LDRT) in kernel mode can cause user watchpoints to fire
unexpectedly. In such cases, the hw_breakpoint logic will invoke the user
overflow handler which will typically raise a SIGTRAP back to the current
task. This is futile when returning back to the kernel because (a) the
signal won't have been delivered and (b) userspace can't handle the thing
anyway.
Avoid invoking the user overflow handler for watchpoints triggered by
kernel uaccess routines, and instead single-step over the faulting
instruction as we would if no overflow handler had been installed.
Cc: <stable@vger.kernel.org>
Fixes: f81ef4a920 ("ARM: 6356/1: hw-breakpoint: add ARM backend for the hw-breakpoint framework")
Reported-by: Luis Machado <luis.machado@linaro.org>
Tested-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
[nsekhar@ti.com: drop obsolete hawkboard.org URL completeley
fixup subject line prefix]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The OMAP1 OHCI driver is using the legacy GPIO API to grab some
random GPIO lines. One is from the TPS65010 chip and used for
power, another one is for overcurrent and while the driver picks
this line it doesn't watch it at all.
Convert the driver and the OMAP1 OSK board file to pass these
two GPIOs as machine described GPIO descriptors.
I noticed the overcurrent GPIO line is not really used in the
code so dropped in a little comment for other developers.
Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200720135524.100374-2-linus.walleij@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian
Blue, drop the inclusion of <asm/barrier.h> in 'asm-generic/rwonce.h'.
This requires fixups to some architecture vdso headers which were
previously relying on 'asm/barrier.h' coming in via 'linux/compiler.h'.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>
Now that USB OTG driver supports usb role switch by overriding PHY input
signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx.
dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in
SoC device tree.
USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided
by STUSB1600 Type-C controller driver.
This patch depends on "Add STUSB160x Type-C port controller support"
series, which is under review.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins
are not in BANK Z.
Fixes: 498a701498 ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on:
- Arduino connector
- GPIO expansion connector
Keep it disabled by default, so the pins are kept in their initial state to
lower power consumption. This way they can also be used as GPIO.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected
to Bluetooth component. usart2 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and
stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector.
uart7 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to
GPIO Expansion connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1
and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion
connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins
configurations in stm32mp15-pinctrl.
- usart2_pins_c pins are connected to Bluetooth chip on dk2 board.
- usart3_pins_b pins are connected to GPIO expansion connector on evx board.
- usart3_pins_c pins are connected to GPIO expansion connector on dkx board.
- uart7_pins_c pins are connected to Arduino Uno connector on dkx board.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Use tabs where possible and remove multiple blanks lines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
add all the new drivers merged recently.
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Merge tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig
A bunch of patches to generally make sunxi_defconfig more helpful and
add all the new drivers merged recently.
* tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: configs: sunxi: Enable crypto related options
ARM: sunxi: configs: Enable the Mailbox driver
ARM: configs: sunxi: Enable the PS/2 controller
ARM: configs: sunxi: Enable Lima
ARM: configs: sunxi: Add DRM output-related options
ARM: configs: sunxi: Enable ASoC options
ARM: configs: sunxi: Enable Cedrus
ARM: configs: sunxi: Enable the deinterlace and rotation engines
ARM: configs: sunxi: Enable the CSI drivers
ARM: configs: sunxi: Run savedefconfig
Link: https://lore.kernel.org/r/c74e64c9-f1f2-40ee-b4cd-c1430d32cf8d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enables a few new configuration options that are useful on the new Nexus
7 and Acer A500 devices, as well as the userspace CPU frequency governor
that's mainly used for testing.
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Merge tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig
ARM: tegra: Default configuration changes for v5.9-rc1
Enables a few new configuration options that are useful on the new Nexus
7 and Acer A500 devices, as well as the userspace CPU frequency governor
that's mainly used for testing.
* tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500
ARM: tegra: Enable CPUFREQ userspace governor
Link: https://lore.kernel.org/r/20200717161300.1661002-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Bananapi M2+ uses a GPIO line to change the effective resistance of
the CPU supply regulator's feedback resistor network. The voltages
described in the device tree were given directly by the vendor. This
turns out to be slightly off compared to the real values.
The updated voltages are based on calculations of the feedback resistor
network, and verified down to three decimal places with a multi-meter.
Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Fixes: 6eeb4180d4 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
Since commit bcf3440c6d ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY"), networking is broken on sama5d3 xplained.
The device tree has phy-mode = "rgmii" and this worked before, because
KSZ9031 PHY started with default RGMII internal delays configuration (TX
off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the
KSZ9031 PHY starts handling phy mode properly and disables RX delay, as
result networking is become broken.
Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous
behavior.
Fixes: bcf3440c6d ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200717233644.841080-1-alexandre.belloni@bootlin.com
Commit 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the
values correct for Exynos5422 Odroids") changed the parameters of the
OPPs for the FSYS bus. Besides the frequency adjustments, it also removed
the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS
busses.
This revealed that in fact the FSYS bus frequency scaling never worked.
When one OPP table is marked as 'opp-shared', only the first bus which
selects the OPP sets the rate of its clock. Then OPP core assumes that
the other busses have been changed to that OPP and no change to their
clock rates are needed. Thus when FSYS_APB bus, which was registered
first, set the rate for its clock, the OPP core did not change the FSYS
bus clock later.
The mentioned commit removed that behavior, what introduced a regression
on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes
instability of the USB host operation, what can be observed as network
hangs. To restore old behavior, simply disable frequency scaling for the
FSYS bus.
Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com>
Fixes: 1019fe2c72 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
GPIOP7 is used in the Rainier design to manage the state of a
microcontroller elsewhere in the system but its ball, Y23, is the
driver of the heartbeat LED on the ast2600-evb and the SoC defaults Y23
at power-on to the pulse-train behaviour used to drive the LED. This
causes much confusion for the micro in the Rainier system, so hog the
line as early as possible.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The hub FSI master can access the cfams on two other processors. Reflect
this by adding a second cfam to the first hub description.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Tested-by: Andrew Geissler <geissonator@yahoo.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Rainier uses GPIO B6 as the checkstop GPIO. Define the line-name
so that this GPIO can be found by name.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The attention handler will monitor the checkstop gpio via the character
device interface so it needs to not be defined.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the PCI-E root complex reset, correct the pcie-device property, and
add the Aspeed SCU interrupt controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Correct the pcie-device property, and add the Aspeed SCU interrupt
controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
because of which when card is inserted, usb otg is enumerated
and the card is never detected.
[ 64.492645] cfg80211: failed to load regulatory.db
[ 64.492657] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[ 76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
[ 76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 2
[ 76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[ 76.396650] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.08
[ 76.405412] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 76.412763] usb usb2: Product: EHCI Host Controller
[ 76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618 ehci_hcd
[ 76.424623] usb usb2: SerialNumber: ci_hdrc.0
[ 76.431755] hub 2-0:1.0: USB hub found
[ 76.435862] hub 2-0:1.0: 1 port detected
The TRM mentions GPIO_1 pad should be muxed/assigned for card detect
and ENET_RX_ER pad for USB_OTG_ID for proper operation.
This patch fixes pin muxing as per TRM and is tested on a
i.Core 1.5 MX6 DL SOM.
[ 22.449165] mmc0: host does not support reading read-only switch, assuming write-enable
[ 22.459992] mmc0: new high speed SDHC card at address 0001
[ 22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
[ 22.478856] mmcblk0: p1 p2
Fixes: 6df11287f7 ("ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8035 datasheet:
"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Avoid the overhead of the dma ops support for tiny builds that only
use the direct mapping.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
Currently the first field is used to set the page 2, but this is
pointless. The usage is not correct, and we are setting the wrong
registers.
Fix it.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Make use of for_each_requested_gpio() instead of home grown analogue.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Connect the voltage regulator of vbus to the otg connector.
Depending on the current mode this is enabled (in "host" mode")
or disabled (in "peripheral" mode). The regulator must be updated
if the controller is configured in "otg" mode and the status changes
between "host" and "peripheral".
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-8-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.
Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.
So, move the supply regulators into carrier board dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.
So, move them into SOM dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200713065859.31770-1-grandmaster@al2klimov.de
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have
a corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.
Fixes: d2e4679055 ("ARM: at91: pm: use the mmio-sram pool to access SRAM")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
This time there are a number of actual code fixes, plus
a small set of device tree issues getting addressed:
- Renesas:
- one defconfig cleanup to allow a later Kconfig change
- Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
- TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
- NXP i.MX
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
- Amlogic Meson
- misc DT fixes
- SoC ID fixes to detect all chips correctly
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master
Pull ARM SoC fixes from Arnd Bergmann:
"This time there are a number of actual code fixes, plus a small set of
device tree issues getting addressed:
Renesas:
- one defconfig cleanup to allow a later Kconfig change
Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target
module driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
NXP i.MX:
- A couple of fixes on i.MX platform device registration code to
stop the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
Amlogic Meson:
- misc DT fixes
- SoC ID fixes to detect all chips correctly"
* tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
arm64: dts: stratix10: increase QSPI reg address in nand dts file
arm64: dts: stratix10: add status to qspi dts node
arm64: dts: agilex: add status to qspi dts node
ARM: dts: Fix dcan driver probe failed on am437x platform
ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
bus: ti-sysc: Do not disable on suspend for no-idle
bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
arm64: dts: meson: add missing gxl rng clock
soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
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Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a functionally trivial patch which removes the word
'blacklist' (and variations) from this code and replaces it
with 'quirklist'
It has no other effect.
Link: https://lore.kernel.org/r/20200715024755.967904-1-paul@mawsonlakes.org
Signed-off-by: Paul Schulz <paul@mawsonlakes.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
We refactored the CrOS EC drivers moving part of the code from the MFD
subsystem to the platform chrome subsystem. During this change we needed
to rename some config options, so, update the defconfigs accordingly.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
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Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
ARM: dts: omap5: Add aliases for rproc nodes
ARM: dts: omap5: Add DSP and IPU nodes
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
ARM: dts: omap4: Add aliases for rproc nodes
ARM: dts: omap4: Add IPU DT node
ARM: dts: omap4: Update the DSP node
ARM: dts: omap5: Add timer_sys_ck clocks for timers
ARM: dts: omap4: Add timer_sys_ck clocks for timers
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
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Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just one commit to use https for the external links.
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Merge tag 'omap-for-v5.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SoC changes for omaps for v5.9 merge window
Just one commit to use https for the external links.
* tag 'omap-for-v5.9/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Replace HTTP links with HTTPS ones
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Few fixes for issues noticed during testing:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
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Merge tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.8-rc cycle
Few fixes for issues noticed during testing:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
* tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix dcan driver probe failed on am437x platform
ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
bus: ti-sysc: Do not disable on suspend for no-idle
bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
Link: https://lore.kernel.org/r/pull-1594840100-132735@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
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Merge tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.8, round 2:
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
* tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
Link: https://lore.kernel.org/r/20200714145649.GP15718@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using uninitialized_var() is dangerous as it papers over real bugs[1]
(or can in the future), and suppresses unrelated compiler warnings
(e.g. "unused variable"). If the compiler thinks it is uninitialized,
either simply initialize the variable or make compiler changes.
In preparation for removing[2] the[3] macro[4], remove all remaining
needless uses with the following script:
git grep '\buninitialized_var\b' | cut -d: -f1 | sort -u | \
xargs perl -pi -e \
's/\buninitialized_var\(([^\)]+)\)/\1/g;
s:\s*/\* (GCC be quiet|to make compiler happy) \*/$::g;'
drivers/video/fbdev/riva/riva_hw.c was manually tweaked to avoid
pathological white-space.
No outstanding warnings were found building allmodconfig with GCC 9.3.0
for x86_64, i386, arm64, arm, powerpc, powerpc64le, s390x, mips, sparc64,
alpha, and m68k.
[1] https://lore.kernel.org/lkml/20200603174714.192027-1-glider@google.com/
[2] https://lore.kernel.org/lkml/CA+55aFw+Vbj0i=1TGqCR5vQkCzWJ0QxK6CernOU6eedsudAixw@mail.gmail.com/
[3] https://lore.kernel.org/lkml/CA+55aFwgbgqhbp1fkxvRKEpzyR5J8n1vKT1VZdz9knmPuXhOeg@mail.gmail.com/
[4] https://lore.kernel.org/lkml/CA+55aFz2500WfbKXAx8s67wrm9=yVJu65TpLgN_ybYNv0VEOKA@mail.gmail.com/
Reviewed-by: Leon Romanovsky <leonro@mellanox.com> # drivers/infiniband and mlx4/mlx5
Acked-by: Jason Gunthorpe <jgg@mellanox.com> # IB
Acked-by: Kalle Valo <kvalo@codeaurora.org> # wireless drivers
Reviewed-by: Chao Yu <yuchao0@huawei.com> # erofs
Signed-off-by: Kees Cook <keescook@chromium.org>
Enable several very useful options and drivers for hardware that is found
on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may
require firmware files extracted from original Android image.
Link: https://github.com/grate-driver/linux-firmware
Link: https://github.com/grate-driver/alsa-ucm-conf
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device:
1. WiFi-only (named Grouper)
2. GSM (named Tilapia)
3. Using Maxim PMIC (E1565 board ID)
4. Using Ti PMIC (PM269 board ID)
This patch adds device-trees for known and tested variants.
Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by: Pedro Ângelo <pangelo@void.io>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Zack Pearsall <zpearsall@yahoo.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix dtschema validator warnings like:
l2-cache@fffff000: $nodename:0:
'l2-cache@fffff000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Fixes: 475dc86d08 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra30 has a DSI controller, although it is never used on any of the
devices supported by the upstream Linux kernel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.
Signed-off-by: Thierry Reding <treding@nvidia.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Got following d_can probe errors with kernel 5.8-rc1 on am437x
[ 10.730822] CAN device driver interface
Starting Wait for Network to be Configured...
[ OK ] Reached target Network.
[ 10.787363] c_can_platform 481cc000.can: probe failed
[ 10.792484] c_can_platform: probe of 481cc000.can failed with error -2
[ 10.799457] c_can_platform 481d0000.can: probe failed
[ 10.804617] c_can_platform: probe of 481d0000.can failed with error -2
actually, Tony has fixed this issue on am335x with the patch [3]
Since am437x has the same clock structure with am335x
[1][2], so reuse the code from Tony Lindgren's patch [3] to fix it.
[1]: https://www.ti.com/lit/pdf/spruh73 Chapter-23, Figure 23-1. DCAN
Integration
[2]: https://www.ti.com/lit/pdf/spruhl7 Chapter-25, Figure 25-1. DCAN
Integration
[3]: commit 516f1117d0 ("ARM: dts: Configure osc clock for d_can on
am335x")
Fixes: 1a5cd7c23c ("bus: ti-sysc: Enable all clocks directly during init to read revision")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
[tony@atomide.com: aligned commit message a bit for readability]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix memory leak in omap_hwmod_allocate_module not freeing in
handling error path.
Fixes: 8c87970543b17("ARM: OMAP2+: Add functions to allocate module data from device tree")
Signed-off-by: Chen Tao <chentao107@huawei.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: fix call iounmap for missing regs]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the CPUFREQ userspace governor in the tegra_defconfig so that
we can test CPUFREQ with the userspace governor with this configuration
on 32-bit Tegra devices.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Pull input fixes from Dmitry Torokhov:
"A few quirks for the Elan touchpad driver, another Thinkpad is being
switched over from PS/2 to native RMI4 interface, and we gave a brand
new SW_MACHINE_COVER switch definition"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: elan_i2c - add more hardware ID for Lenovo laptops
Input: i8042 - add Lenovo XiaoXin Air 12 to i8042 nomux list
Revert "Input: elants_i2c - report resolution information for touch major"
Input: elan_i2c - only increment wakeup count on touch
Input: synaptics - enable InterTouch for ThinkPad X1E 1st gen
ARM: dts: n900: remove mmc1 card detect gpio
Input: add `SW_MACHINE_COVER`
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).
On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
The Meson8m2 SoCs has introduced additional reset lines for the VPU
compared to Meson8. Also it uses a slightly different VPU clock
frequency compared to Meson8 since it can now achieve 364MHz thanks to
the addition of the GP_PLL.
Add the reset lines, VPU clock configuration and update the compatible
string so the implementation differences can be managed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-3-martin.blumenstingl@googlemail.com
The Meson8 SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-2-martin.blumenstingl@googlemail.com
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M3 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.
The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.
These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.
The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.
The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The commit d41e530409 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The commit 1c7de9f27a ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.
This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.
The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].
This is the AM335x pin control register format in Table 9-60 [1]:
bit attribute value
----------------------------------
31-7 reserved 0 on reset
6 slew { 0: fast, 1: slow }
5 rx_active { 0: rx disable, 1: rx enabled }
4 pu_typesel { 0: pulldown select, 1: pullup select }
3 puden { 0: pud enable, 1: disabled }
2 mode 3 bits to selec mode 0 to 7
1 mode
0 mode
The values for the bias pinconf properties are derived as follows:
pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 1 0 x x x | 0x10
enabled x 1 0 x x x | 0x10
disabled x 0 0 x x x | 0x00
mask x 1 1 x x x | 0x18
pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 0 0 x x x | 0x00
enabled x 0 0 x x x | 0x00
disabled x 1 0 x x x | 0x10
mask x 1 1 x x x | 0x18
[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This converts the two Freescale i.MX SPI drivers
Freescale i.MX (CONFIG_SPI_IMX) and Freescale i.MX LPSPI
(CONFIG_SPI_FSL_LPSPI) to use GPIO descriptors handled in
the SPI core for GPIO chip selects whether defined in
the device tree or a board file.
The reason why both are converted at the same time is
that they were both using the same platform data and
platform device population helpers when using
board files intertwining the code so this gives a cleaner
cut.
The platform device creation was passing a platform data
container from each boardfile down to the driver using
struct spi_imx_master from <linux/platform_data/spi-imx.h>,
but this was only conveying the number of chipselects and
an int * array of the chipselect GPIO numbers.
The imx27 and imx31 platforms had code passing the
now-unused platform data when creating the platform devices,
this has been repurposed to pass around GPIO descriptor
tables. The platform data struct that was just passing an
array of integers and number of chip selects for the GPIO
lines has been removed.
The number of chipselects used to be passed from the board
file, because this number also limits the number of native
chipselects that the platform can use. To deal with this we
just augment the i.MX (CONFIG_SPI_IMX) driver to support 3
chipselects if the platform does not define "num-cs" as a
device property (such as from the device tree). This covers
all the legacy boards as these use <= 3 native chip selects
(or GPIO lines, and in that case the number of chip selects
is determined by the core from the number of available
GPIO lines). Any new boards should use device tree, so
this is a reasonable simplification to cover all old
boards.
The LPSPI driver never assigned the number of chipselects
and thus always fall back to the core default of 1 chip
select if no GPIOs are defined in the device tree.
The Freescale i.MX driver was already partly utilizing
the SPI core to obtain the GPIO numbers from the device tree,
so this completes the transtion to let the core handle all
of it.
All board files and the core i.MX boardfile registration
code is augmented to account for these changes.
This has been compile-tested with the imx_v4_v5_defconfig
and the imx_v6_v7_defconfig.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Trent Piepho <tpiepho@impinj.com>
Cc: Clark Wang <xiaoning.wang@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Link: https://lore.kernel.org/r/20200625200252.207614-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
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Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
ARM: dts: BCM5301X: Specify switch ports for Luxul devices
ARM: dts: bcm2711: Add HDMI DVP
ARM: dts: bcm2711: Add firmware clocks node
Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
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Merge tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-pocketbeagle: add gpio-line-names
ARM: dts: am335x-boneblack: add gpio-line-names
ARM: dts: am33xx-l4: add gpio-ranges
ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
ARM: dts: am: Align L2 cache-controller nodename with dtschema
ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
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Merge tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: simplify support-card node structure
ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
ARM: dts: uniphier: Rename ethphy node to ethernet-phy
ARM: dts: uniphier: give fixed port number to support card serial
ARM: dts: uniphier: rename support card serial node to fix schema warning
ARM: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for the MYiR imx6ULL based single board computer
equipped with on board 256MB NAND & RAM. The board also
provides expansion header for expansion board, but this
commit adds only support for SBC.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is not necessary without a pinctrl-0 statement. Remove this
orphan.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.
This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SFF soldered onto the board expect the ports to use 1000BaseX. It
makes no sense to have the ports set to SGMII, since they don't even
support that mode.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SFF soldered onto the board expects the port to use 1000BaseX. It
makes no sense to have the port set to SGMII, since it doesn't even
support that mode.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Protonic RVT is an internal development platform for a wireless ISObus
Virtual Terminal based on COTS tablets, and the predecessor of the WD2
platform.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch
touchscreen display.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the Protonic WD2 board, which is an internal development
platform for low-cost agricultural Virtual Terminals based on COTS tablets
and web applications.
It inherits from the PRTI6Q base class.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Protonic PRTI6Q is a development board and a base class for different
specific customer application boards based on the i.MX6 family of SoCs,
developed by Protonic Holland.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix dtschema validator warnings like:
l2-cache@a02000: $nodename:0:
'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix dtschema validator warnings like:
l2-cache@40006000: $nodename:0:
'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add MQS support. As the pin conflict with usdhc2, then need
to add a separate dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use kernel LED interface for the alarm LEDs.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In imx6sll.dtsi, the ssi node name is different with other
platforms (imx6qdl, imx6sl, imx6sx), but the
sound/soc/fsl/fsl-asoc-card.c machine driver needs to check
ssi node name for audmux configuration, then different ssi
node name causes issue on imx6sll platform.
So we change ssi node name to make all platforms have same
name.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to
be compliant with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant
with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change IIM node name from iim to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change OCOTP node name from ocotp to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse.
To use the TMR_FIPER register to generate desired periodic
pulses. The value should programmed is,
desired_period - tclk_period
Current tmr-fiper2 value is to generate 100us periodic pulses.
(But the value should have been 99995, not 99990. The tclk_period is 5.)
This patch is to generate 1 second periodic pulses with value
999999995 programmed which is more desired by user.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW
perspective, so it should be a child node of anatop.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
When building the kernel with W=1 the build system complains of:
drivers/mmc/host/omap.c:854:6: warning: no previous prototype for ‘omap_mmc_notify_cover_event’ [-Wmissing-prototypes]
854 | void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
If we move the prototype into a shared headerfile the build system
will be satisfied. Rather than create a whole new headerfile just
for this purpose, it makes sense to use the already existing
mmc-omap.h.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-mmc@vger.kernel.org
Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20200701102317.235032-1-lee.jones@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
i.MX8MM is built with AArch64 hardware, this is to support
it could run in Aarch32 mode with clock and pinctrl driver enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
No callers of imx_add_imx_dma() need an error IRQ, so they supply 0 as
"irq_err", which means we register a resource of IRQ 0, which is invalid
and causes a warning if used.
Remove the "irq_err" argument altogether so there's no chance of trying to
use the invalid IRQ 0.
Fixes: a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is invalid")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: kernel@pengutronix.de
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is
invalid"), the kernel is a bit touchy when it encounters interrupt 0.
As a result, there are lots of warnings such as the following when booting
systems such as 'kzm'.
WARNING: CPU: 0 PID: 1 at drivers/base/platform.c:224 platform_get_irq_optional+0x118/0x128
0 is an invalid IRQ number
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3 #1
Hardware name: Kyoto Microcomputer Co., Ltd. KZM-ARM11-01
[<c01127d4>] (unwind_backtrace) from [<c010c620>] (show_stack+0x10/0x14)
[<c010c620>] (show_stack) from [<c06f5f54>] (dump_stack+0xe8/0x120)
[<c06f5f54>] (dump_stack) from [<c0128878>] (__warn+0xe4/0x108)
[<c0128878>] (__warn) from [<c0128910>] (warn_slowpath_fmt+0x74/0xbc)
[<c0128910>] (warn_slowpath_fmt) from [<c08b8e84>] (platform_get_irq_optional+0x118/0x128)
[<c08b8e84>] (platform_get_irq_optional) from [<c08b8eb4>] (platform_irq_count+0x20/0x3c)
[<c08b8eb4>] (platform_irq_count) from [<c0728660>] (mxc_gpio_probe+0x8c/0x494)
[<c0728660>] (mxc_gpio_probe) from [<c08b93cc>] (platform_drv_probe+0x48/0x98)
[<c08b93cc>] (platform_drv_probe) from [<c08b703c>] (really_probe+0x214/0x344)
[<c08b703c>] (really_probe) from [<c08b7274>] (driver_probe_device+0x58/0xb4)
[<c08b7274>] (driver_probe_device) from [<c08b7478>] (device_driver_attach+0x58/0x60)
[<c08b7478>] (device_driver_attach) from [<c08b7504>] (__driver_attach+0x84/0xc0)
[<c08b7504>] (__driver_attach) from [<c08b50f8>] (bus_for_each_dev+0x78/0xb8)
[<c08b50f8>] (bus_for_each_dev) from [<c08b62cc>] (bus_add_driver+0x154/0x1e0)
[<c08b62cc>] (bus_add_driver) from [<c08b82b8>] (driver_register+0x74/0x108)
[<c08b82b8>] (driver_register) from [<c0102320>] (do_one_initcall+0x80/0x3b4)
[<c0102320>] (do_one_initcall) from [<c1501008>] (kernel_init_freeable+0x170/0x208)
[<c1501008>] (kernel_init_freeable) from [<c0e178d4>] (kernel_init+0x8/0x11c)
[<c0e178d4>] (kernel_init) from [<c0100134>] (ret_from_fork+0x14/0x20)
As it turns out, mxc_register_gpio() is a bit lax when setting the
number of resources: it registers a resource with interrupt 0 when in
reality there is no such interrupt. Fix the problem by not declaring
the second interrupt resource if there is no second interrupt.
Fixes: a85a6c86c2 ("driver core: platform: Clarify that IRQ 0 is invalid")
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The audio codec on the GW551x routes to ssi1. It fixes audio capture on
the device.
Cc: stable@vger.kernel.org
Fixes: 3117e851ce ("ARM: dts: imx: Add TDA19971 HDMI Receiver to GW551x")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to use <asm/percpu.h> in irqflags.h, we need to make sure
asm/percpu.h does not itself depend on irqflags.h.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lkml.kernel.org/r/20200623083721.454517573@infradead.org
This device hierarchy is needlessly complex.
Remove the support-card node level, and move the ethernet and serial
nodes right under the system-bus node.
This also fixes the following warning from 'make ARCH=arm dtbs_check':
support-card@1,1f00000: $nodename:0: 'support-card@1,1f00000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This adds PCIe endpoint controller and PHY nodes for Pro5 SoC,
and also adds pinctrl node for PCIe.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Of the two versions of GHASH that the ARM driver implements, only one
performs aggregation, and so the other one has no use for the powers
of H to be precomputed, or space to be allocated for them in the key
struct. So make the context size dependent on which version is being
selected, and while at it, use a static key to carry this decision,
and get rid of the function pointer.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This converts the s3c24xx LED driver to use GPIO descriptors
and also modify all board files to account for these changes
by registering the appropriate GPIO tables for each board.
The driver was using a custom flag to indicate open drain
(tristate) but this can be handled by standard descriptor
machine tables.
The driver was setting non-pull-up for the pin using the custom
S3C24xx GPIO API, but this is a custom pin control system used
by the S3C24xx and no generic GPIO function, so this has simply
been pushed back into the respective board files.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
I realize that we fairly recently raised it to 4.8, but the fact is, 4.9
is a much better minimum version to target.
We have a number of workarounds for actual bugs in pre-4.9 gcc versions
(including things like internal compiler errors on ARM), but we also
have some syntactic workarounds for lacking features.
In particular, raising the minimum to 4.9 means that we can now just
assume _Generic() exists, which is likely the much better replacement
for a lot of very convoluted built-time magic with conditionals on
sizeof and/or __builtin_choose_expr() with same_type() etc.
Using _Generic also means that you will need to have a very recent
version of 'sparse', but thats easy to build yourself, and much less of
a hassle than some old gcc version can be.
The latest (in a long string) of reasons for minimum compiler version
upgrades was commit 5435f73d5c ("efi/x86: Fix build with gcc 4").
Ard points out that RHEL 7 uses gcc-4.8, but the people who stay back on
old RHEL versions persumably also don't build their own kernels anyway.
And maybe they should cross-built or just have a little side affair with
a newer compiler?
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
As per 'struct mfd_cell ab8500_devs[]' there are not 1, but 3 PWM
devices on the AB8500. Until now, each of them have referenced
the same Device Tree node. This change ensures each device has
their own.
Due to recent `dtc` checks [0], nodes cannot share the same node
name, so we are forced to rename the affected nodes by appending
their associated numeric 'bank ID'.
[0] ste-ab8500.dtsi:210.16-214.7: ERROR (duplicate_node_names):
/soc/prcmu@80157000/ab8500/ab8500-pwm: Duplicate node name
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200622083432.1491715-1-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Adds support for the back and menu keys on golden.
Signed-off-by: Nick Reitemeyer <nick.reitemeyer@web.de>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200621193822.133683-2-nick.reitemeyer@web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mailbox found on the A31 and later SoCs have recently gained some
support in Linux. Since it's going to be useful for crust, let's enable it
in our defconfig.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200706132323.147562-2-maxime@cerno.tech
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
'make ARCH=arm dtbs_check' emits the following warning:
uart@b0000: $nodename:0: 'uart@b0000' does not match '^serial(@[0-9a-f,]+)*$'
Rename the node to follow the pattern defined in
Documentation/devicetree/bindings/serial/serial.yaml
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
Since then, 'make ARCH=arm dtbs_check' is so noisy because the
required property 'interrupts' is missing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Remove the regulators node and define fixed regulators directly under
the root node. This makes SMDK5420 board consistent with other Exynos
boards.
Name the fixed regulator nodes consistently.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos5250 Arndale board consistent with
other Exynos boards.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos4412 Origen board consistent with other
Exynos boards.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:
amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
- The first one based on the enhancements made to clk-raspberrypi, which
is now registered trough DT and provides control over the whole range
of firmware based clocks.
- The second one based on the new clk-bcm2711-dvp driver, which gates
the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
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Merge tag 'tags/bcm2835-dt-next-2020-07-06' into devicetree/next
Maxime Ripard introduces two new clock providers into RPi4's device tree:
- The first one based on the enhancements made to clk-raspberrypi, which
is now registered trough DT and provides control over the whole range
of firmware based clocks.
- The second one based on the new clk-bcm2711-dvp driver, which gates
the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Fix dtschema validator warnings like:
l2-cache@22000: $nodename:0:
'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
All those devices use standard BCM53011 (rev 5) or BCM53012 (rev 0).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Some Makefiles already pass -fno-stack-protector unconditionally.
For example, arch/arm64/kernel/vdso/Makefile, arch/x86/xen/Makefile.
No problem report so far about hard-coding this option. So, we can
assume all supported compilers know -fno-stack-protector.
GCC 4.8 and Clang support this option (https://godbolt.org/z/_HDGzN)
Get rid of cc-option from -fno-stack-protector.
Remove CONFIG_CC_HAS_STACKPROTECTOR_NONE, which is always 'y'.
Note:
arch/mips/vdso/Makefile adds -fno-stack-protector twice, first
unconditionally, and second conditionally. I removed the second one.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
infrastucture instead of device_create_file which eliminates the need
for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
direct __ATTR
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Merge tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
SoC attributes update for v5.9
1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
infrastucture instead of device_create_file which eliminates the need
for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
direct __ATTR
* tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: smccc: Add ARCH_SOC_ID support
ARM: OMAP2: Use custom soc attribute group instead of device_create_file
ARM: OMAP2: Switch to use DEVICE_ATTR_RO()
soc: ux500: Use custom soc attribute group instead of device_create_file
soc: ux500: Switch to use DEVICE_ATTR_RO()
soc: integrator: Use custom soc attribute group instead of device_create_file
soc: integrator: Switch to use DEVICE_ATTR_RO()
soc: realview: Use custom soc attribute group instead of device_create_file
soc: realview: Switch to use DEVICE_ATTR_RO()
Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Increase support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven board (G21D), and its camera expansion board,
- IPMMU support for R-Car M3-W+,
- Support for Rev.3.0/4.0 of the HopeRun HiHope RZ/G2M and RZ/G2N
boards,
- Minor fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9
- Increase support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven board (G21D), and its camera expansion board,
- IPMMU support for R-Car M3-W+,
- Support for Rev.3.0/4.0 of the HopeRun HiHope RZ/G2M and RZ/G2N
boards,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (36 commits)
ARM: dts: r8a7778: Enable IRLM setup via DT
arm64: dts: renesas: Add HiHope RZ/G2N Rev2.0/3.0/4.0 board with idk-1110wr display
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 sub board support
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 board with idk-1110wr display
arm64: dts: renesas: hihope-rzg2-ex: Separate out lvds specific nodes into common file
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 sub board support
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2M[N] Rev.3.0/4.0 specific into common file
arm64: dts: renesas: hihope-common: Separate out Rev.2.0 specific into hihope-rev2.dtsi file
arm64: dts: renesas: r8a774b1-hihope-rzg2n[-ex]: Rename HiHope RZ/G2N boards
arm64: dts: renesas: r8a774a1-hihope-rzg2m[-ex/-ex-idk-1110wr]: Rename HiHope RZ/G2M boards
arm64: dts: renesas: r8a77961: Add IPMMU nodes
ARM: dts: r8a7742: Add MSIOF[0123] support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add device tree for camera DB
ARM: dts: r8a7742: Add CMT SoC specific support
ARM: dts: r8a7742: Add thermal device to DT
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742: Add audio support
...
Link: https://lore.kernel.org/r/20200703120642.5128-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Refresh shmobile_defconfig for v5.8-rc1
- Enable additional support for Renesas platforms to
shmobile_defconfig, multi_v7_defconfig, and the arm64 defconfig.
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Merge tag 'renesas-arm-defconfig-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v5.9
- Refresh shmobile_defconfig for v5.8-rc1
- Enable additional support for Renesas platforms to
shmobile_defconfig, multi_v7_defconfig, and the arm64 defconfig.
* tag 'renesas-arm-defconfig-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable additional support for Renesas platforms
ARM: multi_v7_defconfig: Enable additional support for Renesas platforms
ARM: shmobile: defconfig: Enable RZ/A1H RTC support
ARM: shmobile: defconfig: Enable ADV7612 CEC support
ARM: shmobile: defconfig: Enable RZ/A1 CEU support
ARM: shmobile: defconfig: Enable RZ/A watchdog support
ARM: shmobile: defconfig: Enable CAT9554 support
ARM: shmobile: defconfig: Enable DA9063 ONKEY support
ARM: shmobile: defconfig: Refresh for v5.8-rc1
Link: https://lore.kernel.org/r/20200703120642.5128-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Stefan Agner
Linus Walleij
Masahiro Yamada
Ard Biesheuvel
Jaedon Shin
Will Deacon
Alexander A. Klimov
Amelie Delaunay
Benjamin Gaignard
Patrick Delaunay
Fabrice Gasnier
Erwan Le Ray
Arnd Bergmann
Chen-Yu Tsai
Alexandre Belloni
Marek Szyprowski
Joel Stanley
Andrew Jeffery
Eddie James
Ben Tyner
Michael Trimarchi
Chris Healy
Fabio Estevam
Tim Harvey
Christoph Hellwig
Dinh Nguyen
Daniel González Cabanelas
Andy Shevchenko
Jagan Teki
Sugar Zhang
yu kuai
Linus Torvalds
Paul Schulz
Geert Uytterhoeven
Niklas Söderlund
Yoshihiro Shimoda
Enric Balletbo i Serra
Krzysztof Kozlowski
Kees Cook
Dmitry Osipenko
Thierry Reding
Tony Lindgren
dillon min
Chen Tao
Jon Hunter
Martin Blumenstingl
Suman Anna
Drew Fustini
Parthiban Nallathambi
Philippe Schenker
Uwe Kleine-König
Andrew Lunn
Andrey Smirnov
Richard Zhu
Oleksij Rempel
Shengjiu Wang
Biwen Li
Ian Ray
Anson Huang
Yangbo Lu
Lee Jones
Peng Fan
Bjorn Helgaas
Guenter Roeck
Peter Zijlstra
Masahiro Yamada
Kunihiko Hayashi
Nick Reitemeyer
Maxime Ripard
Florian Fainelli
Rafał Miłecki