Граф коммитов

796659 Коммитов

Автор SHA1 Сообщение Дата
Amber Lin 5b87245faf drm/amdkfd: Simplify kfd2kgd interface
After amdkfd module is merged into amdgpu, KFD can call amdgpu directly
and no longer needs to use the function pointer. Replace those function
pointers with functions if they are not ASIC dependent.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:07 -05:00
Yong Zhao 1728801409 drm/amdkfd: Use functions from amdgpu for setting up page table base
Use the functions from amdgpu to avoid directly programming registers in
amdgpu_amdkfd_gfx_v9.c.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:06 -05:00
Yong Zhao c7ff7be62b drm/amdgpu: Expose *_setup_vm_pt_regs for kfd to use
kfd has the same need to set the VM page table base register, so expose
them for kfd to use for better maintainability.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:06 -05:00
Yong Zhao f4f859408c drm/amdkfd: Delete unnecessary register settings
Those register settings have been performed in amdgpu initialization
gfxhub_v1_0_setup_vmid_config() and mmhub_v1_0_setup_vmid_config().
So no need to do it again in kfd.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:05 -05:00
Marek Olšák 17e4bd6cb8 drm/amdgpu: increase the size of HQD EOP buffers
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:04 -05:00
Marek Olšák b44da694a7 drm/amdgpu: put HQD EOP buffers into VRAM
This increases performance of compute queues.
EOP events (PKT3_RELEASE_MEM) are stored into these buffers.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:04 -05:00
Christian König 898c2cb5d9 drm/amdgpu: use scheduler fault instead of reset work
Signal a fault to the scheduler on an illegal instruction or register
access violation instead of kicking of the reset handler directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:03 -05:00
Christian König 2c498d1dbe drm/amdgpu: remove illegal instruction stub from si_dma.c
Was never used.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:02 -05:00
Christian König 8fe159b014 drm/sched: add drm_sched_fault
Add a helper to immediately start timeout handling in case of a hardware
fault.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:02 -05:00
Christian König 19067e522d drm/sched: make sure timer is restarted
Make sure we always restart the timer after a timeout and remove the
device specific workarounds.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:01 -05:00
John Clements 548f2ecc33 drm/amdgpu: Revised PSP comments
Revised comments in PSP SOS/Sysdriver loading sequence

Signed-off-by: John Clements <clements.jm@gmail.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:00 -05:00
Philip Yang efcf063f8d drm/amdgpu: fix sdma v4 ring is disabled accidently
For sdma v4, there is bug caused by
commit d4e869b6b5d6 ("drm/amdgpu: add ring test for page queue")'

local variable ring is reused and changed, so amdgpu_ttm_set_buffer_funcs_status(adev, true)
is skipped accidently. As a result, amdgpu_fill_buffer() will fail, kernel message:

[drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.260444] [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.260627] [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.290119] [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.290370] [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.319971] [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off.
[   25.320486] amdgpu 0000:19:00.0: [mmhub] VMC page fault (src_id:0 ring:154 vmid:8 pasid:32768, for process  pid 0 thread  pid 0)
[   25.320533] amdgpu 0000:19:00.0:   in page starting at address 0x0000000000000000 from 18
[   25.320563] amdgpu 0000:19:00.0: VM_L2_PROTECTION_FAULT_STATUS:0x00800134

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:00 -05:00
Huang Rui d7f625e91b drm/amdgpu: add ring test for page queue
We add page queue for sdma to update page table. So here it also needs ring test
to verify it workable during the initialization.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:59 -05:00
Evan Quan f783160c27 drm/amdgpu: disable SDMA page queue on Vega20
Since we see driver loading failure on Vega20. Keep it
disabled until it's ready.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:58 -05:00
Alex Deucher 2a85e816cc drm/amdgpu/sdma4: APUs do not have a page queue
Don't use the paging queue on APUs.

Tested-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:58 -05:00
Christian König 161d0711b9 drm/amdgpu: use paging queue for VM page table updates
Only for testing, not sure if we should keep it like this.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:57 -05:00
Christian König bb97ab42ac drm/amdgpu: activate paging queue on SDMA v4
Implement all the necessary stuff to get those extra rings working.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:56 -05:00
Christian König d425e7d8de drm/amdgpu: add some [WR]REG32_SDMA macros to sdma_v4_0.c
Significantly shortens the code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:56 -05:00
Christian König 998d3fd4f8 drm/amdgpu: remove SRIOV specific handling from sdma_v4_0_gfx_resume
Just use the same code path for both SRIOV and bare metal.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:55 -05:00
Christian König 09f0b4ffd4 drm/amdgpu: remove non gfx specific handling from sdma_v4_0_gfx_resume
Needed to start using the paging queue.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:54 -05:00
Christian König 9194a33903 drm/amdgpu: add basics for SDMA page queue support
Just the common helper and a new ring in the SDMA instance.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:54 -05:00
Christian König 51235849d9 drm/amdgpu: fix sdma v4 startup under SRIOV
Under SRIOV we were enabling the ring buffer before it was initialized.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:53 -05:00
Thomas Zimmermann 105f20706f drm/ttm: Provide ttm_bo_global_{init/release}() for struct ttm_bo_global
So far, struct ttm_bo_global_ref was the only way of initializing a struct
ttm_bo_global. Providing separate initializer and release functions for
struct ttm_bo_global gives drivers the option of implementing their own
init and release callbacks for drm_global_references of type
DRM_GLOBAL_TTM_BO.

The original functions for initializing and releasing via struct
ttm_bo_global_ref are wrappers around the new interfaces.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:52 -05:00
Thomas Zimmermann e55a5c9b5f drm/ttm: Rename ttm_bo_global_{init,release}() to ttm_bo_global_ref_{,}()
The functions ttm_bo_global_init() and ttm_bo_global_release() do not
receive an argument of type struct ttm_bo_global. Both take a struct
drm_global_reference that contains points to a struct ttm_bo_global_ref.
Renaming them reflects this.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:52 -05:00
SivapiriyanKumarasamy d76e393f4c drm/amd/display: Fix incorrect end slope of EETF
Force the E2 to dc_fixpt_one when E1 exceeds that value. This is the
correct thing to do to avoid corruption.

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:51 -05:00
Bhawanpreet Lakha fa44604cca drm/amd/display: rename cstate_pstate_watermarks_st1
cstate_pstate_watermarks_st1 -> cstate_pstate_watermarks_st

Signed-off-by: vikrant mhaske <vikrant.mhaske@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:50 -05:00
Bhawanpreet Lakha 9f4f9fddc0 drm/amd/display: explicit uint64_t casting
explicitly cast uint64_t in div64_u64_rem()

Signed-off-by: vikrant mhaske <vikrant.mhaske@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:50 -05:00
SivapiriyanKumarasamy 649e34acb4 drm/amd/display: dc 3.2.02
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:49 -05:00
Dmytro Laktyushkin ea2e8d923e drm/amd/display: add dccg block
This adds the hw block as well as hooks up dppclk dto
programming

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:48 -05:00
Dmytro Laktyushkin 84e7fc05a9 drm/amd/display: rename dccg to clk_mgr
In preparation for adding the actual dccg block since the
current implementation of dccg is mor eof a clock manager
than a hw block

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:48 -05:00
Fatemeh Darbehani 98e90a34cc drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part2
[Why]
In DCN we want direct DAL to SMU calls, with as little as possible
interference by pplib. The reason for each pp_smu interface mapping to
1 SMU message is so we can have the sequencing of different SMU message
in dal and shared across different OS. This will also simplify
debugging as DAL owns this interaction and there's no confusion about
division of ownership.

[How]
Part 2: Separate set_min_deep_sleep_dcfclk message from the SMU
messages that are sent as part of dm_pp_apply_clock_for_voltage_request.
Directly notify min dcfclk to smu

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:47 -05:00
Fatemeh Darbehani 247d167e57 drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part1
[Why]
In DCN we want direct DAL to SMU calls, with as little as possible
interference by pplib. The reason for each pp_smu interface mapping
to 1 SMU message is so we can have the sequencing of different SMU
message in dal and shared across different OS. This will also simplify
debugging as DAL owns this interaction and there's no confusion about
division of ownership.

[How]
Part 1: Separate set_min_deep_Sleep_dcfclk message from the SMU
messages that are sent as part of dcn10_pplib_apply_display_requirements.
Notify deep sleep dcfclk to smu directly

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:46 -05:00
Eric Bernstein 9ea59d5ab7 drm/amd/display: Add link encoder dp_ycbcr420_supported feature flag
[Why]
Need separate feature flag for DP 4:2:0 support, since existing
flag is used for HDMI

[How]
Added dp_ycbcr420_supported to struct encoder_feature_support

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:46 -05:00
Eric Yang e2bf20073e drm/amd/display: fix report display count logic
[Why]
Previous logic to update display count in commit_planes_do_stream_update
doesn't cover all cases.

[How]
Update display count as part of clock updates. Count virtual stream
as active to work around headless situation.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:45 -05:00
Nevenko Stupar 560a77f5f4 drm/amd/display: expose hwseq functions and add registers
Make these functions non static and define registers for future use

	is_lower_pipe_tree_visible();
	is_upper_pipe_tree_visible();
	is_pipe_tree_visible();
	dcn10_program_pte_vm();
	set_hdr_multiplier();
	update_dchubp_dpp()
	find_top_pipe_for_stream()

Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:44 -05:00
David Francis ce8a805ae1 drm/amd/display: initialize dc_transfer_func->ctx
[Why]
dc_transfer_func structs were being passed around with a null
pointer, waiting for unsuspecting programmers to dereference it.

[How]
Initialize it

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:44 -05:00
SivapiriyanKumarasamy e1e8a020c6 drm/amd/display: Add support for Freesync 2 HDR and Content to Display Mapping
[Why]
Freesync 2 HDR and support for HDR content
outside the range of the HDR display
require implementation on Dal 3 to better match
Dal2.

[How]
Add support for Freesync HDR and mapping
of source content to display ranges for better
representation of HDR content.

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:43 -05:00
Dmytro Laktyushkin 4c5e8b5415 drm/amd/display: split dccg clock manager into asic folders
Currently dccg contains code related to every dcn revision in
a single file.

This change splits out the dcn parts of code into correct folders

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:42 -05:00
Dmytro Laktyushkin 4244381cd1 drm/amd/display: clean up base dccg struct
Move things not accessed outside dccg block into dce specific
struct

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:42 -05:00
Harmanprit Tatla de801062bf drm/amd/display: Freesync does not engage on some displays
[Why]
Current render margin time is not sufficient to compute exit frame
time for most monitors.

[How]
Declared  render margin in FPS to compute a exit frame rate that is
4 FPS above the minimum FPS required to engage FreeSync.
 Also did code clean-up to remove redundancies.

Signed-off-by: Harmanprit Tatla <htatla@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:41 -05:00
Dmytro Laktyushkin 9566b67586 drm/amd/display: remove safe_to_lower flag from dc, use 2 functions instead
This is done to keep things more readable, avoids a true/false flag
in dc interface layer.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:40 -05:00
Dmytro Laktyushkin 24f7dd7ea9 drm/amd/display: move pplib/smu notification to dccg block
This is done to clear up the clock programming sequence
since the only time we need to notify pplib is after
clock update.

This also renames the clk block to dccg, at the moment
this block contains both clock management and dccg
functionality.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:40 -05:00
Dmytro Laktyushkin 72942b3de8 drm/amd/display: handle max_vstartup larger than vblank_end
When vstartup is larger than vblank end we need to set v_fp2
to allow for this early start

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:39 -05:00
Fatemeh Darbehani 09dea6bfb1 drm/amd/display: dc 3.2.01
Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Steven Chiu <Steven.Chiu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:38 -05:00
Frank.Min c3bce35c66 drm/amdgpu: fix sdma doorbell comments typo
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:38 -05:00
Gustavo A. R. Silva 657f600397 drm/radeon/r300: Mark expected switch fall-throughs
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.

Notice that in this particular case, I replaced "Pass through." with
"Fall through.", which is what GCC is expecting to find.

Addresses-Coverity-ID: 114734 ("Missing break in switch")
Addresses-Coverity-ID: 114735 ("Missing break in switch")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:37 -05:00
Gustavo A. R. Silva fa2549800c drm/radeon/r420: mark expected switch fall-through
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.

Addresses-Coverity-ID: 1357317 ("Missing break in switch")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:36 -05:00
zhong jiang 6dfeb11a4b drm/amdkfd: Use kmemdup instead of duplicating its function
kmemdup has implemented the function that kmalloc() + memcpy().
We prefer to kmemdup rather than code opened implementation.

Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:20:36 -05:00
Linus Torvalds 651022382c Linux 4.20-rc1 2018-11-04 15:37:52 -08:00
Linus Torvalds 42bd06e93d This pull request contains updates for UBIFS:
- Full filesystem authentication feature,
   UBIFS is now able to have the whole filesystem structure
   authenticated plus user data encrypted and authenticated.
 - Minor cleanups
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Merge tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs

Pull UBIFS updates from Richard Weinberger:

 - Full filesystem authentication feature, UBIFS is now able to have the
   whole filesystem structure authenticated plus user data encrypted and
   authenticated.

 - Minor cleanups

* tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs: (26 commits)
  ubifs: Remove unneeded semicolon
  Documentation: ubifs: Add authentication whitepaper
  ubifs: Enable authentication support
  ubifs: Do not update inode size in-place in authenticated mode
  ubifs: Add hashes and HMACs to default filesystem
  ubifs: authentication: Authenticate super block node
  ubifs: Create hash for default LPT
  ubfis: authentication: Authenticate master node
  ubifs: authentication: Authenticate LPT
  ubifs: Authenticate replayed journal
  ubifs: Add auth nodes to garbage collector journal head
  ubifs: Add authentication nodes to journal
  ubifs: authentication: Add hashes to index nodes
  ubifs: Add hashes to the tree node cache
  ubifs: Create functions to embed a HMAC in a node
  ubifs: Add helper functions for authentication support
  ubifs: Add separate functions to init/crc a node
  ubifs: Format changes for authentication support
  ubifs: Store read superblock node
  ubifs: Drop write_node
  ...
2018-11-04 14:46:04 -08:00