Граф коммитов

15 Коммитов

Автор SHA1 Сообщение Дата
Michal Simek 00f7dc6363 ARM: zynq: Add support for SOC_BUS
Provide information through SOC_BUS to user space.
Silicon revision is provided through devcfg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 16:13:48 +02:00
Steffen Trumtrar 7b274efef7 ARM: zynq: Make zynq_slcr_base static
The pointer doesn't need to be passed around any more.
Make it static.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:21:19 +01:00
Michal Simek 016f4dcae8 ARM: zynq: Split slcr in two parts
Split the slcr into an early part for unlocking and cpu starting
and a later syscon driver.
Also add "syscon" compatible property for slcr.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-10 11:20:54 +01:00
Soren Brinkmann 6a37ff388a arm: zynq: Invalidate L1 in secondary boot
During boot, Linux initiates a clean-invalidate operation only, resulting
in faulty data to be written to the memory system during resume.
Therefore invalidate the L1 in the secondary boot path to avoid these
issues.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-12-10 14:17:55 +01:00
Paul Gortmaker 8bd26e3a7e arm: delete __cpuinit/__CPUINIT usage from all ARM users
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code.  It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.

[1] https://lkml.org/lkml/2013/5/20/589

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-07-14 19:36:52 -04:00
Michal Simek c7c28b0fdd arm: zynq: Add hotplug support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:24:00 +02:00
Michal Simek aa7eb2bb4e arm: zynq: Add smp support
Zynq is dual core Cortex A9 which starts always
at zero. Using simple trampoline ensure long jump
to secondary_startup code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2013-04-04 09:24:00 +02:00
Michal Simek 96790f0a28 arm: zynq: Add support for system reset
Do system reset via slcr registers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00
Michal Simek 64b889b39e arm: zynq: Move slcr initialization to separate file
Create separate slcr driver instead of polluting common code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:29 +02:00
Michal Simek 732078c369 arm: zynq: Load scu baseaddress at run time
Use Cortex a9 cp15 to read scu baseaddress.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:22:28 +02:00
Michal Simek c5263bb8b7 arm: zynq: Move timer to clocksource interface
Use clocksource timer initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04 09:09:10 +02:00
Soren Brinkmann f184c5caa9 arm: zynq: timer: Replace PSS through PS
The acronym PSS is deprecated by Xilinx. The correct term, which is
also used in Xilinx documentation is PS (processing system).
This is just a search and replace:
 - s/PSS/PS/g
 - s/pss/ps/g

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
2013-01-28 13:27:20 +01:00
Josh Cartwright 03e07595fe ARM: zynq: move arm-specific sys_timer out of ttc
Move the sys_timer definition out of ttc driver and make it part of the
common zynq code.  This is preparation for renaming and COMMON_CLK
support.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-05 13:38:32 +01:00
Arnd Bergmann 3d64b4496f ARM: Xilinx: merge board file into main platform code
The zynq platform will never have board files other than the
device tree one, so there is no point splitting it from common.c.

This makes the code more compact.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: John Linn <john.linn@xilinx.com>
2011-07-07 14:13:58 +00:00
John Linn b85a3ef4ac ARM: Xilinx: Adding Xilinx board support
The 1st board support is minimal to get a system up and running
on the Xilinx platform.

This platform reuses the clock implementation from plat-versatile, and
it depends entirely on CONFIG_OF support.  There is only one board
support file which obtains all device information from a device tree
dtb file which is passed to the kernel at boot time.

Signed-off-by: John Linn <john.linn@xilinx.com>
2011-06-20 11:52:30 -06:00