On SAM9X60, slewrate should be enabled on pins with a switching frequency
below 50Mhz. Since most of our pins do not exceed this value, we enable
slewrate by default. Pins with a switching value that exceeds 50Mhz will
have to explicitly disable slewrate.
This patch changes the ABI. However, the slewrate macros are only used
by SAM9X60 and, at this moment, there are no device-tree files available
for this platform.
Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The defines RK_FUNC_1, RK_FUNC_2, RK_FUNC_3 and RK_FUNC_4
are no longer used. Mark them as "deprecated"
to prevent that someone start using them again.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20191015205852.4200-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
gplv2 only
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.666840552@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 263 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
license terms gnu general public license gpl version 2
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 161 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 3 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [kishon] [vijay] [abraham]
[i] [kishon]@[ti] [com] this program is distributed in the hope that
it will be useful but without any warranty without even the implied
warranty of merchantability or fitness for a particular purpose see
the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [graeme] [gregory]
[gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
[kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
[hk] [hemahk]@[ti] [com] this program is distributed in the hope
that it will be useful but without any warranty without even the
implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 1105 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
AM33XX_PADCONF takes three instead of two parameters, to make
future changes to #pinctrl-cells easier.
For old boards which are not mainlined, we left the AM33XX_IOPAD
macro.
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The values are extraced from the "AM335x SitaraTM Processors Technical
Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the
file autogenerated by TI PinMux.
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
No core changes.
New drivers:
- NXP (ex Freescale) i.MX 8QM driver.
- NXP (ex Freescale) i.MX 8MM driver.
- AT91 SAM9X60 subdriver.
Improvements:
- Support for external interrups (EINT) on Mediatek virtual GPIOs.
- Make BCM2835 pin config fully generic.
- Lots of Renesas SH-PFC incremental improvements.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJchil8AAoJEEEQszewGV1zTCcP/AurT3InBO4nVdN9UMuoDL7P
gx3SALULapc4+M1NUoRw+w+z5fvjd0gGdPXZeyhX1E9kXxLmWBmBf6tl0MO2YYPC
UWbSnBaWIOOli0f4k+GKVF8LKqD0z0e/YqX4mG7UI3OLJzcJgm7OL9uXN3Gh7tIP
Pa6CGbv0aRDkZpWUD2ZTpSPCRYGT57roVq//d7V7s+0lveS97pQuMv43YlS5L2my
JOOhHNG33bgi4lS/ZOP81G16oOrVaoupXuX7E+AvgG6vxr5965Fi+qoGLkxIuYOm
jtrzuNY98eL2m9b505VYdNmD7ouBhG6CKFb4njpOvjkkqNUXOaGV53wlEuEYRUNz
bsp0596+dlOcW7wl11r6YI4Kyn2wQJFql1AwS8A4dEtbuboGrDy16N3adr1SkIGZ
4ESN8xydcC7CAgUGXks+AgDj9vYwOs4apylJDW5tMk4K0LIsEYsDkbNeS9hwDYIH
ZlbQe9N2loB6qQbX3c3D3/sIhKj2VB4elONSwOW10M8OJdJwp8h44UyMZ3TIEHIT
7Gu9pw5vobXbccKCSjqkYYflaHMmjwZUtLqDZws818sbe/xgDxONbRqloZCLV39Y
kmwRGbbE5WtNAM0X+ABwMG3Lm77wxCFKCjJwLHH79qqt4kSBynEKXQ4D/coG/Hln
6idanzKEPiIBJ+6QLdbQ
=EfXK
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is a calm cycle, not much happened this time around: not even
much incremental development. Some three new drivers, that is all.
No core changes.
New drivers:
- NXP (ex Freescale) i.MX 8QM driver.
- NXP (ex Freescale) i.MX 8MM driver.
- AT91 SAM9X60 subdriver.
Improvements:
- Support for external interrups (EINT) on Mediatek virtual GPIOs.
- Make BCM2835 pin config fully generic.
- Lots of Renesas SH-PFC incremental improvements"
* tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits)
pinctrl: imx: fix scu link errors
dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding
pinctrl: qcom: spmi-gpio: Reorder debug print
pinctrl: nomadik: fix possible object reference leak
pinctrl: stm32: return error upon hwspinlock failure
pinctrl: stm32: fix memory leak issue
pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
pinctrl: sh-pfc: Validate fixed-size field widths at build time
pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups
pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
pinctrl: sh-pfc: emev2: Add missing pinmux functions
pinctrl: sunxi: Support I/O bias voltage setting on A80
pinctrl: ingenic: Add LCD pins for the JZ4725B SoC
pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask
pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl
pinctrl: bcm2835: declare pin config as generic
pinctrl: qcom: qcs404: Drop unused UFS_RESET macro
dt-bindings: add documentation for slew rate
...
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
No core changes this time.
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins
with another CPU using a hardware spinlock.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJcKN2qAAoJEEEQszewGV1zK5wP/2QbrvH8eW+mF9YD+1fr11Sp
oCe52C7n1YMKt5R6vSFyLtqPYDehCP9gTS0Zlbz4HKyTe2E9OIuigrmg+1uQwxWp
GSvxmMx9QFlNqUcWOvc90DYDfOh5ZPVIsP16k3DIlodVsQlSu4O4KF0pJseRyuSh
PVn/MjPrGtyTB2TJzO/Oj3sadHhVRzTb6Zlk7uk5hak6ys5AYHetBHhuxAcicFv4
OGwEOvaV5DiTO5wbbyNSmkF5NI+ApV2o4DRRNTXC+mJJSPCpQxFskLTmHu9wYKmE
/p6Gp9dtxSS3QLA4NXsY+IrFJsU1q261gEvIsFa2upW5j7T8bLzRAzoFG+/dil6t
k5GDnx8t7qSPXLme8/nJlX40O2CJs4sXKwCQY4vjsySW31ryqBMm4JNSQKTxe9Ma
1RrZ7UR+P6IwupUsEYZkcneuu+oGMNYpbDG48R2utgECY4KN17wUjjZHkYHZNiDi
Yk/CMkOXXuZnAZGfmaj8R9yjkjFZMZAqOYDJcruMzLFjAkw6fCmFipZLoSIN4+sJ
u4RERrbsF+e5PY4BOfxYw5NIzTl60AQquttj//RJyLQDsQ/HMU9jaovW6E3JQytO
NgU9RtEwrtK50ef5OYS4EtTlNi2B3arU83noI/oX3R52SoAIdMTHtVMgyECm3dMg
XeLn9x2Ffy7a4PRruLoy
=cm6m
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have no core changes but lots of incremental development in drivers
all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
keep churning out new SoCs.
I have some subtree maintainers for Renesas and Intel helping out to
keep down the load, it's been working smoothly (Samsung also have a
subtree but it was not used this cycle.)
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins with
another CPU using a hardware spinlock"
* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
pinctrl: imx-scu: Depend on IMX_SCU
pinctrl: ocelot: Add dependency on HAS_IOMEM
pinctrl: ocelot: add MSCC Jaguar2 support
pinctrl: bcm: ns: support updated DT binding as syscon subnode
dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
MAINTAINERS: merge at91 pinctrl entries
pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
pinctrl: uniphier: constify uniphier_pinctrl_socdata
pinctrl: mediatek: improve Kconfig dependencies
pinctrl: msm: mark PM functions as __maybe_unused
dt-bindings: pinctrl: sunxi: Add supply properties
pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
...
The dt-bindings header for TI K3 AM6 SoCs define a set of macros for
defining pinmux configs in human readable form, instead of raw-coded
hex values.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW/fATQAKCRCKwlD9ZEnx
cEcRAPoCtfqfL82fb4Yj6zTrwD8dpy2TVpRYT95YRNuPegcWZwEAxpv4bUNVAMQJ
Wj6GYkhMTuGBaaUJzNGJclD7u7nJcgc=
=YGuc
-----END PGP SIGNATURE-----
Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
MX8QXP contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are close to 800 indivudal changesets in this branch again, which
feels like a lot. There are particularly many changes for the NVIDIA
Tegra platform this time, in fact more than it has seen in the two years
since the v4.9 merge window. Aside from this, it's been fairly normal,
with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi,
Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5
is a minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core
Marvell Armada 8040 network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in
the BMC.
NXP i.MX usually sees a lot of new boards each release. This time there
we only add one minor variant: ConnectCore 6UL SBC Pro uses the same
SoM design as the ConnectCore 6UL SBC Express added later. However,
there is a new chip, the i.MX6ULZ, which is an even smaller variant
of the i.MX6ULL, with features removed. There is also support for the
reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute module
based on bcm2837, it was launched in early 2017 but only now added to
the kernel, both as 32-bit and as 64-bit files, as we tend to do for
Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time
are:
Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana
Pi M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit
Asus Tinker board, the model 'S' based on rk3288, and three now
boards based on the popular RK3399 chip:
ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
Rock960: https://www.96boards.org/product/rock960/
RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and
the RK3399 is the same chip used in several Chromebooks. Finally,
we get support for the PX30 (aka rk3326) chip, which is based on the
low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board
is supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based
on the MT7622 WiFi router platform, and the first product I've seen with
a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2),
another quad-core Cortex-A53 SoC, and its evaluation platform.
On the 32-bit side, we gain support for an actual end-user product,
the Endless Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform. This
chip is commonly known as the Snapdragon 835, and is used in high-end
phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the previously
added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB
Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing files,
the only board that gets added is the Toradex Colibri T20 on Colibri
Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the (formerly
Marvell) Berlin line of set-top-box chips used e.g. in the various Google
Chromecast. Only the .dtsi gets added at this point, no actual machines.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJb1224AAoJEGCrR//JCVIn9uYP/jLMoGkVQRS5L9sRjOci1l5b
EHl8veJ+uNJaTStp5XAZk90MoBcSdXtnISSEiR7a3qKJw1mYfgAWyPtQCttRFUCo
rDp4GJpJ96TBg1tyt5Lop3V9eIYbCh9epf2foKTTdpRiX022AFk1031jvnh2Teuy
fKA2VNeoyyOZqxh0ysJq7G8kWt8PTQTKXDebYPWEbsu0AFmqQ84lz7oGNdPk0GPm
krtQIO6rh+sJR/8wWGYfnTYAIOk6jNrPhiyjEcyu+x2525rwKxJNKVY8P9PuNhrl
hzqld1dPtb3gfdcxWxZUznHmVUGkVEIa1QNC6csSmLzuxqJJE0/J5u2P8lIfrhVI
c5C8r3eaTxFM0s5uKhNhhewlJ6uiDhUQy13AG0JXteujP23BGObYstnV10pJrH75
xq7uSUiU04v95MocPjodJ2I7dIlAoFCd6ELnsmD/mz743gY9AZ6DHaOBMMwIzK3H
EQifF5E/4PWOjBx7fonumBm0LebPjWGmv4CNyCK5Q93ylK7U/kFDdjiNjNhyks5E
CVQBFhA7sshKJQRDOiaofMxOfKJHeKGU2PR7yGRpT3YWQD/apIL/elG4qUNjLX46
2Dwdgq8nDdbY2SzPwwy7ncTtyDRYcsFCtScT5slu1I1UxIhwEYJurzCKDM4jJNZb
Cg2D7a+AlZ8N5Vsr1ldV
=yaED
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"There are close to 800 indivudal changesets in this branch again,
which feels like a lot. There are particularly many changes for the
NVIDIA Tegra platform this time, in fact more than it has seen in the
two years since the v4.9 merge window. Aside from this, it's been
fairly normal, with lots of changes going into Renesas R-CAR, NXP
i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a
minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core Marvell Armada 8040
network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the
BMC.
NXP i.MX usually sees a lot of new boards each release. This time
there we only add one minor variant: ConnectCore 6UL SBC Pro uses the
same SoM design as the ConnectCore 6UL SBC Express added later.
However, there is a new chip, the i.MX6ULZ, which is an even smaller
variant of the i.MX6ULL, with features removed. There is also support
for the reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute
module based on bcm2837, it was launched in early 2017 but only now
added to the kernel, both as 32-bit and as 64-bit files, as we tend to
do for Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time are:
- Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
- Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
- Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
- Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana Pi
M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit Asus
Tinker board, the model 'S' based on rk3288, and three now boards
based on the popular RK3399 chip:
- ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
- Rock960: https://www.96boards.org/product/rock960/
- RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and the
RK3399 is the same chip used in several Chromebooks. Finally, we get
support for the PX30 (aka rk3326) chip, which is based on the low-end
64-bit Cortex-A35 CPU core. So far, only the evaluation board is
supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is
based on the MT7622 WiFi router platform, and the first product I've
seen with a 64-bit Mediatek chip in that market:
http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2), another
quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit
side, we gain support for an actual end-user product, the Endless
Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform.
This chip is commonly known as the Snapdragon 835, and is used in
high-end phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the
previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the
M3NULCB Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing
files, the only board that gets added is the Toradex Colibri T20 on
Colibri Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the
(formerly Marvell) Berlin line of set-top-box chips used e.g. in the
various Google Chromecast. Only the .dtsi gets added at this point, no
actual machines"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits)
ARM: dts: socfgpa: remove ethernet aliases from dtsi
arm64: dts: stratix10: add ethernet aliases
dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI
dt-bindings: mediatek: Add JPEG Decoder binding for MT7623
dt-bindings: iommu: mediatek: Add binding for MT7623
dt-bindings: clock: mediatek: add support for MT7623
ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites
ARM: dts: da850-lego-ev3: slow down A/DC as much as possible
ARM: dts: da850-evm: Enable tca6416 on baseboard
arm64: dts: uniphier: Add USB2 PHY nodes
arm64: dts: uniphier: Add USB3 controller nodes
ARM: dts: uniphier: Add USB2 PHY nodes
ARM: dts: uniphier: Add USB3 controller nodes
arm64: dts: meson-axg: s400: disable emmc
arm64: dts: meson-axg: s400: add missing emmc pwrseq
arm64: dts: clearfog-gt-8k: add PCIe slot description
ARM: dts: at91: sama5d4_xplained: even nand memory partitions
ARM: dts: at91: sama5d3_xplained: even nand memory partitions
ARM: dts: at91: at91sam9x5cm: even nand memory partitions
ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets
...
The Renesas RZ/N1 device family PINCTRL node description.
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the PMC pinctrl bindings for pad power state and signaling
voltage configuration. Both nvidia,tegra186-pmc.txt and
nvidia,tegra20-pmc.txt are modified as they both cover SoC generations
for which these bindings apply.
Add a header defining Tegra PMC pad voltage configurations.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
-----BEGIN PGP SIGNATURE-----
iQItBAABCAAXBQJbWJ6WEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9dvJBAA
kgLUDDgkY+lKOQ/dRA7HJf2OTHSPZ3hhXpD8BnaRnqs8HRTWW8xVX+ts/wbXFnw2
s4Q45hYNqqSfH3lzQ67fKokjoQMf2TtmidXaHVfnVlNHa7gcFW0yj1Kc/4qRyRql
xo7FptZXM1bFZ/su3VMbSnBH+2n9gn4RDC5Zk5Vzgr6jC7Pu2kSgM0Q4dpk7sJg/
TwRT+HZV2RDN3APByGWHEZ5gbOtxj6L8+gHsvtgbf8STHVIlAAUS/dDAFAISusEI
SIkewPCZFvT9FWYqFQjuS7JTAVPgXeU+JisZaRyhR2sQFgu5qyvEZzRDV87f4X2b
Zf0dRMrrcScsNcIMerkKki0r1FVxPEaSjgAuK+8x5u+RopAgbmmiFBSt2pYUayVb
7M8rcfqLRgb6V8/Um/aGajirQaAj5DWtZGPbtCGF01uKCPPaEgE5ch2dXPjKeNbw
HSoj2dOKDnPApzWcsVbRpQfo9E9VszT3JZ9CEV64dxWLebYvQDx9f2vZxxkJnuYS
EcnPXY2E+QkwpSavwmqsbJhrHGVO8scveKQSS3TCmMyOJp2feerBlsyWXCjHGpeA
JLdYXPnj23jIQrcAtRu5a3DskjpT3CgsEheaRikds03vT706qEISLpTDHLbfhvGy
6oetWL6Cwzqq2tRpyOdX5Z/DWthRXJmhKyHhmGKI+ec=
=a9XD
-----END PGP SIGNATURE-----
Merge tag 'samsung-pinctrl-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v4.19
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
Add support for the drive strength configuration. Usually, this value is
expressed in mA. Since the numeric value depends on VDDIOP voltage, a
value we can't retrieve at runtime, the controller uses low, medium and
high to define the drive strength.
The PIO controller accepts two values for the low drive configuration: 0
and 1. Most of the time, we don't care about the drive strength. So we
keep the default value which is 0. The drive strength is advertised
through the sysfs only when it has been explicitly set in the device
tree i.e. if its value is different from 0.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fulfill the pinmux macros for MT7623
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing pinctrl binding about I2C2 and SPI2 which would be used in
devicetree related files.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and pinctrl_force_sleep()
reprogram the states into the hardware of any hogged pins, even
if they are already in the desired state. This only apply to hogged
pins since groups of pins owned by drivers need to be managed by
each driver, lest they could not do things like runtime PM and
put pins to sleeping state even if the system as a whole is not
in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is
a mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for routers,
repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has
multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJadGEKAAoJEEEQszewGV1zA4QQALs8edxhv4qV5vm50mTdrO3n
QtRhJNb53j6MIKtjFnazMvh6MXRIP+08SyX9sDLi5AxINIVuyQh3mrcB6Zc9zN58
+6jFFOIbfm5E8by4n3wnKm3F/WAbNBZph9eT2Rn3cDv9o9hQbyNJ50sQkQMCjd9X
WGR353c3OL4zb3vU8t72G/RPYUY1w1SkG9bGzRuSif8LawDcN6v6MMo2XhZA6RqM
3qYIG29vJ1n0weggUIBeSAJIzk4eMwcoWCbVWxhns5JGxw5VPES1zbSp1D+mbzRC
01i5Pt/gD+cWN/Kk/zKIMo1OqLAl+uLr6hzepj6W+5wu9CcQz/BgvRx7HUqnqgyh
S8cN4AOgWmW+T75pHypd1WVic3q0RCXkFY8jjHpCATDY+Z+js0lZRs3y4DBiJ2ys
DMVBeumDINKqaZ6aLH6lVkm+SxXOUy143arQQIzi0/F7fAp68i+9ofIO8B5smEmd
0S+3sT0sO5QXVgZJ0t0iGUUG5irXi8XtF5qvRmuFZUe0OLGgKX20oCdC0pH0WU4M
OZO1Bvb8vmn1tddogO2WlHeg6amWdwxtDuBsLRO3YILLu3jwPjhNqNmErXzXEmWt
TY9l2M1uQmoJibNpmTjOzSfj4OtUHMwkDrFRJHAcUPcKwdEy4MyzFL16ATnIwgY9
AmyMLNWJd8Wazgc6BK6w
=gLY/
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.16 kernel cycle.
Like with GPIO it is actually a bit calm this time.
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and
pinctrl_force_sleep() reprogram the states into the hardware of any
hogged pins, even if they are already in the desired state.
This only apply to hogged pins since groups of pins owned by
drivers need to be managed by each driver, lest they could not do
things like runtime PM and put pins to sleeping state even if the
system as a whole is not in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is a
mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for
routers, repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC
has multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels
etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes"
* tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits)
pinctrl: mcp23s08: fix irq setup order
pinctrl: Forward declare struct device
pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
pinctrl: stm32: add STM32F769 MCU support
pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping
pinctrl: sx150x: Register pinctrl before adding the gpiochip
pinctrl: sx150x: Unregister the pinctrl on release
pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe()
pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show()
pinctrl: pinmux: Use seq_putc() in pinmux_pins_show()
pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show()
pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
pinctrl: uniphier: refactor drive strength get/set functions
pinctrl: imx7ulp: constify struct imx_cfg_params_decode
pinctrl: imx: constify struct imx_pinctrl_soc_info
pinctrl: imx7d: simplify imx7d_pinctrl_probe
pinctrl: imx: use struct imx_pinctrl_soc_info as a const
pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly.
pinctrl: qcom: Add msm8998 pinctrl driver
...
Due to a mistake in documentation the DS0_PULL_UP_DOWN_EN macro was
mistakenly defined as an active high bit, however setting the bit
actually disables the internal pull resistor on the pin, so correct this
macro and introduce a new DS0_PULL_UP_DOWN_DIS macro with the proper bit
value set now that the documentation has been updated.
Change based on AM437x Techninal Reference Manual SPRUHL7G Revised June
2017 Section 7.2.1.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We add device tree files for a couple of additional SoCs in various areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues that
the latest version of 'dtc' now warns about. Unfortunately there is still
a lot left to do.
A rework of the ARM foundation model introduced several new files
for common variations of the model.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1
j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw
j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o
id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV
rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u
Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea
fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK
tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW
oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3
162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ
wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6
06OBR3HgUW27urUn/JBu
=TnSo
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in various
areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
networking, Amlogic A113D for audio, and Renesas R-Car V3M for
automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
Amlogic and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues
that the latest version of 'dtc' now warns about. Unfortunately there
is still a lot left to do.
A rework of the ARM foundation model introduced several new files for
common variations of the model"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
dt-bindings: bus: Add documentation for the Technologic Systems NBUS
arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
arm: dts: mt7623: remove unused compatible string for pio node
arm: dts: mt7623: update usb related nodes
arm: dts: mt7623: update crypto node
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
...
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng604RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPLCQ//cPpaHUB7wW0jKLVX3J0cUQt5lWjNv/16
3W/ap6TPIwNmkdeF8YySt22exHNXtgPjd6XuIK5MPfx5B/4Z1llEjet4kjb01Jmw
j2A7QeQln0lqWfAXux4Rw7G7bnmN8Zsph8BYKz5K2vYfAca1Y+xhlNPRRSmsD7Wx
+zHR87eKQ+WEL8x+7iBnw5tgqKvdKVyqmkKHm1y/Hr4DqewuOTgvVZJ6FnxG6hGA
PeNnQrM1GOLGxU28tlROuGnaUTT1knBQcoJy2lWwxx4on2S/XzAMcetEq8e0RR2C
0WOotWAQPSPicncr17Gmx7kNewcAwJ+bnNmbkXsuIsGksOkcil+Q+H0Y5gzImYQu
XBRbuhLwqrFxqSfOyQIppFa0w5KGF7Mm9zTyjaO9DshpTny9gwsxJK2r0rh6ucbq
Rt3WuJmJwdMZ9XT8iBRJonkGle4Q6dmtuHu0pqlJzjclfLwvLUoxNZwc0k0e5g2f
a/PGNUj0rqSo6AgUfjlvQU8M/f3T9X0bRIIE7zWbIo8P0qxJPUDBnz+CHHADVD4G
Yn/rM1omIfcMCIOKiY3l53Nclr6Nld2U1Mg4tMiG32AkE8lefU4q1dlfUblO/Vrw
wAAoG54IMH4ekv5ljSeAKR0cB+a6PzlLwZivwZaN9/mUuMBRYlFSQEhRD1KdhZbR
L/c9isoMAqk=
=xWf5
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: omap3: Replace deprecated mcp prefix
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: omap5: Increase max-voltage of pbias regulator
ARM: dts: dra7: Increase max-voltage of pbias regulator
ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
ARM: dts: Configure earlycon for omap5-common
ARM: dts: Configure earlycon for pandaboard
ARM: dts: Configure earlycon for n8x0
ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
...
Initially each pin was declared in "include/dt-bindings/stm32<SOC>-pinfunc.h"
and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
Since this approach was approved, the number of supported MCU has
increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
a new approach which consist to use a macro to define pin muxing in device
tree. All STM32 will use the common macro to define pinmux. Furthermore, it
will make STM32 maintenance and integration of new SOC easier .
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
AM43xx platform pinmux registers contain bits to set state during
suspend (DS0), add these bit definitions here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As usual, device tree updates is the bulk of our material in this merge
window. This time around, 559 patches affecting both 32- and 64-bit
platforms.
Changes are too many to list individually, but some of the larger ones:
New platform/SoC support:
- Automotive:
+ Renesas R-Car D3 (R8A77995)
+ TI DT76x
+ MediaTek mt2712e
- Communication-oriented:
+ Qualcomm IPQ8074
+ Broadcom Stingray
+ Marvell Armada 8080
- Set top box:
+ Uniphier PXs3
Besides some vendor reference boards for the SoC above, there are also several
new boards/machines:
- TI AM335x Moxa UC-8100-ME-T open platform
- TI AM57xx Beaglebone X15 Rev C
- Microchip/Atmel sama5d27 SoM1 EK
- Broadcom Raspberry Pi Zero W
- Gemini-based D-Link DIR-685 router
- Freescale i.MX6:
+ Toradex Apalis module + Apalis and Ixora carrier boards
+ Engicam GEAM6UL Starter Kit
- Freescale i.MX53-based Beckhoff CX9020 Embedded PC
- Mediatek mt7623-based BananaPi R2
- Several Allwinner-based single-board computers:
+ Cubietruck plus
+ Bananapi M3, M2M and M64
+ NanoPi A64
+ A64-OLinuXino
+ Pine64
- Rockchip RK3328 Pine64/Rock64 board support
- Rockchip RK3399 boards:
+ RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
+ Theobroma Systems RK3399-Q7 SoM
- ZTE ZX296718 PCBOX Board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZtdtjAAoJEIwa5zzehBx3PzgP/iCQyUk5wklG9E5YNl8a9m/o
djBkelabTm52s5ZTu6Awsq5rx8jUMqcb0vo+9v9yPWFG6On2oTZyZ/rE1Wbj3+gG
+ENVyRgxmzYDTXqQLiu1UOV9wSA0gHwQCRZvE7i32NNfLu+tAsvu9e/AuznQ1xhR
4G7dGCRRlRkZkrVKrJ7JjklmW578pFQkZLmz8K2nWqwh1tKpK3fY19SrwUKx+YCR
tnMPYAPjB5zxR9tfcDS4FUKdiC7dMiMzZNGiYl5a26X6wsNR7xYtNzFMaGZn1ecG
PwOS+DAnj8J+AfpQBLWu9xytHbJdqITRuNcF+OXNVW9TKmb0syf7VgRUDkhjIMxP
aGZc4Q6PwgTRwnX+w6fTzJTyk+uXtieCicZaaZ1jlgcQq0pfbzJ1vZMpq4aoVlxU
mS84i1bd8AiavmHuyIRNB3/T4aAsVhTUIBndXluKV8yWroXhAukfI1YmGr1Eux7C
fy5pPeDqk9lXR3bqIhfnaLoVsApEXTOWMC8X48vwfaQHiCGR9JJwpfsGcaNi1bri
Col1qRzkXWGA6KqTWtpo+o12rYuMGc0mpZTCmejKuBoxMXOU+wLyJYgaxa7pyesX
S5rLaIe2l9ppXHjjEERp7AzczzLS5W20Tez5vYnZAQb1dYuJzwXwiATt8NT+XG3V
Wu92UwUfjxYk8vGz48ph
=R45j
-----END PGP SIGNATURE-----
Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM/arm64 Devicetree updates from Olof Johansson:
"As usual, device tree updates is the bulk of our material in this
merge window. This time around, 559 patches affecting both 32- and
64-bit platforms.
Changes are too many to list individually, but some of the larger
ones:
New platform/SoC support:
- Automotive:
+ Renesas R-Car D3 (R8A77995)
+ TI DT76x
+ MediaTek mt2712e
- Communication-oriented:
+ Qualcomm IPQ8074
+ Broadcom Stingray
+ Marvell Armada 8080
- Set top box:
+ Uniphier PXs3
Besides some vendor reference boards for the SoC above, there are also
several new boards/machines:
- TI AM335x Moxa UC-8100-ME-T open platform
- TI AM57xx Beaglebone X15 Rev C
- Microchip/Atmel sama5d27 SoM1 EK
- Broadcom Raspberry Pi Zero W
- Gemini-based D-Link DIR-685 router
- Freescale i.MX6:
+ Toradex Apalis module + Apalis and Ixora carrier boards
+ Engicam GEAM6UL Starter Kit
- Freescale i.MX53-based Beckhoff CX9020 Embedded PC
- Mediatek mt7623-based BananaPi R2
- Several Allwinner-based single-board computers:
+ Cubietruck plus
+ Bananapi M3, M2M and M64
+ NanoPi A64
+ A64-OLinuXino
+ Pine64
- Rockchip RK3328 Pine64/Rock64 board support
- Rockchip RK3399 boards:
+ RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
+ Theobroma Systems RK3399-Q7 SoM
- ZTE ZX296718 PCBOX Board"
* tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits)
ARM: dts: at91: at91sam9g45: add AC97
arm64: dts: marvell: mcbin: enable more networking ports
arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
arm64: dts: marvell: add TX interrupts for PPv2.2
arm64: dts: uniphier: add PXs3 SoC support
ARM: dts: uniphier: add pinctrl groups of ethernet phy mode
ARM: dts: uniphier: fix size of sdctrl nodes
ARM: dts: uniphier: add AIDET nodes
arm64: dts: uniphier: fix size of sdctrl node
arm64: dts: uniphier: add AIDET nodes
Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2"
arm64: dts: uniphier: add reset controller node of analog amplifier
arm64: dts: marvell: add Device Tree files for Armada-8KP
arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
dt-bindings: add rk3399-q7 SoM
ARM: dts: rockchip: enable usb for rv1108-evb
ARM: dts: rockchip: add usb nodes for rv1108 SoCs
dt-bindings: update grf-binding for rv1108 SoCs
ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers
...
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On Exynos, 0xf is always used as value of external interrupt in pin mux
function thus a more descriptive macro name can be used.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Device-tree updates for arm64 platforms. For the first time I can
remember, this is actually larger than the corresponding branch for
32-bit platforms overall, though that has more individual changes.
A significant portion this time is due to added machine support:
- Initial support for the Realtek RTD1295 SoC, along with the Zidoo
X9S set-top-box
- Initial support for Actions Semi S900 and the Bubblegum-96
single-board-cёmputer.
- Rockchips support for the rk3399-Firefly single-board-computer
gets added, this one stands out for being relatively fast,
affordable and well₋supported, compared to many boards that
only fall into one or two of the above categories.
- Mediatek gains support for the mt6797 mobile-phone SoC platform
and corresponding evaluation board.
- Amlogic board support gets added for the NanoPi K2 and S905x
LibreTech CC single-board computers and the R-Box Pro set-top-box
- Allwinner board support gets added for the OrangePi Win,
Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single
board computers and the SoPine system-on-module.
- Renesas board support for Salvator-XS and H3ULCB
automotive development systems.
- Socionext Uniphier board support for LD11-global and LD20-global,
whatever those may be.
- Broadcom adds support for the new Stingray communication processor
in its iProc family, along with two reference boards.
Other updates include:
- For the hisicon platform, support for Hi3660-Hikey960 gets
extended significantly.
- Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWVpZnmCrR//JCVInAQJYsBAAhuoRK5WZawkeAMEbkGeyOXYbnp6qUlKm
w1lwXXdStLjkOUmQXo5KNDmWiHbPnuhwHprX9HMPDI0G1+DSaOlxIezNFIlKOUyW
fQxZjt4+L3eRXQCetj3P+QAp37ifmFxSg0RmM+fGBwAhNcyf6nH98cn4ZaauZrfu
F3cJz9t9MTdIlxXXF1uTAk9g9tR8sCoD4ekmM15MwtLZZTqmZNP1OelRDwwzNoOn
6pp4BUDOFhesynsI7uYoKdj0lt0fGg348FAlt9w1g9xQ819wrdaz/eAmV49eUZQ+
Ps8FY1OvJsVaoe3yGeEG0Ps87VTRCzSOFqstNDftYsz+q5Mm8ImEwG8JhuoqyDQD
/VW+DamdXyN4tuUFQfg+Cz8+6WZRwfTeOVmuvC4aRuKNDWV5CC5qP1B7oZ/a2nYR
6M8+1W+RJOgjJ9wa/125Z6edEpzCRzfxDSLKyHbQ2q//0NK0kRrS9+Rdi6FlReV3
mVGtK5gFLVzcCyBSaMY48KnRe0/cjOZ5YXw5o/DIeYJkyPnOlN1pXOEMalQCf+uI
6D8pjO307lt6TLCiq3i2C8bN5k0FBqD4rirsp9PlRw3vTx1LI+KnhJQ8NOrrTheW
gtDevoDMssnJdmVj3Wbv8DPWJOGSF6vA/xvsQBe0MglHFtuR/0jp9YC8ncvIP1RC
CkFTqmpZXYg=
=E8pa
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Arnd Bergmann:
"Device-tree updates for arm64 platforms. For the first time I can
remember, this is actually larger than the corresponding branch for
32-bit platforms overall, though that has more individual changes.
A significant portion this time is due to added machine support:
- Initial support for the Realtek RTD1295 SoC, along with the Zidoo
X9S set-top-box
- Initial support for Actions Semi S900 and the Bubblegum-96
single-board-cёmputer.
- Rockchips support for the rk3399-Firefly single-board-computer gets
added, this one stands out for being relatively fast, affordable
and well₋supported, compared to many boards that only fall into one
or two of the above categories.
- Mediatek gains support for the mt6797 mobile-phone SoC platform and
corresponding evaluation board.
- Amlogic board support gets added for the NanoPi K2 and S905x
LibreTech CC single-board computers and the R-Box Pro set-top-box
- Allwinner board support gets added for the OrangePi Win, Orangepi
Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers
and the SoPine system-on-module.
- Renesas board support for Salvator-XS and H3ULCB automotive
development systems.
- Socionext Uniphier board support for LD11-global and LD20-global,
whatever those may be.
- Broadcom adds support for the new Stingray communication processor
in its iProc family, along with two reference boards.
Other updates include:
- For the hisicon platform, support for Hi3660-Hikey960 gets extended
significantly.
- Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (243 commits)
ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
Revert "arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k"
arm64: dts: mediatek: don't include missing file
ARM64: dts: meson-gxl: Add Libre Technology CC support
dt-bindings: arm: amlogic: Add Libre Technology CC board
dt-bindings: add Libre Technology vendor prefix
arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K
arm64: dts: zte: Use - instead of @ for DT OPP entries
arm64: dts: marvell: add gpio support for Armada 7K/8K
arm64: dts: marvell: add pinctrl support for Armada 7K/8K
arm64: dts: marvell: use new binding for the system controller on cp110
arm64: dts: marvell: remove *-clock-output-names on cp110
arm64: dts: marvell: use new bindings for xor clocks on ap806
arm64: dts: marvell: mcbin: enable the mdio node
arm64: dts: Add Actions Semi S900 and Bubblegum-96
dt-bindings: Add vendor prefix for uCRobotics
arm64: dts: marvell: add xmdio nodes for 7k/8k
arm64: dts: marvell: add a comment on the cp110 slave node status
arm64: dts: marvell: remove cpm crypto nodes from dts files
arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
...
This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.
For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller
changes, but also some new platforms that are worth mentioning:
* Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook
Plus (Kevin)
* Orange Pi PC2 (Allwinner H5)
* Freescale LS2088A and LS1088A SoCs
* Expanded support for Nvidia Tegra186 (and Jetson TX2)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZEA5TAAoJEIwa5zzehBx3uPwP/3NBPKvsDQha/x+PPgtSM1cM
pUEF1fxsLftrt+pUeRgMZqGE2xu5vVUKEQsr7KDdWMS9LMs50Pp9dTvfxr7A4Asm
WRRMR7Y3gPbr49uf4+JLLmn0hYXTeaoUftVneBj0qU9Flwe3mQDVULiRjPalWYVB
g0+NwkPE2lrqrudceA2HiVEXqNlVXCIh2mdMaC7Luo0VEsz7nRHT0TOGPaxnXB3M
NoJ56FPHtv3x9+C56B5CLJ/+Ya8SLgfqVwwoK8FgoqDzEF3nbhf/WCUyph+gHdP3
D+jMk7t0tvIW8Ne4TGXenoxBznZxgh5ObpLlKBKPCGJkKxpfuq9koH33MmY/WoUN
7uh3F3HI2sGr7tY/xaN8H7a9A4mHzipj8nqaAsjAJppIpioecGCFVtkY5q0jfxLC
aAc1o4zoimdPs9q9mu/qhgKNxWkoTYnwvtWHuwqEOggvSb1ulS1SPS24VkKrc4LI
XMGbA4mQOuFwZyG4FVfvWzbnhsHzDh4cgHaVGra6z5zoX1MUrvieCWEji+Ul1VWa
lUJ2sTilvSGkwjGcMUSki5p9GcU8dPXwqKiZqDuGx6Ps4aQsw0vz286BnBeVsusG
qLRH4nkqbF9xCEz9h71mcU6WMu17EsG9zMoCg5K4EZ+RIG3cgWq0dMWW1LqtRn7S
2YqayY3+UEyMPN146R1V
=q3Ix
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Olof Johansson:
"Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
of smaller changes, but also some new platforms that are worth
mentioning:
- Rockchip RK3399 platforms for Chromebooks, including Samsung
Chromebook Plus (Kevin)
- Orange Pi PC2 (Allwinner H5)
- Freescale LS2088A and LS1088A SoCs
- Expanded support for Nvidia Tegra186 (and Jetson TX2)"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
arm64: dts: Add basic DT to support Spreadtrum's SP9860G
arm64: dts: exynos: Use - instead of @ for DT OPP entries
arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
arm64: dts: juno: add information about L1 and L2 caches
arm64: dts: juno: fix few unit address format warnings
arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
arm64: marvell: dts: add crypto engine description for 7k/8k
arm64: dts: marvell: add sdhci support for Armada 7K/8K
arm64: dts: marvell: add eMMC support for Armada 37xx
arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
arm64: dts: hisi: add SAS nodes for the hip07 SoC
arm64: dts: hisi: add RoCE nodes for the hip07 SoC
arm64: dts: hisi: add network related nodes for the hip07 SoC
arm64: dts: hisi: add mbigen nodes for the hip07 SoC
arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
...
Add missing pinctrl binding these which would be used in
devicetree related files.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>