After commit 6a5898411159("clk: clk-npcm7xx: Remove unused static const tables
'npcm7xx_gates' and 'npcm7xx_divs_fx'"), no one use struct
npcm7xx_clk_gate_data and struct npcm7xx_clk_div_fixed_data, so remove them.
Signed-off-by: Yuan Can <yuancan@huawei.com>
Link: https://lore.kernel.org/r/20220927133931.104060-1-yuancan@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Fixes the following W=1 kernel build warning(s):
drivers/clk/clk-npcm7xx.c:438:43: warning: ‘npcm7xx_gates’ defined but not used [-Wunused-const-variable=]
drivers/clk/clk-npcm7xx.c:365:48: warning: ‘npcm7xx_divs_fx’ defined but not used [-Wunused-const-variable=]
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Tomer Maimon <tmaimon77@gmail.com>
Cc: Tali Perry <tali.perry1@gmail.com>
Cc: Patrick Venture <venture@google.com>
Cc: Nancy Yuen <yuenn@google.com>
Cc: Benjamin Fair <benjaminfair@google.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Nuvoton Technologies <tali.perry@nuvoton.com>
Cc: openbmc@lists.ozlabs.org
Cc: linux-clk@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20210126124540.3320214-16-lee.jones@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
because of summer time holidays/vacations. The biggest change in the diffstat
is in the Qualcomm clk driver, where they got support for CPUs and handful of
SoCs. After that, the at91 driver got a major rewrite for newer DT bindings
that should make things easier going forward and the TI code moved to a
clockdomain based design. The long tail is mostly small driver updates for
newer clks and some simpler SoC clock drivers such as the Hisilicon and imx
support.
In the core framework, we only have two small changes this time. One is a new
clk API to get all clks for a device with the bulk clk APIs. This allows
drivers that don't care about doing anything besides turning on all the clks to
just clk_get() them all and turn them on. The other change is the beginning of
a way to support save and restore of clk settings in the clk framework. TI is
the only user right now, but we will want to expand upon this design in the
future to support more save and restore of clk registers. At least this gets
us started and works well enough for one SoC, but there's more work in the
future.
Core:
- clk_bulk_get_all() API and friends to get all the clks for a device
- Basic clk state save/restore hooks
New Drivers:
- Renesas RZ/A2 (R7S9210) SoC, including early clocks
- Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
- Rensas RZ/G2M (r8a774a1) SoC
- Qualcomm Krait CPU clk support
- Qualcomm QCS404 GCC support
- Qualcomm SDM660 GCC support
- Qualcomm SDM845 camera clock controller
- Ingenic jz4725b CGU
- Hisilicon 3670 SoC support
- TI SCI clks on K3 SoCs
- iMX6 MMDC clks
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
Updates:
- Rework at91 PMC clock driver for new DT bindings
- Nvidia Tegra clk driver MBIST workaround fix
- S2RAM support for Marvell mvebu periph clks
- Use updated printk format for OF node names
- Fix TI code to only search DT subnodes
- Various static analysis finds
- Tag various drivers with SPDX license tags
- Support dynamic frequency switching (DFS) on qcom SDM845 GCC
- Only use s2mps11 dt-binding defines instead of redefining them in the driver
- Add some more missing clks to qcom MSM8996 GCC
- Quad SPI clks on qcom SDM845
- Add support for CMT timer clocks on R-Car V3H
- Add support for SHDI and various timer clocks on R-Car V3M
- Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
- Amlogic clk-pll driver improvements and updates
- Amlogic axg audio controller system clocks
- Register Amlogic meson8b clock controller early
- Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
- Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
- Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
- Remove obsoleted Exynos4212 ISP clock definitions
- Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
- TI RTC+DDR sleep mode support for clock save/restore
- Allwinner A64 display engine support and fixes
- Allwinner A83t display engine support and fixes
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlvY4ysRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSVaDBAA3Wv/rsCn4FJ2ZgIWYWQqr69lAWDcBVVe
4nNbFqzEmRoml8e+XOfVFwnbsai4B5ALVxyMnRlkDyxQ5TFQtF957U12Pf8upPa5
R447YBt4tw40NCj8u5KNAaBmYYHdmXXDvsBPXyQn+1iy/9R8Is8AcDmv+D2ucuJF
PPBXOwb+2CstUQhuwlXyvsAw/tqq/rJDVyAZVJUoqXJwlNMjr76V0m0ZXHN6NcyC
F2SfnzIO4srRteTeKXVFcMU/3uHC3zofEfammSJjGZkk4WHULuPpkD17RMEyBul1
Ju1S1nzGiKvYME/mmbIcRPNcpry65EVo/wn6IjAcG2m4GaWSq3F6qIttnoc6dnra
R2VylIEy7HnNcAf8fkQdkd/l+h/TDp3iVrXg0p/rRxRk4Jlc86n2PWO6jtsZv4S+
NySeRhTb51KrTl72J76LP+dfDWdbeZfkAqr0Qx6QM04OznVYSTHlnQaeM1Nx2SZR
5+k126NdxDp7xgoJNfq18wzufrlefjuRTg2Kck1YuFuhV4Fjmq7ZC81bSSaakYPh
/t073TcSZ+VfEYP5hVsl/pjMdFzHcj8pbavhs0UNIYLQNXe494Bm9PyYJOzQKnwz
Zpbf7V6eplh8J1I03VI8RHviNp340iv2hhz9vp4mNP1vIhgdNiz7R2gn5sLSoFt+
vei0J0vEzCA=
=V5aK
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This time it looks like a quieter release cycle in the clk tree. I
guess that's because of summer time holidays/vacations. The biggest
change in the diffstat is in the Qualcomm clk driver, where they got
support for CPUs and handful of SoCs. After that, the at91 driver got
a major rewrite for newer DT bindings that should make things easier
going forward and the TI code moved to a clockdomain based design.
The long tail is mostly small driver updates for newer clks and some
simpler SoC clock drivers such as the Hisilicon and imx support.
In the core framework, we only have two small changes this time.
One is a new clk API to get all clks for a device with the bulk clk
APIs. This allows drivers that don't care about doing anything besides
turning on all the clks to just clk_get() them all and turn them on.
The other change is the beginning of a way to support save and restore
of clk settings in the clk framework. TI is the only user right now,
but we will want to expand upon this design in the future to support
more save and restore of clk registers. At least this gets us started
and works well enough for one SoC, but there's more work in the
future.
Core:
- clk_bulk_get_all() API and friends to get all the clks for a device
- Basic clk state save/restore hooks
New Drivers:
- Renesas RZ/A2 (R7S9210) SoC, including early clocks
- Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
- Rensas RZ/G2M (r8a774a1) SoC
- Qualcomm Krait CPU clk support
- Qualcomm QCS404 GCC support
- Qualcomm SDM660 GCC support
- Qualcomm SDM845 camera clock controller
- Ingenic jz4725b CGU
- Hisilicon 3670 SoC support
- TI SCI clks on K3 SoCs
- iMX6 MMDC clks
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
Updates:
- Rework at91 PMC clock driver for new DT bindings
- Nvidia Tegra clk driver MBIST workaround fix
- S2RAM support for Marvell mvebu periph clks
- Use updated printk format for OF node names
- Fix TI code to only search DT subnodes
- Various static analysis finds
- Tag various drivers with SPDX license tags
- Support dynamic frequency switching (DFS) on qcom SDM845 GCC
- Only use s2mps11 dt-binding defines instead of redefining them in the driver
- Add some more missing clks to qcom MSM8996 GCC
- Quad SPI clks on qcom SDM845
- Add support for CMT timer clocks on R-Car V3H
- Add support for SHDI and various timer clocks on R-Car V3M
- Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
- Amlogic clk-pll driver improvements and updates
- Amlogic axg audio controller system clocks
- Register Amlogic meson8b clock controller early
- Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
- Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
- Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
- Remove obsoleted Exynos4212 ISP clock definitions
- Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
- TI RTC+DDR sleep mode support for clock save/restore
- Allwinner A64 display engine support and fixes
- Allwinner A83t display engine support and fixes"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits)
clk: qcom: Remove unused arrays in SDM845 GCC
clk: fixed-rate: fix of_node_get-put imbalance
clk: s2mps11: Add used attribute to s2mps11_dt_match
clk: qcom: gcc-sdm660: Add MODULE_LICENSE
clk: qcom: Add safe switch hook for krait mux clocks
dt-bindings: clock: Document qcom,krait-cc
clk: qcom: Add Krait clock controller driver
dt-bindings: arm: Document qcom,kpss-gcc
clk: qcom: Add KPSS ACC/GCC driver
clk: qcom: Add support for Krait clocks
clk: qcom: Add IPQ806X's HFPLLs
clk: qcom: Add MSM8960/APQ8064's HFPLLs
dt-bindings: clock: Document qcom,hfpll
clk: qcom: Add HFPLL driver
clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
ARM: Add Krait L2 register accessor functions
clk: imx6q: add mmdc0 ipg clock
clk: imx6sl: add mmdc ipg clocks
clk: imx6sll: add mmdc1 ipg clock
clk: imx6sx: add mmdc1 ipg clock
...
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:
struct foo {
int stuff;
void *entry[];
};
instance = kzalloc(sizeof(struct foo) + sizeof(void *) * count,
GFP_KERNEL);
Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:
instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL);
Notice that, currently, there is a bug during the allocation:
sizeof(npcm7xx_clk_data) should be sizeof(*npcm7xx_clk_data)
Fix this bug by using struct_size() in kzalloc()
This issue was detected with the help of Coccinelle.
Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Avi Fishman <avifishman70@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
In case of error, the function ioremap() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.
Fixes: fcfd143698 ("clk: npcm7xx: add clock controller")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
generates and supplies clocks to all modules within the BMC.
Signed-off-by: Tali Perry <tali.perry1@gmail.com>
[sboyd@kernel.org: Drop clk_get()s, cleanup whitespace, drop unused
includes, fix static checker warnings]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>