Samsung DTS ARM changes for v5.6
1. Couple ARM and wcore bus regulators on Exynos542x so higher
frequencies could be used with dynamic voltage and frequency scaling.
Enable this higher frequencies.
2. Correct the polarity of USB3503 hub GPIOs.
3. Adjust the bus frequencies (scaled with devfreq framework) on
Exynos5422 Odroid boards to match values possible to obtain from root
PLLs.
4. Add display to Tiny4412 board.
5. Cleanups and minor improvements.
* tag 'samsung-dt-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable FIMD node and add proper panel node to Tiny4412
ARM: dts: samsung: Rename Samsung and Exynos to lowercase
ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids
ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS
ARM: dts: exynos: Correct USB3503 GPIOs polarity
ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
ARM: dts: exynos: Add initial data for coupled regulators for Exynos5422/5800
ARM: dts: exynos: Remove syscon compatible from chipid node on Exynos5
Link: https://lore.kernel.org/r/20200110172334.4767-3-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Hardkernel's Odroid XU3/XU4/HC1 boards use bootloader, which configures
top PLLs to the following values: MPLL: 532MHz, CPLL: 666MHz and DPLL:
600MHz.
Adjust all bus related OPPs to the values that are possible to derive
from the top PLL configured by the bootloader. Also add a comment for
each bus describing which PLL is used for it.
The most significant change is the highest rate for wcore bus. It has
been increased to 532MHz as this is the value configured initially by
the bootloader. Also the voltage for this OPP is changed to match the
value set by the bootloader.
This patch finally allows the buses to operate on the rates matching the
values set for each OPP and fixes the following warnings observed on
boot:
exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
...
exynos-bus soc:bus_wcore: dev_pm_opp_set_rate: failed to find current OPP for freq 532000000 (-34)
exynos-bus soc:bus_noc: dev_pm_opp_set_rate: failed to find current OPP for freq 111000000 (-34)
exynos-bus soc:bus_fsys_apb: dev_pm_opp_set_rate: failed to find current OPP for freq 222000000 (-34)
The problem with setting incorrect (in some cases much lower) clock rate
for the defined OPP were there from the beginning, but went unnoticed
because the only way to observe it was to manually check the rate of the
respective clocks. The commit 4294a779bd ("PM / devfreq: exynos-bus:
Convert to use dev_pm_opp_set_rate()") finally revealed it, because it
enabled use of the generic code from the OPP framework, which issues the
above mentioned warnings.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Currently the only Exynos5422-based boards that support bus frequency
scaling are Hardkernel's Odroid XU3/XU4/HC1. Move the bus related OPPs
to the boards DTS, because those OPPs heavily depend on the clock
topology and top PLL rates, which are being configured by the board's
bootloader.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Declare Exynos5422/5800 voltage ranges for OPPs for big CPUs
(Cortex-A15) and wcore bus. Couple their voltage supplies as vdd_arm
and vdd_int should be in 300 mV range.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.konieczny: add missing patch description]
Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
1. Cleanup by adjusting DTS to bindings,
2. Add touch-sensitive buttons to Midas (Galaxy S III family phones),
3. Add GPU/Mali to Exynos542x and Odroid XU3/XU4 family.
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Merge tag 'samsung-dt-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.5, part 2
1. Cleanup by adjusting DTS to bindings,
2. Add touch-sensitive buttons to Midas (Galaxy S III family phones),
3. Add GPU/Mali to Exynos542x and Odroid XU3/XU4 family.
* tag 'samsung-dt-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add Mali/GPU node on Exynos5420 and enable it on Odroid XU3/4
ARM: dts: exynos: Add support for the touch-sensitive buttons on Midas family
ARM: dts: exynos: Rename children of SysRAM node to "sram"
Link: https://lore.kernel.org/r/20191119142026.7190-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device tree node for Mali GPU on Exynos 542x SoC family. GPU is
disabled by default, and is enabled for each board after the regulator
is defined. Tested on Odroid XU4.
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add description of Dynamic Memory Controller and PPMU counters to
Exynos5422 and Odroid XU3/XU4/HC1 boards. They are used by
exynos5422-dmc driver. There is a definition of the memory chip, which
is then used during calculation of timings for each OPP.
The algorithm in the driver needs these two sets to bound the timings.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The datasheet of S2MPS11 PMIC is slightly non-consistent in buck[78]
voltage regulators values.
1. The voltage tables for configuring their registers mention range of
voltages: 0.750 V to 3.55 V,
2. The constrains in electrical specifications say output voltage range
to be different (buck7: 1.2 V to 1.5 V, buck8: 1.8 V to 2.1 V).
Adjust the ranges to match the electrical specifications to stay on the
safe side. Also change the name of regulators to match reality. Anyway
these regulators stay at default value so this should not have effect.
Reported-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add the PMIC regulator suspend configuration to entire Odroid
XU3/XU4/HC1 family of boards to reduce power usage during suspend. The
configuration is based on vendor (Hardkernel) reference kernel with
additional buck9 suspend configuration (for USB hub suspend and proper
reset).
Energy consumption measurements from Marek Szyprowski during suspend to
RAM:
- all at 5 V power supply,
- before: next-20190620,
- after: next-20190620 + this patch + suspend configuration for s2mps11
regulator driver,
Board | before [mA] | after [mA] |
Odroid HC1 | 120 | 7-10 |
Odroid XU4, sdcard | 88 | 6-9 |
Odroid XU4, eMMC | 100 | 6-9 |
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
The eMMC memory on Odroid XU3/XU4 boards is supplied by two regulators
LDO18 and buck10 (and LDO13 for the host interface).
However the Odroid HC1 board does not have eMMC connector so this
regulator does not have to be always on.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The maximum voltage value for buck8 regulator on Odroid XU3/XU4 boards is
set too low. Increase it to the 2000mV as specified on the board schematic.
So far the board worked fine, because of the bug in the PMIC driver, which
used incorrect step value for that regulator. It interpreted the voltage
value set by the bootloader as 1225mV and kept it unchanged. The regulator
driver has been however fixed recently in the commit 56b5d4ea77
("regulator: s2mps11: Fix steps for buck7, buck8 and LDO35"), what results
in reading the proper buck8 value and forcing it to 1500mV on boot. This
is not enough for proper board operation and results in eMMC errors during
heavy IO traffic. Increasing maximum voltage value for buck8 restores
original driver behavior and fixes eMMC issues.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Fixes: 86a2d2ac5e ("ARM: dts: Add dts file for Odroid XU3 board")
Fixes: 56b5d4ea77 ("regulator: s2mps11: Fix steps for buck7, buck8 and LDO35")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Odroid HC1 uses the exynos5422-odroid-core.dtsi file as a base. All
other Exynos5422 Odroids use the "common". The ADC node was defined
only in the latter.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There are two common DTSI files for Exynos5422 Odroid XU3 family of
boards. One is shared between all of them (XU3, XU3-Lite, XU4 and HC1)
and the second skips HC1. Document this in the files.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add SD card write-protect pin configuration to be sure that it will be
properly pulled down to indicate write access.
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Set the SD max-frequency to 200MHz for optimal performance on Odroid
XU3/XU4/HC1 family of boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
From Odroid XU3/XU4/HC1 schematics the LDO13 regulator for SD2, can be
set on 1.8V or 2.8V so the minimal value should be fixed to 1.8V. This
is necessary to support UHS-I tuning (otherwise card won't be detected
during boot).
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add support for UHS-I bus speed tuning for SDR50, DDR50 and SDR104 to
Odroid XU3/XU4/HC1 family boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The bindings for s2mps11/s5m8767 clocks driver require a compatible for
clocks node. Parent MFD sec-core driver will also use it when
instantiating children.
The compatible is not needed for proper working because device will be
anyway created by parent MFD device. Add it for correctness.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The LDO28 is used only on Odroid XU3 for Display Port. Define it so DTS
will describe entire hardware.
Depending on bootloader behavior this might affect the Display Port
because none of drivers are enabling it. By default it is off in S2MPS11
PMIC reset values. However it could be enabled by bootloader so in such
case kernel will later disable it as unused regulator.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Disable unused PMIC regulators on Exynos5422 Odroid boards to reduce
energy used. According to schematics:
1. LDO12, LDO16 and LDO24 are not connected,
2. LDO26 is not used on Odroid HC1.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Define LDO2, LDO23 and LDO27 critical board regulators to describe the
hardware.
Suggested-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find arch/arm/boot/dts -type f \( -iname "*.dts" -o -iname "*.dtsi" \) -exec sed -i \
-e "s/@\([0-9a-fA-FxX\.;:#]\+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 \
{/g" -e "s/@0\+\(.\+\) {/@\1 {/g" {} +
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve also a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b737 ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
[krzk: Rerun the command to include few more changes, adjust the commit msg]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Looking at the schematic, LDO15 and LDO17 are tied as a power source of a
builtin network chipset. Correct voltage on LDO15 to 3.3V and the name
of LDO17 to "vdd_ldo17".
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI,
no eMMC, no built-in USB3.0 hub, no extension port pins, and no GPIO
button. USB3.0 ports are used for built-in JMicron USB to SATA bridge
and Gigabit R8152 ethernet chips. HC1 uses only passive cooling.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Olof Johansson
Marek Szyprowski
Marian Mihailescu
Lukasz Luba
Krzysztof Kozlowski
Anand Moon
Mathieu Malaterre
Dongjin Kim