* kconfig symbols defined in arch/arm/mach-s3c2440/Kconfig are only available
when ARCH_S3C2410 is selected, so no need to make some of them depend
on ARCH_S3C2410.
* fix CPU_S3C24405B typo in "config S3C2440_DMA".
* mini2440: remove unconditionally select of SND_S3C24XX_SOC_S3C24XX_UDA134X.
Those fixes avoid the following warnings at make time:
scripts/kconfig/qconf arch/arm/Kconfig
warning: (MACH_MINI2440 && ARCH_S3C2410) selects SND_S3C24XX_SOC_S3C24XX_UDA134X
which has unmet direct dependencies (SND_S3C24XX_SOC && ARCH_S3C2410)
warning: (CPU_S3C2440 && ARCH_S3C2410 && S3C2410_DMA) selects S3C2440_DMA which
has unmet direct dependencies (ARCH_S3C2410 && CPU_S3C24405B)
warning: (CPU_S3C2440 && ARCH_S3C2410 || CPU_S3C2442 && ARCH_S3C2410)
selects CPU_S3C244X which has unmet direct dependencies (!ARCH_S3C2410)
Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
If the board has a debug uart the user is given a choice of which
uart to use. The user can also select NONE, which means not to use one.
In most of our header files when NONE is selected nothing is defined
for MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile
failure in debug-macro.S which expect something to be defined there.
Example of the failure,
arch/arm/kernel/built-in.o: In function `hexbuf':
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS'
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE'
This fixes the compile failure by adding an ifdef to debug-macro.S
that removes all the debug uart code in the case of NONE.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Originally there was an ifdef case to handle when no debug uart
was selected. In commit 0ea1293009
that case was removed which causes the following build failure,
linux-2.6/arch/arm/kernel/debug.S: Assembler messages:
linux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2'
linux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3'
linux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2'
This is a partial revert to add back the case which was removed with
two caveats. First the API for the addruart macro was updated, and
the new addruart case now return 0xfff00000 so that a know IO mapping
is created instead of a random one.
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Wang <jason77.wang@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
On i386 (not x86_64) early implementations of gcc would have a bug
with asm goto causing it to produce code like the following:
(This was noticed by Peter Zijlstra)
56 pushl 0
67 nopl jmp 0x6f
popl
jmp 0x8c
6f mov
test
je 0x8c
8c mov
call *(%esp)
The jump added in the asm goto skipped over the popl that matched
the pushl 0, which lead up to a quick crash of the system when
the jump was enabled. The nopl is defined in the asm goto () statement
and when tracepoints are enabled, the nop changes to a jump to the label
that was specified by the asm goto. asm goto is suppose to tell gcc that
the code in the asm might jump to an external label. Here gcc obviously
fails to make that work.
The bug report for gcc is here:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46226
The bug only appears on x86 when not compiled with
-maccumulate-outgoing-args. This option is always set on x86_64 and it
is also the work around for a function graph tracer i386 bug.
(See commit: 746357d6a5)
This explains why the bug only showed up on i386 when function graph
tracer was not enabled.
This patch now adds a CONFIG_JUMP_LABEL option that is default
off instead of using jump labels by default. When jump labels are
enabled, the -maccumulate-outgoing-args will be used (causing a
slightly larger kernel image on i386). This option will exist
until we have a way to detect if the gcc compiler in use is safe
to use on all configurations without the work around.
Note, there exists such a test, but for now we will keep the enabling
of jump label as a manual option.
Archs that know the compiler is safe with asm goto, may choose to
select JUMP_LABEL and enable it by default.
Reported-by: Ingo Molnar <mingo@elte.hu>
Cause-discovered-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Baron <jbaron@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: David Miller <davem@davemloft.net>
Cc: Richard Henderson <rth@redhat.com>
LKML-Reference: <1288028746.3673.11.camel@laptop>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
commit 534af1082329392bc29f6badf815e69ae2ae0f4c(kgdb,kdb: individual
register set and and get API) introduce dbg_get_reg/dbg_set_reg API
for individual register get and set.
This patch implement those APIs for ppc.
Signed-off-by: Dongdong Deng <dongdong.deng@windriver.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
The kgdb_disable_hw_debug() was an architecture specific function for
disabling all hardware breakpoints on a per cpu basis when entering
the debug core.
This patch will remove the weak function kdbg_disable_hw_debug() and
change it into a call back which lives with the rest of hw breakpoint
call backs in struct kgdb_arch.
Signed-off-by: Dongdong Deng <dongdong.deng@windriver.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
DBG_MAX_REG_NUM incorrectly had the number of indices in the GDB regs
array rather than the number of registers, leading to an oops when the
"rd" command is used in KDB.
Cc: stable@kernel.org
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (46 commits)
ftrace/MIPS: Enable C Version of recordmcount
ftrace/MIPS: Add module support for C version of recordmcount
ftrace/MIPS: Add MIPS64 support for C version of recordmcount
MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.
MIPS: Allow UserLocal on MIPS_R1 processors
MIPS: Honor L2 bypass bit
MIPS: Add BMIPS CP0 register definitions
MIPS: Add BMIPS processor types to Kconfig
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
MIPS: Add support for hardware performance events (mipsxx)
MIPS: Perf-events: Add callchain support
MIPS: add support for hardware performance events (skeleton)
MIPS: add support for software performance events
MIPS: define local_xchg from xchg_local to atomic_long_xchg
MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant
MIPS: AR7: Initialize GPIO earlier
MIPS: Add platform device and Kconfig for Octeon USB EHCI / OHCI
USB: Add EHCI and OHCH glue for OCTEON II SOCs.
MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.
MIPS: Octeon: Apply CN63XXP1 errata workarounds.
...
Selects HAVE_C_RECORDMCOUNT to use the C version of the recordmcount
intead of the old Perl Version of recordmcount.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
LKML-Reference: <bb99009a9ac79d3f55a8c8bf1c8bd2bc0e1f160e.1288176026.git.wuzhangjin@gmail.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The TASK_SIZE macro should reflect the size of a user process virtual
address space. Previously for 64-bit kernels, this was not the case.
The immediate cause of pain was in
hugetlbfs/inode.c:hugetlb_get_unmapped_area() where 32-bit processes
trying to mmap a huge page would be served a page with an address
outside of the 32-bit address range. But there are other uses of
TASK_SIZE in the kernel as well that would like an accurate value.
The new definition is nice because it now makes TASK_SIZE and
TASK_SIZE_OF() yield the same value for any given process.
For 32-bit kernels there should be no change, although I did factor
out some code in asm/processor.h that became identical for the 32-bit and
64-bit cases.
__UA_LIMIT is now set to ~((1 << SEGBITS) - 1) for 64-bit kernels.
This should eliminate the possibility of getting a
AddressErrorException in the kernel for addresses that pass the
access_ok() test.
With the patch applied, I can still run o32, n32 and n64 processes,
and have an o32 shell fork/exec both n32 and n64 processes.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1701/
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates
that the L2 cache is disabled and therefore Linux should not attempt
to use it.
[Ralf: Moved the code added by Kevin's original patch into a separate
function that can easily be replaced for platforms that need more a
different probe.]
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org>
Cc: <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/1723/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
BMIPS processor cores are used in 50+ different chipsets spread across
5+ product lines. In many cases the chipsets do not share the same
peripheral register layouts, the same register blocks, the same
interrupt controllers, the same memory maps, or much of anything else.
But, across radically different SoCs that share nothing more than the
same BMIPS CPU, a few things are still mostly constant:
SMP operations
Access to performance counters
DMA cache coherency quirks
Cache and memory bus configuration
So, it makes sense to treat each BMIPS processor type as a generic
"building block," rather than tying it to a specific SoC. This makes it
easier to support a large number of BMIPS-based chipsets without
unnecessary duplication of code, and provides the infrastructure needed
to support BMIPS-proprietary features.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Florian Fainelli <ffainelli@freebox.fr>
Patchwork: https://patchwork.linux-mips.org/patch/1706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org
This patch adds the mipsxx Perf-events support based on the skeleton.
Generic hardware events and cache events are now fully implemented for
the 24K/34K/74K/1004K cores. To support other cores in mipsxx (such as
R10000/SB1), the generic hardware event tables and cache event tables
need to be filled out. To support other CPUs which have different PMU
than mipsxx, such as RM9000 and LOONGSON2, the additional files
perf_event_$cpu.c need to be created.
Raw event is an important part of Perf-events. It helps the user collect
performance data for events that are not listed as the generic hardware
events and cache events but ARE supported by the CPU's PMU.
This patch also adds this feature for mipsxx 24K/34K/74K/1004K. For how to
use it, please refer to processor core software user's manual and the
comments for mipsxx_pmu_map_raw_event() for more details.
Please note that this is a "precise" implementation, which means the
kernel will check whether the requested raw events are supported by this
CPU and which hardware counters can be assigned for them.
To test the functionality of Perf-event, you may want to compile the tool
"perf" for your MIPS platform. You can refer to the following URL:
http://www.linux-mips.org/archives/linux-mips/2010-10/msg00126.html
You also need to customize the CFLAGS and LDFLAGS in tools/perf/Makefile
for your libs, includes, etc.
In case you encounter the boot failure in SMVP kernel on multi-threading
CPUs, you may take a look at:
http://www.linux-mips.org/git?p=linux-mti.git;a=commitdiff;h=5460815027d802697b879644c74f0e8365254020
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Cc: ddaney@caviumnetworks.com
Cc: matt@console-pimps.org
Patchwork: https://patchwork.linux-mips.org/patch/1689/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/kernel/perf_event_mipsxx.c
This patch provides the skeleton of the HW perf event support. To enable
this feature, we can not choose the SMTC kernel; Oprofile should be
disabled; kernel performance events be selected. Then we can enable it in
Kernel type menu.
Oprofile for MIPS platforms initializes irq at arch init time. Currently
we do not change this logic to allow PMU reservation.
If a platform has EIC, we can use the irq base and perf counter irq offset
defines for the interrupt controller in specific init_hw_perf_events().
Based on this skeleton patch, the 3 different kinds of MIPS PMU, namely,
mipsxx/loongson2/rm9000, can be supported by adding corresponding lower
level C files at the bottom. The suggested names of these files are
perf_event_mipsxx.c/perf_event_loongson2.c/perf_event_rm9000.c. So, for
example, we can do this by adding "#include perf_event_mipsxx.c" at the
bottom of perf_event.c.
In addition, PMUs with 64bit counters are also considered in this patch.
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Cc: ddaney@caviumnetworks.com
Cc: matt@console-pimps.org
Patchwork: https://patchwork.linux-mips.org/patch/1688/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Software events are required as part of the measurable stuff by the
Linux performance counter subsystem. Here is the list of events added by
this patch:
PERF_COUNT_SW_PAGE_FAULTS
PERF_COUNT_SW_PAGE_FAULTS_MIN
PERF_COUNT_SW_PAGE_FAULTS_MAJ
PERF_COUNT_SW_ALIGNMENT_FAULTS
PERF_COUNT_SW_EMULATION_FAULTS
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Acked-by: David Daney <ddaney@caviumnetworks.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Patchwork: https://patchwork.linux-mips.org/patch/1686/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add support for Titan TNETV1050,1055,1056,1060 variants. This SoC is almost
completely identical to AR7 except on a few points:
- a second bank of gpios is available
- vlynq0 on titan is vlynq1 on ar7
- different PHY addresses for cpmac0
This SoC can be found on commercial products like the Linksys WRTP54G
Original patch by Xin with improvments by Florian.
Signed-off-by: Xin Zhen <xlonestar2000@aim.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/1563/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
In order to detect the Titan variant, we must initialize GPIOs earlier since
detection relies on some GPIO values to be set.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/1562/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
The EHCI and OHCI blocks connection to the I/O bus is controlled by
these registers.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-usb@vger.kernel.org
To: dbrownell@users.sourceforge.net
Patchwork: http://patchwork.linux-mips.org/patch/1674/
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.
All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.
The write buffer threshold is reduced to 4.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The I2C and UARTS are clocked by the I/O clock, use its rate for these
devices.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Starting with cn63xx Octeon I/O blocks are clocked at a different rate
than the CPU. Add a new function octeon_get_io_clock_rate() that
yields the I/O clock rate.
Also rearrange octeon_get_clock_rate() to get the value from the saved
sysinfo structure.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
We can run with any simulator clock rate. Get rid of the code
overriding it to 6MHz.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1669/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The per-CPU clocks are synchronized from IPD_CLK_COUNT, on cn63XX it must
be scaled by the clock frequency ratio.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1667/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The OCTEON II ISA extends the original OCTEON ISA, so give it its own
__elf_platform string so optimized libraries can be selected in
userspace.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1665/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The CN63XX has a different L2 cache architecture. Update the helper
functions to reflect this.
Some joining of split lines was also done to improve readability, as
well as reformatting of comments.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1663/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.
Join some lines back together. This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon
PCI is setup, even some configurations with less than 4GB of RAM will have
portions that are not accessible from 32-bit devices.
Enable the swiotlb code to handle the cases where a device cannot directly
do DMA. This is a complete rewrite of the Octeon DMA mapping code.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1639/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This allows platforms that are using the swiotlb to initialize it.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Use asm-generic/dma-mapping-common.h to handle all DMA mapping operations
and establish a default get_dma_ops() that forwards all operations to the
existing code.
Augment dev_archdata to carry a pointer to the struct dma_map_ops, allowing
DMA operations to be overridden on a per device basis. Currently this is
never filled in, so the default dma_map_ops are used. A follow-on patch
sets this for Octeon PCI devices.
Also initialize the dma_debug system as it is now used if it is configured.
Includes fixes by Kevin Cernekee <cernekee@gmail.com>.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1637/
Patchwork: http://patchwork.linux-mips.org/patch/1678/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Any function defined in a header file should be inline. This helps us
avoid 'unused' compiler warnings when we include the files in more
places in subsequent patches.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1636/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Give us a nice place to allocate coherent DMA memory for 32-bit devices.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
On OCTEON, we reserve the last 256MB of 32-bit PCI address space, mapping
the RAM in this region at a high DMA address. This makes memory in this
region unavailable for 32-bit DMA.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
DMA mapping may reduce the usable physical address range usable for
32-bit DMA.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1633/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This allows follow-on patches to dma mapping functions to work with
the octeon mgmt device..
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1632/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It was a nice optimization - on paper at least. In practice it results in
branches that may exceed the maximum legal range for a branch. We can
fight that problem with -ffunction-sections but -ffunction-sections again
is incompatible with -pg used by the function tracer.
By rewriting the loop around all simple LL/SC blocks to C we reduce the
amount of inline assembler and at the same time allow GCC to often fill
the branch delay slots with something sensible or whatever else clever
optimization it may have up in its sleeve.
With this optimization gone we also no longer need -ffunction-sections,
so drop it.
This optimization was originally introduced in 2.6.21, commit
5999eca25c1fd4b9b9aca7833b04d10fe4bc877d (linux-mips.org) rsp.
f65e4fa8e0 (kernel.org).
Original fix for the issues which caused me to pull this optimization by
Paul Gortmaker <paul.gortmaker@windriver.com>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Always use a safe 5-byte noop sequence. Drop the trap test, since it
is known to return false negatives on some virtualization platforms on
32 bits. The resulting code is both simpler and safer.
Cc: Daniel Drake <dsd@laptop.org>
Cc: Jason Baron <jbaron@redhat.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
The vmlinux.lds.h knobs to emit the __jump_table section in the main
kernel image takes care to align the section, but this doesn't help
for the __jump_table section that gets emitted into modules.
Fix the resulting lack of section alignment by explicitly specifying
it in the assembler.
Signed-off-by: David S. Miller <davem@davemloft.net>
LKML-Reference: <20101023.110624.226758370.davem@davemloft.net>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6:
[S390] fix kprobes single stepping
[S390] tape: fix dbf usage
[S390] dasd: provide a Sense Path Group ID ioctl
[S390] ftrace: select HAVE_C_RECORDMCOUNT
[S390] vdso: get rid of redefinition warnings
[S390] facility detection: remove unused variable
[S390] hypfs: Fix error handling in hypfs_diag initialization
[S390] topology: fix cpu masks for topology=off case
[S390] topology: add SCHED_MC config option
[S390] Kconfig: add machine type number to code generation options
[S390] Add z196 machine type to setup_hwcaps
Fix kprobes after git commit 1e54622e04
broke it. The kprobe_handler is now called with interrupts in the state
at the time of the breakpoint. The single step of the replaced instruction
is done with interrupts off which makes it necessary to enable and disable
the interupts in the kprobes code.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The BIODASDSNID ioctl executes a 'Sense Path Group ID'
command on a DASD ECKD device. The returned path group data
allows user space programs to determine path state and
path group ID of the channel paths to the device.
Signed-off-by: Stefan Weinhuber <wein@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Select HAVE_C_RECORDMCOUNT for the fast C version of recordmcount.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The CLOCK_* defines in asm-offsets.c are only used for the vdso code
however in the meantime they cause other trouble.
Just rename them to get permanently rid of this:
In file included from /home2/heicarst/linux-2.6/arch/s390/include/asm/asm-offsets.h:1:0,
from arch/s390/mm/fault.c:33:
include/generated/asm-offsets.h:53:0: warning: "CLOCK_REALTIME" redefined
include/linux/time.h:286:0: note: this is the location of the previous definition
include/generated/asm-offsets.h:54:0: warning: "CLOCK_MONOTONIC" redefined
include/linux/time.h:287:0: note: this is the location of the previous definition
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Fix the following two error handling bugs in hypfs_diag_init():
* No need for calling diag204_free_buffer()
* Initialize name table only in case of LPAR and prevent error message
on non-LPAR systems.
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Fix cpu masks for 'topology=off' case. Folding of the scheduling domains
happen in such a way that everything belongs to the MC domain instead
of the CPU doimain.
This should fix a performance regression introduced with
eafd2b6d "[S390] topology: use default MC domain initializer" and also
makes sure we have the same behavious as if CONFIG_SCHED_MC was not
selected at all.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This allows us to easily check for performance differences seen with
!CONFIG_SCHED_MC and topology=off.
Actually there shouldn't be any (besides a small overhead because of
additional code).
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Add machine type number to code generation options. Also clean up and
shorten quite a lot of help texts with respect to machine type and
architecture terminology.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Add machine type for zEnterprise 196 to elf platform detection.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
MRSHPC is wholly unused here, no need to trap it specially. If support is
added in the future it can be taken care of via platform data like on the
others.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The only reason this board needs to do PIO trapping is for ethernet,
which happens to follow the same scheme as its bigger brother the
edosk7760. With ethernet properly supported through the platform device,
we can kill off the left over PIO abortion.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The PIO trapping was only for MRSHPC and the SMC ethernet. Given that the
SMC ethernet is already properly handled and that nothing is using the
MRSHPC, none of this is needed.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This code has been untouched since it was merged many years ago, and has
severely bitrotted since, suggesting that the board has no real users
left. Notice of intent to remove has been sent out over the last few
years, with no takers. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Only the secureedge5410 was ever supported by this code, so make the
board specification explicit rather than perpetuating a mach group.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
None of these PIO routines do anything other than basic error checking,
get rid of them and use the generic fallbacks.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The microdev only has to contend with silly PIO mangling on anything
within the SuperIO range. As each of the SuperIO modules is already
speciail cased, we just shift that logic over to the ioport map.
With microdev PCI never being merged (and being fudamentally broken in
hardware), and the ethernet chip only doing 16-bit accesses already,
there's no need to maintain any of the extra special casing. Kill it all
off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Commit 22d4cd4c4d ("Allocate irq stacks seperate from percpu
area") removed NUMA affinity of IRQ stacks as side-effect of
the fix.
Using alloc_pages_node() instead of __get_free_pages() is safe,
even if the target node has no available LOWMEM pages :
alloc_pages_node() fallbacks to another node.
Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: Brian Gerst <brgerst@gmail.com>
Cc: tj@kernel.org
Cc: torvalds@linux-foundation.org
Cc: Peter Zijlstra <peterz@infradead.org>
LKML-Reference: <1288276854.2649.607.camel@edumazet-laptop>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Enable Westmere support for all APIC modes on SGI UV.
Signed-off-by: Russ Anderson <rja@sgi.com>
LKML-Reference: <20101028224132.GB15804@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
and branch 'for-linus' of git://xenbits.xen.org/people/sstabellini/linux-pvhvm
* 'for-linus' of git://xenbits.xen.org/people/sstabellini/linux-pvhvm:
xen: register xen pci notifier
xen: initialize cpu masks for pv guests in xen_smp_init
xen: add a missing #include to arch/x86/pci/xen.c
xen: mask the MTRR feature from the cpuid
xen: make hvc_xen console work for dom0.
xen: add the direct mapping area for ISA bus access
xen: Initialize xenbus for dom0.
xen: use vcpu_ops to setup cpu masks
xen: map a dummy page for local apic and ioapic in xen_set_fixmap
xen: remap MSIs into pirqs when running as initial domain
xen: remap GSIs as pirqs when running as initial domain
xen: introduce XEN_DOM0 as a silent option
xen: map MSIs into pirqs
xen: support GSI -> pirq remapping in PV on HVM guests
xen: add xen hvm acpi_register_gsi variant
acpi: use indirect call to register gsi in different modes
xen: implement xen_hvm_register_pirq
xen: get the maximum number of pirqs from xen
xen: support pirq != irq
* 'stable/xen-pcifront-0.8.2' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: (27 commits)
X86/PCI: Remove the dependency on isapnp_disable.
xen: Update Makefile with CONFIG_BLOCK dependency for biomerge.c
MAINTAINERS: Add myself to the Xen Hypervisor Interface and remove Chris Wright.
x86: xen: Sanitse irq handling (part two)
swiotlb-xen: On x86-32 builts, select SWIOTLB instead of depending on it.
MAINTAINERS: Add myself for Xen PCI and Xen SWIOTLB maintainer.
xen/pci: Request ACS when Xen-SWIOTLB is activated.
xen-pcifront: Xen PCI frontend driver.
xenbus: prevent warnings on unhandled enumeration values
xenbus: Xen paravirtualised PCI hotplug support.
xen/x86/PCI: Add support for the Xen PCI subsystem
x86: Introduce x86_msi_ops
msi: Introduce default_[teardown|setup]_msi_irqs with fallback.
x86/PCI: Export pci_walk_bus function.
x86/PCI: make sure _PAGE_IOMAP it set on pci mappings
x86/PCI: Clean up pci_cache_line_size
xen: fix shared irq device passthrough
xen: Provide a variant of xen_poll_irq with timeout.
xen: Find an unbound irq number in reverse order (high to low).
xen: statically initialize cpu_evtchn_mask_p
...
Fix up trivial conflicts in drivers/pci/Makefile
* 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (38 commits)
kbuild: convert `arch/tile' to the kconfig mainmenu upgrade
README: cite nconfig
Revert "kconfig: Temporarily disable dependency warnings"
kconfig: Use PATH_MAX instead of 128 for path buffer sizes.
kconfig: Fix realloc usage()
kconfig: Propagate const
kconfig: Don't go out from read config loop when you read new symbol
kconfig: fix menuconfig on debian lenny
kbuild: migrate all arch to the kconfig mainmenu upgrade
kconfig: expand file names
kconfig: use the file's name of sourced file
kconfig: constify file name
kconfig: don't emit warning upon rootmenu's prompt redefinition
kconfig: replace KERNELVERSION usage by the mainmenu's prompt
kconfig: delay gconf window initialization
kconfig: expand by default the rootmenu's prompt
kconfig: add a symbol string expansion helper
kconfig: regen parser
kconfig: implement the `mainmenu' directive
kconfig: allow PACKAGE to be defined on the compiler's command-line
...
Fix up trivial conflict in arch/mn10300/Kconfig
Xen can reserve huge amounts of memory for pre-ballooning, but that
still shows as RAM in the e820 memory map. early_node_mem could not
find range because of start/end adjusting, and will go through the
fallback path. However, the fallback patch is still using
memblock_x86_find_range_node(), and it is partially top-down because
it go through active_range entries from low to high.
Let's use memblock_find_in_range instead memblock_x86_find_range_node.
So get real top down in fallback path.
We may still need to make memblock_x86_find_range_node to do overall
top_down work.
Reported-by: Jeremy Fitzhardinge <jeremy@goop.org>
Tested-by: Jeremy Fitzhardinge <jeremy@goop.org>
Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4CC9A9C9.8020700@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030. This functionality was introduced in mfd tree on
track to kernel.org
Sync pandaboard to the same and make mmc work.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
In preparation for the addition of SPI support for the WM831x move the I2C
specific code into a separate file with a separate Kconfig option so the
I2C support can be excluded from the build.
Also update the 1133-EV1 PMIC module support for SMDK6410 to use the new
symbol.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Adding card detect callback function and card detect configuration
function for MMC1 Controller on OMAP4.
Card detect configuration function does initial configuration of the
MMC Control & PullUp-PullDown registers of Phoenix.
For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030.
Since OMAP4 doesn't use any GPIO line as used in OMAP3 for card detect,
the suspend/resume initialization which was done in omap_hsmmc_gpio_init
previously is moved to the probe thus making it generic for both OMAP3 &
OMAP4.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
On AP4EVB the card detect pin of the top SD/MMC slot is not directly
connected to the tmio/mmcif controller but to a GPIO pin, so polling
needs to be done for SDHI1 and MMCIF in order to support hotplug for
that slot. SHDI1 and MMCIF share that slot, and the used controller
is selected by a DIP switch.
This patch adds a helper function to check if a card is present in that
particular slot, registers this function with SDHI1 and MMCIF and enables
polling for SDHI1.
Signed-off-by: Arnd Hannemann <arnd@arndnet.de>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (27 commits)
x86: allocate space within a region top-down
x86: update iomem_resource end based on CPU physical address capabilities
x86/PCI: allocate space from the end of a region, not the beginning
PCI: allocate bus resources from the top down
resources: support allocating space within a region from the top down
resources: handle overflow when aligning start of available area
resources: ensure callback doesn't allocate outside available space
resources: factor out resource_clip() to simplify find_resource()
resources: add a default alignf to simplify find_resource()
x86/PCI: MMCONFIG: fix region end calculation
PCI: Add support for polling PME state on suspended legacy PCI devices
PCI: Export some PCI PM functionality
PCI: fix message typo
PCI: log vendor/device ID always
PCI: update Intel chipset names and defines
PCI: use new ccflags variable in Makefile
PCI: add PCI_MSIX_TABLE/PBA defines
PCI: add PCI vendor id for STmicroelectronics
x86/PCI: irq and pci_ids patch for Intel Patsburg DeviceIDs
PCI: OLPC: Only enable PCI configuration type override on XO-1
...
This merges the staging-next tree to Linus's tree and resolves
some conflicts that were present due to changes in other trees that were
affected by files here.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (505 commits)
[media] af9015: Fix max I2C message size when used with tda18271
[media] IR: initialize ir_raw_event in few more drivers
[media] Guard a divide in v4l1 compat layer
[media] imon: fix nomouse modprobe option
[media] imon: remove redundant change_protocol call
[media] imon: fix my egregious brown paper bag w/rdev/idev split
[media] cafe_ccic: Configure ov7670 correctly
[media] ov7670: allow configuration of image size, clock speed, and I/O method
[media] af9015: support for DigitalNow TinyTwin v3 [1f4d:9016]
[media] af9015: map DigitalNow TinyTwin v2 remote
[media] DigitalNow TinyTwin remote controller
[media] af9015: RC fixes and improvements
videodev2.h.xml: Update to reflect the latest changes at videodev2.h
[media] v4l: document new Bayer and monochrome pixel formats
[media] DocBook/v4l: Add missing formats used on gspca cpia1 and sn9c2028
[media] firedtv: add parameter to fake ca_system_ids in CA_INFO
[media] tm6000: fix a macro coding style issue
tm6000: Remove some ugly debug code
[media] Nova-S-Plus audio line input
[media] [RFC,1/1] V4L2: Use new CAP bits in existing RDS capable drivers
...
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (66 commits)
mmc: add new sdhci-pxa driver for Marvell SoCs
mmc: make number of mmcblk minors configurable
mmc_spi: Recover from CRC errors for r/w operation over SPI.
mmc: sdhci-pltfm: add -pltfm driver for imx35/51
mmc: sdhci-of-esdhc: factor out common stuff
mmc: sdhci_pltfm: pass more data on custom init call
mmc: sdhci: introduce get_ro private write-protect hook
mmc: sdhci-pltfm: move .h file into appropriate subdir
mmc: sdhci-pltfm: Add structure for host-specific data
mmc: fix cb710 kconfig dependency warning
mmc: cb710: remove debugging printk (info duplicated from mmc-core)
mmc: cb710: clear irq handler on init() error path
mmc: cb710: remove unnecessary msleep()
mmc: cb710: implement get_cd() callback
mmc: cb710: partially demystify clock selection
mmc: add a file to debugfs for changing host clock at runtime
mmc: sdhci: allow for eMMC 74 clock generation by controller
mmc: sdhci: highspeed: check for mmc as well as sd cards
mmc: sdhci: Add Moorestown device support
mmc: sdhci: Intel Medfield support
...
Commit 3e4d3af501 ("mm: stack based kmap_atomic()") overlooked the
fact that parisc uses kmap as a coherence mechanism, so even though we
have no highmem, we do need to supply our own versions of kmap (and
atomic). This patch converts the parisc kmap to the form which is
needed to keep it compiling (it's a simple prototype and name change).
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Acked-by: Kyle McMartin <kyle@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Use memblock information to setup lowmem mappings rather than the
membank array.
This allows platforms to manipulate the memblock information during
initialization to reserve (and remove) memory from the kernel's view
of memory - and thus allowing platforms to setup their own private
mappings for this memory without causing problems with multiple
aliasing mappings:
size = min(size, SZ_2M);
base = memblock_alloc(size, min(align, SZ_2M));
memblock_free(base, size);
memblock_remove(base, size);
This is needed because multiple mappings of regions with differing
attributes (sharability, type, cache) are not permitted with ARMv6
and above.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>