In addition to consolidating the or1k-pic with other interrupt
controllers, this makes OpenRISC less tied to its on-cpu
interrupt controller.
All or1k-pic specific parts are moved out of irq.c and into
drivers/irqchip/irq-or1k-pic.c
In that transition, the functionality have been divided into
three chip variants.
One that handles level triggered interrupts, one that handles edge
triggered interrupts and one that handles the interrupt
controller that is present in the or1200 OpenRISC cpu
implementation.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Link: https://lkml.kernel.org/r/1401136302-27654-1-git-send-email-stefan.kristiansson@saunalahti.fi
Acked-by: Jonas Bonn <jonas@southpole.se>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that IRQ domains are in use, we should be acting on domain-local
IRQ numbers (hwirq) instead of 'global' ones.
Signed-off-by: Jonas Bonn <jonas@southpole.se>
This moves OpenRISC to using the irqdomain infrastructure. This doesn't
fundamentally change anything other than that it will be easier to have
multiple interrupt controllers in the future.
Signed-off-by: Jonas Bonn <jonas@southpole.se>
This patch adds support for the OpenRISC PIC.
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Stefan Kristiansson
Gong Tao
Jonas Bonn