Граф коммитов

8 Коммитов

Автор SHA1 Сообщение Дата
Wei Yongjun fbe359f12c clk: sunxi: Fix return value check in sun8i_a23_mbus_setup()
In case of error, the function of_io_request_and_map() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should be
replaced with IS_ERR().

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-08 19:27:33 +02:00
Stephen Boyd 1295e36a48 clk: sunxi: Remove use of variable length array
Using an array allocated on the stack may lead to stack overflows
and other problems so let's move the allocation to the heap
instead. This silences the following checker warning as well.

drivers/clk/sunxi/clk-sun8i-mbus.c:36:29: warning: Variable length array is used

Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-15 15:15:27 -07:00
Chen-Yu Tsai 8f2bf2ad96 clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
sun8i-a23-mbus-clk used sunxi's factors clk, which is nice for very
complicated clocks, but is not really needed here.

Convert sun8i-a23-mbus-clk to use clk_composite, as it is a gate + mux
+ divider. This makes the code easier to understand.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-29 11:30:29 +01:00
Chen-Yu Tsai cfa6368860 clk: sunxi: factors: Consolidate get_factors parameters into a struct
The .get_factors callback of factors_clk has 6 parameters. To extend
factors_clk in any way that requires adding parameters to .get_factors
would make that list even longer, not to mention changing all the
function declarations.

Do this once now and consolidate all the parameters into a struct.
Also drop the space before function pointer arguments, since checkpatch
complains.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27 18:57:37 +01:00
Stephen Boyd 9dfefe8c76 clk: sunxi: Include clk.h and remove unused clkdev.h includes
This clock provider uses the consumer API, so include clk.h
explicitly. Also remove clkdev.h in files that aren't using it
and include slab.h when clkdev.h was being used to implicitly
include it.

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:26 -07:00
Hans de Goede 7c74c220e9 clk: sunxi: Give sunxi_factors_register a registers parameter
Before this commit sunxi_factors_register uses of_iomap(node, 0) to get
the clk registers. The sun6i prcm has factor clocks, for which we want to
use sunxi_factors_register, but of_iomap(node, 0) does not work for the prcm
factor clocks, because the prcm uses the mfd framework, so the registers
are not part of the dt-node, instead they are added to the platform_device,
as platform_device resources.

This commit makes getting the registers the callers duty, so that
sunxi_factors_register can be used with mfd instantiated platform device too.

While at it also add error checking to the of_iomap calls.

This commit also drops the __init function from sunxi_factors_register since
platform driver probe functions are not __init.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-12-21 23:51:37 +01:00
Chen-Yu Tsai e94f8cb32d clk: sunxi: make factors clock mux mask configurable
Some of the factors-style clocks on the A80 have different widths
for the mux values in the registers.

Add a .muxmask field to clk_factors_config to make it configurable.
Passing a bitmask instead of a width parameter will allow reuse
in case we support table-based muxes in the future.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-21 21:40:56 +02:00
Chen-Yu Tsai 9c8176bfb6 clk: sunxi: Add sun8i MBUS clock support
The MBUS clock on sun8i is slightly different from the old mod0 clocks.
The divider is 3 bits wider, while also needing a divider table for the
higher 4 values, which all set the same divider.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-09-27 09:05:43 +02:00