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9087 Коммитов

Автор SHA1 Сообщение Дата
Paul Cercueil ecfb9f4047 clk: ingenic: jz4760: Update M/N/OD calculation algorithm
The previous algorithm was pretty broken.

- The inner loop had a '(m > m_max)' condition, and the value of 'm'
  would increase in each iteration;

- Each iteration would actually multiply 'm' by two, so it is not needed
  to re-compute the whole equation at each iteration;

- It would loop until (m & 1) == 0, which means it would loop at most
  once.

- The outer loop would divide the 'n' value by two at the end of each
  iteration. This meant that for a 12 MHz parent clock and a 1.2 GHz
  requested clock, it would first try n=12, then n=6, then n=3, then
  n=1, none of which would work; the only valid value is n=2 in this
  case.

Simplify this algorithm with a single for loop, which decrements 'n'
after each iteration, addressing all of the above problems.

Fixes: bdbfc02937 ("clk: ingenic: Add support for the JZ4760")
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20221214123704.7305-1-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-01-25 16:08:27 -08:00
Geert Uytterhoeven 86d884f528 clk: microchip: mpfs-ccc: Use devm_kasprintf() for allocating formatted strings
In various places, string buffers of a fixed size are allocated, and
filled using snprintf() with the same fixed size, which is error-prone.

Replace this by calling devm_kasprintf() instead, which always uses the
appropriate size.

While at it, remove an unneeded intermediate variable, which allows us
to drop a cast as a bonus.

With the initial behavior it would have been possible to have a device tree
with a node address that would make "ccc<node_address>_pll<N>" exceed
18 characters. If that happened, the <N> would be cut off & both
pll 0 & 1 would be named identically. If that happens, pll1 would fail
to register. Thus, the fixes tag has been added to this commit.

Fixes: d39fb17276 ("clk: microchip: add PolarFire SoC fabric clock support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
[claudiu.beznea: added the rationale behind fixes tag]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/f904fd28b2087d1463ea65f059924e3b1acc193c.1672764239.git.geert+renesas@glider.be
2023-01-19 11:45:35 +02:00
Linus Torvalds 0015edd6f6 A pile of clk driver updates with a small tracepoint patch to the clk core this
time around. The core framework is effectively unchanged, with the majority of
 the diff going to the Qualcomm clk driver directory because they added two 3k
 line files that are almost all clk data (Abel Vesa from Linaro tried to shrink
 the number of lines down, but it doesn't seem to be possible without
 sacrificing readability). The second big driver this time around is the
 Rockchip rk3588 clk and reset unit, at _only_ 2.5k lines.
 
 Ignoring the big clk drivers from the familiar SoC vendors, there's just a
 bunch of little clk driver updates and fixes throughout here. It's the usual
 set of clk data fixups to describe proper parents, or add frequencies to
 frequency tables, or plug memory leaks when function calls fail. Also, some
 drivers are converted to use modern clk_hw APIs, which is always nice to see.
 And data is deduplicated, leading to a smaller kernel Image. Overall this batch
 has a larger collection of cleanups than it typically does. Maybe that means
 there are less new SoCs right now that need supporting, and the focus has
 shifted to quality and reliability. I can dream.
 
 New Drivers:
  - Frequency hopping controller hardware on MediaTek MT8186
  - Global clock controller for Qualcomm SM8550
  - Display clock controller for Qualcomm SC8280XP
  - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
  - CPU PLL on MStar/SigmaStar SoCs
  - Support for the clock and reset unit of the Rockchip rk3588
 
 Updates:
  - Tracepoints for clk_rate_request structures
  - Debugfs support for fractional divider clk
  - Make MxL's CGU driver secure compatible
  - Ingenic JZ4755 SoC clk support
  - Support audio clks on X1000 SoCs
  - Remove flags from univ/main/syspll child fixed factor clocks across
    MediaTek platforms
  - Fix clock dependency for ADC on MediaTek MT7986
  - Fix parent for FlexSPI clock for i.MX93
  - Add USB suspend clock on i.MX8MP
  - Unmap anatop base on error for i.MX93 driver
  - Change enet clock parent to wakeup_axi_root for i.MX93
  - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
  - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
  - Add 320MHz and 640MHz entries to PLL146x
  - Add audio shared gate and SAI clocks for i.MX8MP
  - Fix a possible memory leak in the error path of rockchip PLL creation
  - Fix header guard for V3S clocks
  - Add IR module clock for f1c100s
  - Correct the parent clocks for the (High Speed) Serial Communication
    Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
    Switch clocks on Renesas R-Car S4-8
  - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
    R-Car V4H
  - Two PLL driver fixups for the Amlogic clk driver
  - Round SD clock rate to improve parent clock selection
  - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
    S4-8
  - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX) serial
    (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI (RPC-IF) clocks
    on Renesas R-Car V4H
  - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
    Renesas RZ/G2L
  - Fix endless loop on Renesas RZ/N1
  - Correct the parent clocks for the High Speed Serial Communication
    Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
    Note: HSCIF0 is used for the serial console on the White-Hawk
    development board
  - Various clk DT binding improvements and conversions to YAML
  - Qualcomm SM8150/SM8250 display clock controller cleaned up
  - Some missing clocks for Qualcomm SM8350 added
  - Qualcomm MSM8974 Global and Multimedia clock controllers transitioned
    to parent_data and parent_hws
  - Use parent_data and add network resets for Qualcomm IPQ8074
  - Qualcomm Krait clock controller modernized
  - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
    controllers
  - Enable retention mode on Qualcomm SM8250 USB GDSCs
  - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
    clocks which definition could be shared between platforms
  - Various NULL pointer checks added for allocations
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
 "A pile of clk driver updates with a small tracepoint patch to the clk
  core this time around.

  The core framework is effectively unchanged, with the majority of the
  diff going to the Qualcomm clk driver directory because they added two
  3k line files that are almost all clk data (Abel Vesa from Linaro
  tried to shrink the number of lines down, but it doesn't seem to be
  possible without sacrificing readability).

  The second big driver this time around is the Rockchip rk3588 clk and
  reset unit, at _only_ 2.5k lines.

  Ignoring the big clk drivers from the familiar SoC vendors, there's
  just a bunch of little clk driver updates and fixes throughout here.

  It's the usual set of clk data fixups to describe proper parents, or
  add frequencies to frequency tables, or plug memory leaks when
  function calls fail. Also, some drivers are converted to use modern
  clk_hw APIs, which is always nice to see. And data is deduplicated,
  leading to a smaller kernel Image.

  Overall this batch has a larger collection of cleanups than it
  typically does. Maybe that means there are less new SoCs right now
  that need supporting, and the focus has shifted to quality and
  reliability. I can dream.

  New Drivers:
   - Frequency hopping controller hardware on MediaTek MT8186
   - Global clock controller for Qualcomm SM8550
   - Display clock controller for Qualcomm SC8280XP
   - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
   - CPU PLL on MStar/SigmaStar SoCs
   - Support for the clock and reset unit of the Rockchip rk3588

  Updates:
   - Tracepoints for clk_rate_request structures
   - Debugfs support for fractional divider clk
   - Make MxL's CGU driver secure compatible
   - Ingenic JZ4755 SoC clk support
   - Support audio clks on X1000 SoCs
   - Remove flags from univ/main/syspll child fixed factor clocks across
     MediaTek platforms
   - Fix clock dependency for ADC on MediaTek MT7986
   - Fix parent for FlexSPI clock for i.MX93
   - Add USB suspend clock on i.MX8MP
   - Unmap anatop base on error for i.MX93 driver
   - Change enet clock parent to wakeup_axi_root for i.MX93
   - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
   - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
   - Add 320MHz and 640MHz entries to PLL146x
   - Add audio shared gate and SAI clocks for i.MX8MP
   - Fix a possible memory leak in the error path of rockchip PLL
     creation
   - Fix header guard for V3S clocks
   - Add IR module clock for f1c100s
   - Correct the parent clocks for the (High Speed) Serial Communication
     Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
     Switch clocks on Renesas R-Car S4-8
   - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
     R-Car V4H
   - Two PLL driver fixups for the Amlogic clk driver
   - Round SD clock rate to improve parent clock selection
   - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
     S4-8
   - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX)
     serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI
     (RPC-IF) clocks on Renesas R-Car V4H
   - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
     Renesas RZ/G2L
   - Fix endless loop on Renesas RZ/N1
   - Correct the parent clocks for the High Speed Serial Communication
     Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
     Note: HSCIF0 is used for the serial console on the White-Hawk
     development board
   - Various clk DT binding improvements and conversions to YAML
   - Qualcomm SM8150/SM8250 display clock controller cleaned up
   - Some missing clocks for Qualcomm SM8350 added
   - Qualcomm MSM8974 Global and Multimedia clock controllers
     transitioned to parent_data and parent_hws
   - Use parent_data and add network resets for Qualcomm IPQ8074
   - Qualcomm Krait clock controller modernized
   - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
     controllers
   - Enable retention mode on Qualcomm SM8250 USB GDSCs
   - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
     clocks which definition could be shared between platforms
   - Various NULL pointer checks added for allocations"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits)
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  ...
2022-12-13 13:46:07 -08:00
Linus Torvalds 71946a25f3 MMC core:
- A few minor improvements and cleanups
 
 MMC host:
  - Remove some redundant calls to local_irq_{save,restore}()
  - Replace kmap_atomic() with kmap_local_page()
  - Take return values from mmc_add_host() into account
  - dw_mmc-pltfm: Add support to configure clk-phase for socfpga
  - hsq: Minimize latency by using a fifo to dispatch requests
  - litex_mmc: Fixup corner case for polling mode
  - mtk-sd: Add inline crypto engine clock control
  - mtk-sd: Add support for the mediatek MT7986 variant
  - renesas_sdhi: Improve reset from HS400 mode
  - renesas_sdhi: Take DMA end interrupts into account
  - sdhci: Avoid unnecessary update of clock
  - sdhci: Fix an SD tuning issue
  - sdhci-brcmst: Add Kamal Dasu as maintainer for the Broadcom driver
  - sdhci-esdhc-imx: Improve tuning logic
  - sdhci-esdhc-imx: Improve support for the imxrt1050 variant
  - sdhci_f_sdh30: Add support for non-removable media
  - sdhci_f_sdh30: Add support for the Socionext F_SDH30_E51 variant
  - sdhci_f_sdh30: Add reset control support
  - sdhci-msm: Add support for the Qcom SM8550/SM8350/SM6375 variants
  - sdhci-msm: Add support for the Qcom MSM8976 variant
  - sdhci-of-arasan: Add support for dynamic configuration
  - sdhci-of-esdhc: Limit the clock frequency to confirm to spec
  - sdhci-pci: Enable asynchronous probe
  - sdhci-sprd: Improve card detection
  - sdhci-tegra: Improve reset support
  - sdhci-tegra: Add support to program MC stream ID
  - sunplus-mmc: Add new mmc driver for the Sunplus SP7021 controller
  - vub300: Fix warning splat for SDIO irq
 
 MEMSTICK core:
  - memstick: A few minor improvements and cleanups
 
 CLK/IOMMU:
  - clk: socfpga: Drop redundant support for clk-phase for the SD/MMC clk
  - iommu: Add tegra specific helper to get stream_id
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Merge tag 'mmc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC and MEMSTICK updates from Ulf Hansson:
 "MMC core:
   - A few minor improvements and cleanups

  MMC host:
   - Remove some redundant calls to local_irq_{save,restore}()
   - Replace kmap_atomic() with kmap_local_page()
   - Take return values from mmc_add_host() into account
   - dw_mmc-pltfm: Add support to configure clk-phase for socfpga
   - hsq: Minimize latency by using a fifo to dispatch requests
   - litex_mmc: Fixup corner case for polling mode
   - mtk-sd: Add inline crypto engine clock control
   - mtk-sd: Add support for the mediatek MT7986 variant
   - renesas_sdhi: Improve reset from HS400 mode
   - renesas_sdhi: Take DMA end interrupts into account
   - sdhci: Avoid unnecessary update of clock
   - sdhci: Fix an SD tuning issue
   - sdhci-brcmst: Add Kamal Dasu as maintainer for the Broadcom driver
   - sdhci-esdhc-imx: Improve tuning logic
   - sdhci-esdhc-imx: Improve support for the imxrt1050 variant
   - sdhci_f_sdh30: Add support for non-removable media
   - sdhci_f_sdh30: Add support for the Socionext F_SDH30_E51 variant
   - sdhci_f_sdh30: Add reset control support
   - sdhci-msm: Add support for the Qcom SM8550/SM8350/SM6375 variants
   - sdhci-msm: Add support for the Qcom MSM8976 variant
   - sdhci-of-arasan: Add support for dynamic configuration
   - sdhci-of-esdhc: Limit the clock frequency to confirm to spec
   - sdhci-pci: Enable asynchronous probe
   - sdhci-sprd: Improve card detection
   - sdhci-tegra: Improve reset support
   - sdhci-tegra: Add support to program MC stream ID
   - sunplus-mmc: Add new mmc driver for the Sunplus SP7021 controller
   - vub300: Fix warning splat for SDIO irq

  MEMSTICK core:
   - memstick: A few minor improvements and cleanups

  CLK/IOMMU:
   - clk: socfpga: Drop redundant support for clk-phase for the SD/MMC clk
   - iommu: Add tegra specific helper to get stream_id"

* tag 'mmc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (108 commits)
  mmc: sdhci-sprd: Disable CLK_AUTO when the clock is less than 400K
  mmc: sdhci-of-esdhc: Modify mismatched function name
  memstick/mspro_block: Convert to use sysfs_emit()/sysfs_emit_at() APIs
  mmc: sdhci-tegra: Issue CMD and DAT resets together
  mmc: sdhci-tegra: Add support to program MC stream ID
  mmc: sdhci-tegra: Separate Tegra194 and Tegra234 SoC data
  mmc: sdhci-tegra: Sort includes alphabetically
  iommu/tegra: Add tegra_dev_iommu_get_stream_id() helper
  iommu: Add note about struct iommu_fwspec usage
  mmc: sdhci-brcmstb: Resolve "unused" warnings with CONFIG_OF=n
  dt-bindings: mmc: sdhci-msm: allow dma-coherent
  dt-bindings: mmc: sdhci-msm: drop properties mentioned in common MMC
  dt-bindings: mmc: sdhci-msm: cleanup style
  dt-bindings: mmc: sdhci-am654: cleanup style
  dt-bindings: mmc: sdhci: document sdhci-caps and sdhci-caps-mask
  mmc: vub300: fix warning - do not call blocking ops when !TASK_RUNNING
  MAINTAINERS: Update maintainer for SDHCI Broadcom BRCMSTB driver
  mmc: sdhci-of-esdhc: limit the SDHC clock frequency
  mmc: sdhci: Remove unneeded semicolon
  mmc: core: Normalize the error handling branch in sd_read_ext_regs()
  ...
2022-12-13 13:41:26 -08:00
Linus Torvalds a594533df0 drm for 6.2:
Initial accel subsystem support. There are no drivers yet, just the framework.
 
 New driver:
 - ofdrm - replacement for offb
 
 fbdev:
 - add support for nomodeset
 
 fourcc:
 - add Vivante tiled modifier
 
 core:
 - atomic-helpers: CRTC primary plane test fixes, fb access hooks
 - connector: TV API consistency, cmdline parser improvements
 - send connector hotplug on cleanup
 - sort makefile objects
 
 tests:
 - sort kunit tests
 - improve DP-MST tests
 - add kunit helpers to create a device
 
 sched:
 - module param for scheduling policy
 - refcounting fix
 
 buddy:
 - add back random seed log
 
 ttm:
 - convert ttm_resource to size_t
 - optimize pool allocations
 
 edid:
 - HFVSDB parsing support fixes
 - logging/debug improvements
 - DSC quirks
 
 dma-buf:
 - Add unlocked vmap and attachment mapping
 - move drivers to common locking convention
 - locking improvements
 
 firmware:
 - new API for rPI firmware and vc4
 
 xilinx:
 - zynqmp: displayport bridge support
 - dpsub fix
 
 bridge:
 - adv7533: Remove dynamic lane switching
 - it6505: Runtime PM support, sync improvements
 - ps8640: Handle AUX defer messages
 - tc358775: Drop soft-reset over I2C
 
 panel:
 - panel-edp: Add INX N116BGE-EA2 C2 and C4 support.
 - Jadard JD9365DA-H3
 - NewVision NV3051D
 
 amdgpu:
 - DCN support on ARM
 - DCN 2.1 secure display
 - Sienna Cichlid mode2 reset fixes
 - new GC 11.x firmware versions
 - drop AMD specific DSC workarounds in favour of drm code
 - clang warning fixes
 - scheduler rework
 - SR-IOV fixes
 - GPUVM locking fixes
 - fix memory leak in CS IOCTL error path
 - flexible array updates
 - enable new GC/PSP/SMU/NBIO IP
 - GFX preemption support for gfx9
 
 amdkfd:
 - cache size fixes
 - userptr fixes
 - enable cooperative launch on gfx 10.3
 - enable GC 11.0.4 KFD support
 
 radeon:
 - replace kmap with kmap_local_page
 - ACPI ref count fix
 - HDA audio notifier support
 
 i915:
 - DG2 enabled by default
 - MTL enablement work
 - hotplug refactoring
 - VBT improvements
 - Display and watermark refactoring
 - ADL-P workaround
 - temp disable runtime_pm for discrete-
 - fix for A380 as a secondary GPU
 - Wa_18017747507 for DG2
 - CS timestamp support fixes for gen5 and earlier
 - never purge busy TTM objects
 - use i915_sg_dma_sizes for all backends
 - demote GuC kernel contexts to normal priority
 - gvt: refactor for new MDEV interface
 - enable DC power states on eDP ports
 - fix gen 2/3 workarounds
 
 nouveau:
 - fix page fault handling
 - Ampere acceleration support
 - driver stability improvements
 - nva3 backlight support
 
 msm:
 - MSM_INFO_GET_FLAGS support
 - DPU: XR30 and P010 image formats
 - Qualcomm SM6115 support
 - DSI PHY support for QCM2290
 - HDMI: refactored dev init path
 - remove exclusive-fence hack
 - fix speed-bin detection
 - enable clamp to idle on 7c3
 - improved hangcheck detection
 
 vmwgfx:
 - fb and cursor refactoring
 - convert to generic hashtable
 - cursor improvements
 
 etnaviv:
 - hw workarounds
 - softpin MMU fixes
 
 ast:
 - atomic gamma LUT support
 - convert to SHMEM
 
 lcdif:
 - support YUV planes
 - Increase DMA burst size
 - FIFO threshold tuning
 
 meson:
 - fix return type of cvbs mode_valid
 
 mgag200:
 - fix PLL setup on some revisions
 
 sun4i:
 - A100 and D1 support
 
 udl:
 - modesetting improvements
 - hot unplug support
 
 vc4:
 - support PAL-M
 - fix regression preventing 4K @ 60Hz
 - fix NULL ptr deref
 
 v3d:
 - switch to drm managed resources
 
 renesas:
 - RZ/G2L DSI support
 - DU Kconfig cleanup
 
 mediatek:
 - fixup dpi and hdmi
 - MT8188 dpi support
 - MT8195 AFBC support
 
 tegra:
 - NVDEC hardware on Tegra234 SoC
 
 hdlcd:
 - switch to drm managed resources
 
 ingenic:
 - fix registration error path
 
 hisilicon:
 - convert to drm_mode_init
 
 maildp:
 - use managed resources
 
 mtk:
 - use drm_mode_init
 
 rockchip:
 - use drm_mode_copy
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Merge tag 'drm-next-2022-12-13' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "The biggest highlight is that the accel subsystem framework is merged.
  Hopefully for 6.3 we will be able to line up a driver to use it.

  In drivers land, i915 enables DG2 support by default now, and nouveau
  has a big stability refactoring and initial ampere support, AMD
  includes new hw IP support and should build on ARM again. There is
  also an ofdrm driver to take over offb on platforms it's used.

  Stuff outside my tree, the dma-buf patches hit a few places, the vc4
  firmware changes also do, and i915 has some interactions with MEI for
  discrete GPUs. I think all of those should have been acked/reviewed by
  relevant parties.

  New driver:
   - ofdrm - replacement for offb

  fbdev:
   - add support for nomodeset

  fourcc:
   - add Vivante tiled modifier

  core:
   - atomic-helpers: CRTC primary plane test fixes, fb access hooks
   - connector: TV API consistency, cmdline parser improvements
   - send connector hotplug on cleanup
   - sort makefile objects

  tests:
   - sort kunit tests
   - improve DP-MST tests
   - add kunit helpers to create a device

  sched:
   - module param for scheduling policy
   - refcounting fix

  buddy:
   - add back random seed log

  ttm:
   - convert ttm_resource to size_t
   - optimize pool allocations

  edid:
   - HFVSDB parsing support fixes
   - logging/debug improvements
   - DSC quirks

  dma-buf:
   - Add unlocked vmap and attachment mapping
   - move drivers to common locking convention
   - locking improvements

  firmware:
   - new API for rPI firmware and vc4

  xilinx:
   - zynqmp: displayport bridge support
   - dpsub fix

  bridge:
   - adv7533: Remove dynamic lane switching
   - it6505: Runtime PM support, sync improvements
   - ps8640: Handle AUX defer messages
   - tc358775: Drop soft-reset over I2C

  panel:
   - panel-edp: Add INX N116BGE-EA2 C2 and C4 support.
   - Jadard JD9365DA-H3
   - NewVision NV3051D

  amdgpu:
   - DCN support on ARM
   - DCN 2.1 secure display
   - Sienna Cichlid mode2 reset fixes
   - new GC 11.x firmware versions
   - drop AMD specific DSC workarounds in favour of drm code
   - clang warning fixes
   - scheduler rework
   - SR-IOV fixes
   - GPUVM locking fixes
   - fix memory leak in CS IOCTL error path
   - flexible array updates
   - enable new GC/PSP/SMU/NBIO IP
   - GFX preemption support for gfx9

  amdkfd:
   - cache size fixes
   - userptr fixes
   - enable cooperative launch on gfx 10.3
   - enable GC 11.0.4 KFD support

  radeon:
   - replace kmap with kmap_local_page
   - ACPI ref count fix
   - HDA audio notifier support

  i915:
   - DG2 enabled by default
   - MTL enablement work
   - hotplug refactoring
   - VBT improvements
   - Display and watermark refactoring
   - ADL-P workaround
   - temp disable runtime_pm for discrete-
   - fix for A380 as a secondary GPU
   - Wa_18017747507 for DG2
   - CS timestamp support fixes for gen5 and earlier
   - never purge busy TTM objects
   - use i915_sg_dma_sizes for all backends
   - demote GuC kernel contexts to normal priority
   - gvt: refactor for new MDEV interface
   - enable DC power states on eDP ports
   - fix gen 2/3 workarounds

  nouveau:
   - fix page fault handling
   - Ampere acceleration support
   - driver stability improvements
   - nva3 backlight support

  msm:
   - MSM_INFO_GET_FLAGS support
   - DPU: XR30 and P010 image formats
   - Qualcomm SM6115 support
   - DSI PHY support for QCM2290
   - HDMI: refactored dev init path
   - remove exclusive-fence hack
   - fix speed-bin detection
   - enable clamp to idle on 7c3
   - improved hangcheck detection

  vmwgfx:
   - fb and cursor refactoring
   - convert to generic hashtable
   - cursor improvements

  etnaviv:
   - hw workarounds
   - softpin MMU fixes

  ast:
   - atomic gamma LUT support
   - convert to SHMEM

  lcdif:
   - support YUV planes
   - Increase DMA burst size
   - FIFO threshold tuning

  meson:
   - fix return type of cvbs mode_valid

  mgag200:
   - fix PLL setup on some revisions

  sun4i:
   - A100 and D1 support

  udl:
   - modesetting improvements
   - hot unplug support

  vc4:
   - support PAL-M
   - fix regression preventing 4K @ 60Hz
   - fix NULL ptr deref

  v3d:
   - switch to drm managed resources

  renesas:
   - RZ/G2L DSI support
   - DU Kconfig cleanup

  mediatek:
   - fixup dpi and hdmi
   - MT8188 dpi support
   - MT8195 AFBC support

  tegra:
   - NVDEC hardware on Tegra234 SoC

  hdlcd:
   - switch to drm managed resources

  ingenic:
   - fix registration error path

  hisilicon:
   - convert to drm_mode_init

  maildp:
   - use managed resources

  mtk:
   - use drm_mode_init

  rockchip:
   - use drm_mode_copy"

* tag 'drm-next-2022-12-13' of git://anongit.freedesktop.org/drm/drm: (1397 commits)
  drm/amdgpu: fix mmhub register base coding error
  drm/amdgpu: add tmz support for GC IP v11.0.4
  drm/amdgpu: enable GFX Clock Gating control for GC IP v11.0.4
  drm/amdgpu: enable GFX Power Gating for GC IP v11.0.4
  drm/amdgpu: enable GFX IP v11.0.4 CG support
  drm/amdgpu: Make amdgpu_ring_mux functions as static
  drm/amdgpu: generally allow over-commit during BO allocation
  drm/amd/display: fix array index out of bound error in DCN32 DML
  drm/amd/display: 3.2.215
  drm/amd/display: set optimized required for comp buf changes
  drm/amd/display: Add debug option to skip PSR CRTC disable
  drm/amd/display: correct DML calc error of UrgentLatency
  drm/amd/display: correct static_screen_event_mask
  drm/amd/display: Ensure commit_streams returns the DC return code
  drm/amd/display: read invalid ddc pin status cause engine busy
  drm/amd/display: Bypass DET swath fill check for max clocks
  drm/amd/display: Disable uclk pstate for subvp pipes
  drm/amd/display: Fix DCN2.1 default DSC clocks
  drm/amd/display: Enable dp_hdmi21_pcon support
  drm/amd/display: prevent seamless boot on displays that don't have the preferred dig
  ...
2022-12-13 11:59:58 -08:00
Stephen Boyd 0e2c9884cb Merge branches 'clk-mediatek', 'clk-trace', 'clk-qcom' and 'clk-microchip' into clk-next
- Tracepoints for clk_rate_request structures

* clk-mediatek:
  clk: mediatek: fix dependency of MT7986 ADC clocks
  clk: mediatek: Change PLL register API for MT8186
  clk: mediatek: Add new clock driver to handle FHCTL hardware
  dt-bindings: clock: mediatek: Add new bindings of MediaTek frequency hopping
  clk: mediatek: Export PLL operations symbols
  clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier
  clk: mediatek: mt8186-mfg: Propagate rate changes to parent
  clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: mt8192: Drop flags for main/univpll fixed factors
  clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors
  clk: mediatek: mt8183: Compress top_divs array entries
  clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks

* clk-trace:
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request

* clk-qcom: (69 commits)
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
  clk: qcom: rpmh: remove usage of platform name
  clk: qcom: rpmh: rename VRM clock data
  clk: qcom: rpmh: rename ARC clock data
  clk: qcom: rpmh: support separate symbol name for the RPMH clocks
  clk: qcom: rpmh: remove platform names from BCM clocks
  clk: qcom: rpmh: drop all _ao names
  clk: qcom: rpmh: reuse common duplicate clocks
  clk: qcom: rpmh: group clock definitions together
  clk: qcom: rpm: drop the platform from clock definitions
  clk: qcom: rpm: drop the _clk suffix completely
  ...

* clk-microchip:
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: microchip: check for null return of devm_kzalloc()
2022-12-12 11:13:28 -08:00
Stephen Boyd e0a1d1394b Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into clk-next
- Debugfs support for fractional divider clk

* clk-spear:
  clk: spear: Fix SSP clock definition on SPEAr600
  clk: spear: Fix CLCD clock definition on SPEAr600

* clk-fract:
  clk: fractional-divider: Regroup inclusions
  clk: fractional-divider: Show numerator and denominator in debugfs
  clk: fractional-divider: Split out clk_fd_get_div() helper

* clk-rockchip:
  clk: rockchip: Fix memory leak in rockchip_clk_register_pll()
  clk: rockchip: add clock controller for the RK3588
  clk: rockchip: add lookup table support
  clk: rockchip: simplify rockchip_clk_add_lookup
  clk: rockchip: allow additional mux options for cpu-clock frequency changes
  clk: rockchip: add pll type for RK3588
  clk: rockchip: add register offset of the cores select parent
  dt-bindings: clock: add rk3588 cru bindings
  dt-bindings: reset: add rk3588 reset definitions
  dt-bindings: clock: add rk3588 clock definitions
  clk: rockchip: use proper crypto0 name on rk3399

* clk-imx:
  clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
  clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
  clk: imx8mn: fix imx8mn_sai2_sels clocks list
  clk: imx: rename video_pll1 to video_pll
  clk: imx: replace osc_hdmi with dummy
  clk: imx8mn: rename vpu_pll to m7_alt_pll
  clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
  clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
  clk: imx8mp: Add audio shared gate
  dt-bindings: clock: imx8mp: Add ids for the audio shared gate
  clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
  clk: imx93: keep sys ctr clock always on
  clk: imx: keep hsio bus clock always on
  clk: imx93: drop tpm1/3, lpit1/2 clk
  dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
  clk: imx93: correct enet clock
  clk: imx93: unmap anatop base in error handling path
  clk: imx: imx8mp: add shared clk gate for usb suspend clk
  dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
  clk: imx93: correct the flexspi1 clock setting
2022-12-12 11:13:08 -08:00
Stephen Boyd 83907bf316 Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-ti' into clk-next
* clk-bindings:
  dt-bindings: clock: ti,cdce925: Convert to DT schema

* clk-renesas: (26 commits)
  clk: renesas: r8a779f0: Fix Ethernet Switch clocks
  clk: renesas: r8a779g0: Add Z0 clock support
  clk: renesas: r8a779g0: Add CMT clocks
  clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks
  clk: renesas: r8a779f0: Fix SCIF parent clocks
  clk: renesas: r8a779f0: Fix HSCIF parent clocks
  clk: renesas: r9a06g032: Repair grave increment error
  clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
  clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc
  clk: renesas: r8a779a0: Fix SD0H clock name
  clk: renesas: r8a779g0: Add RPC-IF clock
  clk: renesas: r8a779g0: Add SDHI clocks
  clk: renesas: r8a779f0: Add SASYNCPER internal clock
  clk: renesas: r8a779f0: Fix SD0H clock name
  clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
  clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
  clk: renesas: r8a779g0: Add TPU clock
  clk: renesas: r8a779g0: Add PWM clock
  clk: renesas: r8a779g0: Add SCIF clocks
  clk: renesas: r9a07g044: Add MTU3a clock and reset entry
  ...

* clk-amlogic:
  clk: meson: pll: add pcie lock retry workaround
  clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock()

* clk-allwinner:
  clk: sunxi-ng: f1c100s: Add IR mod clock
  clk: sunxi-ng: v3s: Correct the header guard of ccu-sun8i-v3s.h

* clk-ti:
  clk: ti: fix typo in ti_clk_retry_init() code comment
  clk: ti: dra7-atl: don't allocate `parent_names' variable
  clk: ti: change ti_clk_register[_omap_hw]() API
2022-12-12 11:12:52 -08:00
Stephen Boyd a9fc882f57 Merge branches 'clk-x86', 'clk-xilinx', 'clk-cleanup', 'clk-mstar' and 'clk-ingenic' into clk-next
- Make MxL's CGU driver secure compatible
 - Support for CPU PLL on MStar/SigmaStar SoCs
 - Ingenic JZ4755 SoC clk support
 - Support audio clks on X1000 SoCs

* clk-x86:
  clk: mxl: syscon_node_to_regmap() returns error pointers
  clk: mxl: Fix a clk entry by adding relevant flags
  clk: mxl: Add option to override gate clks
  clk: mxl: Remove redundant spinlocks
  clk: mxl: Switch from direct readl/writel based IO to regmap based IO

* clk-xilinx:
  clk: xilinx: Drop duplicate depends on COMMON_CLK

* clk-cleanup:
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: visconti: Fix memory leak in visconti_register_pll()
  clk: Remove a useless include
  clk: samsung: Fix reference to CLK_OF_DECLARE in comment
  clk: stm32mp1: Staticize ethrx_src
  clk: keystone: syscon-clk: Use dev_err_probe() helper
  clk: bulk: Use dev_err_probe() helper in __clk_bulk_get()
  clk: cdce925: simplify using devm_regulator_get_enable()

* clk-mstar:
  clk: mstar: msc313 cpupll clk driver

* clk-ingenic:
  clk: Add Ingenic JZ4755 CGU driver
  dt-bindings: clock: Add Ingenic JZ4755 CGU header
  dt-bindings: ingenic: Add support for the JZ4755 CGU
  clk: ingenic: Minor cosmetic fixups for X1000
  clk: ingenic: Add X1000 audio clocks
  dt-bindings: ingenic,x1000-cgu: Add audio clocks
  clk: ingenic: Add .set_rate_hook() for PLL clocks
  clk: ingenic: Make PLL clock enable_bit and stable_bit optional
  clk: ingenic: Make PLL clock "od" field optional
2022-12-12 11:12:26 -08:00
Linus Torvalds 8e17b16a2c SoC driver updates for 6.2
There are few major updates in the SoC specific drivers, mainly the usual
 reworks and support for variants of the existing SoC.  While this remains
 Arm centric for the most part, the branch now also contains updates to
 risc-v and loongarch specific code in drivers/soc/.
 
 Notable changes include:
 
  - Support for the newly added Qualcomm Snapdragon variants
    (MSM8956, MSM8976, SM6115, SM4250, SM8150, SA8155 and SM8550) in the
    soc ID, rpmh, rpm, spm and powerdomain drivers.
 
  - Documentation for the somewhat controversial qcom,board-id
    properties that are required for booting a number of machines
 
  - A new SoC identification driver for the loongson-2 (loongarch)
    platform
 
  - memory controller updates for stm32, tegra, and renesas.
 
  - a new DT binding to better describe LPDDR2/3/4/5 chips in
    the memory controller subsystem
 
  - Updates for Tegra specific drivers across multiple subsystems,
    improving support for newer SoCs and better identification
 
  - Minor fixes for Broadcom, Freescale, Apple, Renesas, Sifive,
    TI, Mediatek and Marvell SoC drivers
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Merge tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are few major updates in the SoC specific drivers, mainly the
  usual reworks and support for variants of the existing SoC. While this
  remains Arm centric for the most part, the branch now also contains
  updates to risc-v and loongarch specific code in drivers/soc/.

  Notable changes include:

   - Support for the newly added Qualcomm Snapdragon variants (MSM8956,
     MSM8976, SM6115, SM4250, SM8150, SA8155 and SM8550) in the soc ID,
     rpmh, rpm, spm and powerdomain drivers.

   - Documentation for the somewhat controversial qcom,board-id
     properties that are required for booting a number of machines

   - A new SoC identification driver for the loongson-2 (loongarch)
     platform

   - memory controller updates for stm32, tegra, and renesas.

   - a new DT binding to better describe LPDDR2/3/4/5 chips in the
     memory controller subsystem

   - Updates for Tegra specific drivers across multiple subsystems,
     improving support for newer SoCs and better identification

   - Minor fixes for Broadcom, Freescale, Apple, Renesas, Sifive, TI,
     Mediatek and Marvell SoC drivers"

* tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (137 commits)
  soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
  soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
  dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
  soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
  soc: qcom: Select REMAP_MMIO for LLCC driver
  soc: qcom: rpmpd: Add SM4250 support
  dt-bindings: power: rpmpd: Add SM4250 support
  dt-bindings: soc: qcom: aoss: Add compatible for SM8550
  soc: qcom: llcc: Add configuration data for SM8550
  dt-bindings: arm: msm: Add LLCC compatible for SM8550
  soc: qcom: llcc: Add v4.1 HW version support
  soc: qcom: socinfo: Add SM8550 ID
  soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
  soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
  soc: qcom: rpmhpd: Add SM8550 power domains
  dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
  soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
  ...
2022-12-12 10:17:08 -08:00
Randy Dunlap 5e57aaa8b6 clk: nomadik: correct struct name kernel-doc warning
Use the correct struct name for the kernel-doc notation to prevent
a kernel-doc warning:

clk-nomadik.c:148: warning: expecting prototype for struct clk_pll1. Prototype was for struct clk_pll instead

Fixes: ef6eb322ce ("clk: nomadik: implement the Nomadik clocks properly")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Link: https://lore.kernel.org/r/20221209002016.14776-1-rdunlap@infradead.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-09 10:26:25 -08:00
Liam Beguin 40b85eec8b clk: lmk04832: fix kernel-doc warnings
Fix syntax generating the following kernel-doc warnings:

drivers/clk/clk-lmk04832.c:189: warning: cannot understand function prototype: 'struct lmk04832_device_info '
drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'pid' not described in 'lmk04832_device_info'
drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'maskrev' not described in 'lmk04832_device_info'
drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'num_channels' not described in 'lmk04832_device_info'
drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'vco0_range' not described in 'lmk04832_device_info'
drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'vco1_range' not described in 'lmk04832_device_info'
drivers/clk/clk-lmk04832.c:420: warning: No description found for return value of 'lmk04832_check_vco_ranges'
drivers/clk/clk-lmk04832.c:459: warning: No description found for return value of 'lmk04832_calc_pll2_params'

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20221120030257.531153-5-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:18:43 -08:00
Liam Beguin 739d5e6abb clk: lmk04832: drop superfluous #include
iwyu warnings: (new ones prefixed by >>)
>> drivers/clk/clk-lmk04832.c:15:1: iwyu: warning: superfluous #include <linux/debugfs.h>
>> drivers/clk/clk-lmk04832.c:20:1: iwyu: warning: superfluous #include <linux/uaccess.h>

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/all/202107110620.926Sm95z-lkp@intel.com/
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20221120030257.531153-4-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:18:43 -08:00
Liam Beguin 992a35523d clk: lmk04832: drop unnecessary semicolons
Semicolons on the closing brace of a function definition are
unnecessary, remove them.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20221120030257.531153-3-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:18:43 -08:00
Liam Beguin 6c634446b8 clk: lmk04832: declare variables as const when possible
Fix the following warning reported by the kernel test robot.

	cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
	>> drivers/clk/clk-lmk04832.c:357:15: warning: Variable 'pll2_p' can be declared with const [constVariable]
	    unsigned int pll2_p[] = {8, 2, 2, 3, 4, 5, 6, 7};

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/all/202203312017.5YW13Jr4-lkp@intel.com/
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20221120030257.531153-2-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:18:42 -08:00
Xiu Jianfeng 0b8ba891ad clk: socfpga: Fix memory leak in socfpga_gate_init()
Free @socfpga_clk and @ops on the error path to avoid memory leak issue.

Fixes: a30a67be7b ("clk: socfpga: Don't have get_parent for single parent ops")
Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com>
Link: https://lore.kernel.org/r/20221123031622.63171-1-xiujianfeng@huawei.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:16:14 -08:00
Conor Dooley 3c79ace9c0 clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
With the intent of removing driver selects from Kconfig.socs in
arch/riscv, essential drivers that were being selected there could
instead by enabled by defaulting them to the value of the SoC's Kconfig
symbol.

Do so here & drop the depend on RISC-V - the SOC_ symbols are only
defined there anyway.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221123161921.81195-1-conor@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08 17:12:08 -08:00
Xiu Jianfeng cfd3ffb36f clk: st: Fix memory leak in st_of_quadfs_setup()
If st_clk_register_quadfs_pll() fails, @lock should be freed before goto
@err_exit, otherwise will cause meory leak issue, fix it.

Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com>
Link: https://lore.kernel.org/r/20221122133614.184910-1-xiujianfeng@huawei.com
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07 18:27:11 -08:00
Xiu Jianfeng 5174e5b0d1 clk: samsung: Fix memory leak in _samsung_clk_register_pll()
If clk_register() fails, @pll->rate_table may have allocated memory by
kmemdup(), so it needs to be freed, otherwise will cause memory leak
issue, this patch fixes it.

Fixes: 3ff6e0d8d6 ("clk: samsung: Add support to register rate_table for samsung plls")
Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com>
Link: https://lore.kernel.org/r/20221123032015.63980-1-xiujianfeng@huawei.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07 18:26:47 -08:00
Maxime Ripard 49e62e0d96 clk: Add trace events for rate requests
It is currently fairly difficult to follow what clk_rate_request are
issued, and how they have been modified once done.

Indeed, there's multiple paths that can be taken, some functions are
recursive and will just forward the request to its parent, etc.

Adding a lot of debug prints is just not very convenient, so let's add
trace events for the clock requests, one before they are submitted and
one after they are returned.

That way we can simply toggle the tracing on without modifying the
kernel code and without affecting performances or the kernel logs too
much.

Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221018-clk-rate-request-tracing-v2-2-5170b363c413@cerno.tech
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07 13:54:09 -08:00
Maxime Ripard ef13f8b647 clk: Store clk_core for clk_rate_request
The struct clk_rate_request is meant to store the context around a rate
request such as the parent, boundaries, and so on.

However, it doesn't store the clock the rate request is submitted to,
which makes debugging difficult.

Let's add a pointer to the relevant clk_core instance in order to
improve the debugging of rate requests in a subsequent patch.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221018-clk-rate-request-tracing-v2-1-5170b363c413@cerno.tech
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07 13:54:01 -08:00
Dinh Nguyen d0ce6aca9d clk: socfpga: remove the setting of clk-phase for sdmmc_clk
Now that the SDMMC driver supports setting the clk-phase, we can remove
the need to do it in the clock driver.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20221114230217.202634-5-dinguyen@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-12-07 13:22:37 +01:00
Luca Weiss 2931aa6758 clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
The IPA core clock is required for SM6350.  Define it.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
[elder@linaro.org: rebased with Dmitry's changes]
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202221240.225720-1-elder@linaro.org
2022-12-06 12:30:20 -06:00
Dmitry Baryshkov a174d29a59 clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names. Use parent_hws where possible to refer parent
clocks directly, skipping the lookup.

Note, the system names for xo clocks were changed from "xo" to
"xo_board" to follow the example of other platforms. This switches the
clocks to use DT-provided "xo_board" clock instead of manually
registered "xo" clock and allows us to drop qcom_cc_register_board_clk()
call from the driver at some point.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-9-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Dmitry Baryshkov 28c6c02527 clk: qcom: mmcc-msm8974: move clock parent tables down
Move clock parent tables down, after the PLL declarataions, so that we
can use pll hw clock fields in the next commit.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-8-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Dmitry Baryshkov 4e74e921ea clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-7-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Dmitry Baryshkov ff81be9712 clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names. Use parent_hws where possible to refer parent
clocks directly, skipping the lookup.

Note, the system names for xo clocks were changed from "xo" to
"xo_board" to follow the example of other platforms. This switches the
clocks to use DT-provided "xo_board" clock instead of manually
registered "xo" clock and allows us to drop qcom_cc_register_board_clk()
call from the driver at some point.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-6-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Dmitry Baryshkov f2b4f1490e clk: qcom: gcc-msm8974: move clock parent tables down
Rearrage clock parent tables and PLL declarations (pull parents down
and gpll4 up), so that we can use pll hw clock fields in the next
commit.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-5-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Dmitry Baryshkov fce760071d clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204124508.1415713-4-dmitry.baryshkov@linaro.org
2022-12-06 12:26:57 -06:00
Robert Marko 52fb1b8e48 clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
Switch to using devres-managed version of clk_notifier_register(). This
allows us to drop driver's remove() callback.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221205113545.575702-1-robert.marko@sartura.hr
2022-12-05 17:08:20 -06:00
Dmitry Baryshkov ec304d02b9 clk: qcom: rpmh: remove usage of platform name
Now that all clocks have individual names, remove the names of SoCs from
the RPMH clock definitions. Replace it with the common clk_rpmh_ prefix.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-9-dmitry.baryshkov@linaro.org
2022-12-02 14:00:08 -06:00
Dmitry Baryshkov 6ad844d739 clk: qcom: rpmh: rename VRM clock data
RPMH VRM clocks are frequently shared between several platforms. It
makes little sense to encode the SoC name into the clock name, if the
same clock is used for other SoCs.

Rework the VRM clock definitions to add resource-specific suffix. Keep
the userspace-visible clock name, but encode the part of cmd resource
and the divider into the variable name. This also make it obvious which
variant is used, making the code less error-prone.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-8-dmitry.baryshkov@linaro.org
2022-12-02 13:59:49 -06:00
Dmitry Baryshkov 166eb3eb3b clk: qcom: rpmh: rename ARC clock data
RPMH ARC clocks are frequently shared between several platforms. It
makes little sense to encode the SoC name into the clock name, if the
same clock is used for other SoCs.

Rework the ARC clock definitions to remove the SoC name. Keep the
userspace-visible clock name, but encode the divider into the variable
name. This also makes it obvious which divider is used by the platform,
making the code less error-prone.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-7-dmitry.baryshkov@linaro.org
2022-12-02 13:59:26 -06:00
Dmitry Baryshkov 49e4aa233c clk: qcom: rpmh: support separate symbol name for the RPMH clocks
Both ARC and VRM clocks have minor differences between platforms.
However using SoC names directly results in duplication, confusion and
occasional errors. Next patches are going to drop the SoC names and
encode these differences into the clock names.
To keep the system clock names (visible to userspace) intact, add
separate symbol names that are used in the code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-6-dmitry.baryshkov@linaro.org
2022-12-02 13:59:11 -06:00
Dmitry Baryshkov fe20294f4b clk: qcom: rpmh: remove platform names from BCM clocks
There are no platform-specific parts in the BCM clocks, drop the
platform name from the clock definitions, replacing it with clk_rpmh to
have the common prefix.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-5-dmitry.baryshkov@linaro.org
2022-12-02 13:58:19 -06:00
Dmitry Baryshkov 012c226fc6 clk: qcom: rpmh: drop all _ao names
In preparation for the further cleanup, remove the active only names,
they can be easily generated from the standard ones.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-4-dmitry.baryshkov@linaro.org
2022-12-02 13:58:18 -06:00
Dmitry Baryshkov 65b0c564a3 clk: qcom: rpmh: reuse common duplicate clocks
After the grouping it is obvious that some of the clock definitions are
pure duplicates. Rename them to use a single common name for the clock.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-3-dmitry.baryshkov@linaro.org
2022-12-02 13:58:18 -06:00
Dmitry Baryshkov 82349cc0d1 clk: qcom: rpmh: group clock definitions together
In preparations to the further changes, group all RPMH clock definitions
to ease review. Group the clocks by their type to make similar/duplicate
clocks stand out.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-2-dmitry.baryshkov@linaro.org
2022-12-02 13:58:18 -06:00
Dmitry Baryshkov 3de1c1fd61 clk: qcom: rpm: drop the platform from clock definitions
A single clock definition can be used on different platforms. Thus the
platform part of the clock name is not correct (and can be misleading).

Remove the platform-specific part of the defined clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202070814.482470-5-dmitry.baryshkov@linaro.org
2022-12-02 13:58:12 -06:00
Dmitry Baryshkov e9bf411a5d clk: qcom: rpm: drop the _clk suffix completely
Drop the _clk suffix from other clocks too. This does not produce any
user-visible changes, just syntax sugar.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202070814.482470-4-dmitry.baryshkov@linaro.org
2022-12-02 13:58:12 -06:00
Dmitry Baryshkov 35a57cdae7 clk: qcom: rpm: drop separate active-only names
To simplify code reviews remove duplication between normal and
active-only clock names. Get a single clock name and generate both names
internally.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202070814.482470-3-dmitry.baryshkov@linaro.org
2022-12-02 13:58:12 -06:00
Dmitry Baryshkov fbd5a2cbda clk: qcom: rpm: remove unused active-only clock names
The RPM_FIXED and RPM_XO_BUFFER clocks do not have the active-only
counterparts. Drop corresponding unused arguments.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202070814.482470-2-dmitry.baryshkov@linaro.org
2022-12-02 13:58:12 -06:00
Abel Vesa 955f2ea3b9 clk: qcom: Add GCC driver for SM8550
Add Global Clock controller (GCC) driver for SM8550 SoC,
which includes the gcc resets and gdsc.

This patch is based on an initial downstream driver.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-6-abel.vesa@linaro.org
2022-12-01 17:28:31 -06:00
Abel Vesa 1de7e70941 clk: qcom: Add LUCID_OLE PLL type for SM8550
Add a LUCID_OLE PLL type for SM8550 SoC from Qualcomm.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-5-abel.vesa@linaro.org
2022-12-01 17:27:00 -06:00
Abel Vesa 7364379d72 clk: qcom: gdsc: Increase status poll timeout
The SM8550 GCC GDSCs need a higher timeout value when polling for status,
so increase it to 1500us, while leaving the delay between disable-enable
sequence for votable gdscs to stay the same.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-4-abel.vesa@linaro.org
2022-12-01 17:26:59 -06:00
Lin, Meng-Bo a9b6703459 clk: qcom: gcc-msm8939: Add rates to the GP clocks
Similar to msm8916, msm8939 has (at least) 6 "General Purpose" clocks that
can be muxed to SoC pins. These clocks are:

GP_CLK{0, 1} : GPIO_{31, 32} (Belongs to CAMSS according to Linux)
GP_CLK_{1-3}{A, B} : GPIO_{49-51, 97, 12, 13} (Belongs to GCC itself)
GP_MN : GPIO_110 (Doesn't seem to be described in gcc,
    ignored in this patch)

Those clocks may be used as e.g. PWM sources for external peripherals.
Add more frequencies to the table for those clocks so it's possible
for arbitrary peripherals to make use of them.

Reference: https://lore.kernel.org/r/20220612145955.385787-5-nikita@trvn.ru

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117171343.24216-1-linmengbo0689@protonmail.com
2022-12-01 17:26:40 -06:00
Minghao Chi 0c44be0639 clk: qcom: hfpll: use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/202211171403340042731@zte.com.cn
2022-12-01 17:26:40 -06:00
Robert Marko 35dc8e101a clk: qcom: ipq8074: populate fw_name for all parents
It appears that having only .name populated in parent_data for clocks
which are only globally searchable currently will not work as the clk core
won't copy that name if there is no .fw_name present as well.

So, populate .fw_name for all parent clocks in parent_data.

Fixes: ae55ad32e2 ("clk: qcom: ipq8074: convert to parent data")

Co-developed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com
2022-12-01 17:26:39 -06:00
Christian Marangi 56a655e1c4 clk: qcom: krait-cc: convert to parent_data API
Modernize the krait-cc driver to parent-data API and refactor to drop
any use of parent_names. From Documentation all the required clocks should
be declared in DTS so fw_name can be correctly used to get the parents
for all the muxes. .name is also declared to save compatibility with old
DT.

While at it also drop some hardcoded index and introduce an enum to make
index values more clear.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com
2022-12-01 17:26:39 -06:00
Christian Marangi 8ea9fb841a clk: qcom: krait-cc: convert to devm_clk_hw_register
clk_register is now deprecated. Convert the driver to devm_clk_hw_register.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com
2022-12-01 17:26:38 -06:00