Граф коммитов

12544 Коммитов

Автор SHA1 Сообщение Дата
Bjorn Andersson 50aa72ccb3 arm64: dts: qcom: msm8996: Sort all nodes in msm8996.dtsi
Sort all the nodes by unit address, then name.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:10 -08:00
Bjorn Andersson 86f6d6225e arm64: dts: qcom: msm8996: Pad addresses
Pad all addresses in msm8996.dtsi to 8 digits, in order to make it
easier to ensure ordering when adding new nodes.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:09 -08:00
Bjorn Andersson 88264f1f6b arm64: dts: qcom: db820c: Remove pin specific files
Rather than scattering pinctrl definitions in various files, merge the
nodes into db820c.dtsi to make it easier to navigate.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:09 -08:00
Bjorn Andersson d5f4ac865a arm64: dts: qcom: db820c: Sort all nodes
Sort all nodes in db820c.dtsi based on address, then name.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:09 -08:00
Bjorn Andersson 7b494cc41e arm64: dts: qcom: db820c: Group root nodes
Prior refactoring have left a few root nodes scattered throughout
db820c.dtsi, group these at the top of the file.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:08 -08:00
Bjorn Andersson c61a5658e8 arm64: dts: qcom: msm8996: Move regulators to db820c
As the definition of available PMICs and the names of their outputs are
board specifc move this to db820c.dtsi

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:08 -08:00
Bjorn Andersson 8088443143 arm64: dts: qcom: msm8996: Move regulator consumers to db820c
Supplies for the various components in the SoC depends on board layout,
so move the supply definitions to db820c.dtsi instead of carrying them
in the platform dtsi.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:08 -08:00
Bjorn Andersson 75b77d6492 arm64: dts: qcom: msm8996: Use node references in db820c
Instead of mimicing the structure of the platform, reference nodes by
their label in apq8096-db820c.dtsi. Add labels in msm8996.dtsi where
necessary.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:08 -08:00
Bjorn Andersson f978d45b4a arm64: dts: qcom: db820c: Move non-soc entries out of /soc
The USB id pins and wlan regulator are not platform devices, so move
them out of /soc

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26 16:24:07 -08:00
Chen-Yu Tsai 1b27080ab2
ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board
The Libre Computer ALL-H3-IT board is a small single board computer that
is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
than a credit card.

The board features:

  - H2, H3, or H5 SoC from Allwinner
  - 2 DDR3 DRAM chips
  - Realtek RTL8821CU based WiFi module
  - 128 Mbit SPI-NOR flash
  - micro-SD card slot
  - micro HDMI video output
  - FPC connector for camera sensor module
  - generic Raspberri-Pi style 40 pin GPIO header
  - additional pin headers for extra USB host ports, ananlog audio and
    IR receiver

Only H5 variant test samples were made available, but the vendor does
have plans to include at least an H3 variant. Thus the device tree is
split much like the ALL-H3-CC, with a common dtsi file for the board
design, and separate dts files including the common board file and the
SoC dtsi file. The other variants will be added as they are made
available.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:54:53 +01:00
Jagan Teki 16c8ff571a
arm64: dts: allwinner: a64: Add MIPI DSI pipeline
Add MIPI DSI pipeline for Allwinner A64.

- dsi node, with A64 compatible since it doesn't support
  DSI_SCLK gating unlike A33
- dphy node, with A64 compatible with A33 fallback since
  DPHY on A64 and A33 is similar
- finally, attach the dsi_in to tcon0 for complete MIPI DSI

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:36:57 +01:00
Vasily Khoruzhick 59f5e9b9a8
arm64: dts: allwinner: a64: Add thermal sensors and thermal zones
A64 has 3 thermal sensors: 1 for CPU, 2 for GPU.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:27:07 +01:00
Ondrej Jirman 9ad4255710
arm64: dts: allwinner: h5: Add thermal sensor and thermal zones
There are two sensors, one for CPU, one for GPU.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26 10:27:05 +01:00
Ard Biesheuvel 966291f634 efi/libstub: Rename efi_call_early/_runtime macros to be more intuitive
The macros efi_call_early and efi_call_runtime are used to call EFI
boot services and runtime services, respectively. However, the naming
is confusing, given that the early vs runtime distinction may suggest
that these are used for calling the same set of services either early
or late (== at runtime), while in reality, the sets of services they
can be used with are completely disjoint, and efi_call_runtime is also
only usable in 'early' code.

So do a global sweep to replace all occurrences with efi_bs_call or
efi_rt_call, respectively, where BS and RT match the idiom used by
the UEFI spec to refer to boot time or runtime services.

While at it, use 'func' as the macro parameter name for the function
pointers, which is less likely to collide and cause weird build errors.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-24-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:25 +01:00
Ard Biesheuvel 99ea8b1db2 efi/libstub: Drop 'table' argument from efi_table_attr() macro
None of the definitions of the efi_table_attr() still refer to
their 'table' argument so let's get rid of it entirely.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-23-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:24 +01:00
Ard Biesheuvel 47c0fd39b7 efi/libstub: Drop protocol argument from efi_call_proto() macro
After refactoring the mixed mode support code, efi_call_proto()
no longer uses its protocol argument in any of its implementation,
so let's remove it altogether.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-22-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:24 +01:00
Ard Biesheuvel cd33a5c1d5 efi/libstub: Remove 'sys_table_arg' from all function prototypes
We have a helper efi_system_table() that gives us the address of the
EFI system table in memory, so there is no longer point in passing
it around from each function to the next.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-20-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:23 +01:00
Ard Biesheuvel 2fcdad2a80 efi/libstub: Get rid of 'sys_table_arg' macro parameter
The efi_call macros on ARM have a dependency on a variable 'sys_table_arg'
existing in the scope of the macro instantiation. Since this variable
always points to the same data structure, let's create a global getter
for it and use that instead.

Note that the use of a global variable with external linkage is avoided,
given the problems we had in the past with early processing of the GOT
tables.

While at it, drop the redundant casts in the efi_table_attr and
efi_call_proto macros.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-16-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:21 +01:00
Ard Biesheuvel f958efe975 efi/libstub: Distinguish between native/mixed not 32/64 bit
Currently, we support mixed mode by casting all boot time firmware
calls to 64-bit explicitly on native 64-bit systems, and to 32-bit
on 32-bit systems or 64-bit systems running with 32-bit firmware.

Due to this explicit awareness of the bitness in the code, we do a
lot of casting even on generic code that is shared with other
architectures, where mixed mode does not even exist. This casting
leads to loss of coverage of type checking by the compiler, which
we should try to avoid.

So instead of distinguishing between 32-bit vs 64-bit, distinguish
between native vs mixed, and limit all the nasty casting and
pointer mangling to the code that actually deals with mixed mode.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-10-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:17 +01:00
Ard Biesheuvel 58ec655a75 efi/libstub: Remove unused __efi_call_early() macro
The macro __efi_call_early() is defined by various architectures but
never used. Let's get rid of it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Arvind Sankar <nivedita@alum.mit.edu>
Cc: Borislav Petkov <bp@alien8.de>
Cc: James Morse <james.morse@arm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: https://lkml.kernel.org/r/20191224151025.32482-6-ardb@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:49:15 +01:00
Ingo Molnar 1e5f8a3085 Linux 5.5-rc3
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Merge tag 'v5.5-rc3' into sched/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-25 10:41:37 +01:00
Angus Ainslie (Purism) 106f7b3bf9 arm64: dts: imx8mq-librem5-devkit: use correct interrupt for the magnetometer
The LSM9DS1 uses a high level interrupt.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Fixes: eb4ea0857c ("arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 16:55:39 +08:00
Martin Kepplinger 537c00e3a7 arm64: dts: imx8mq-librem5-devkit: add accelerometer and gyro sensor
Now that there is driver support, describe the accel and gyro sensor parts
of the LSM9DS1 IMU.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 16:53:46 +08:00
Adam Ford 90f0d7026f arm64: defconfig: Enable CRYPTO_DEV_FSL_CAAM
Both the i.MX8MQ and i.MX8M Mini support the CAAM driver, but it
is currently not enabled by default.

This patch enables this as a module.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 16:47:42 +08:00
Adam Ford bff5b97237 arm64: dts: imx8mm: Add Crypto CAAM support
The i.MX8M Mini supports the same crypto engine as what is in
the i.MX8MQ, but it is not currently present in the device tree.

This patch places it into the device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 16:47:06 +08:00
Marco Antonio Franchi 6eca4d1f58 arm64: dts: freescale: add initial support for Google i.MX 8MQ Phanbell
This patch adds the device tree to support Google Coral Edge TPU,
historicaly named as fsl-imx8mq-phanbell, a computer on module
which can be used for AI/ML propose.

It introduces a minimal enablement support for this module and
was totally based on the NXP i.MX 8MQ EVK board and i.MX 8MQ Phanbell
Google Source Code for Coral Edge TPU Mendel release:
https://coral.googlesource.com/linux-imx/

Tested components:
- PMIC;
- USB-C OTG;
- USB-C PWR;
- micro-USB;
- USB.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 15:38:28 +08:00
Adam Ford 24a572bf67 arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error.
This patch changes to ahb clock from SDMA1_ROOT to AHB which
fixes the timeout error.

Fixes:  a05ea40eb3 ("arm64: dts: imx: Add i.mx8mm dtsi support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 15:36:45 +08:00
Yinbo Zhu 33eae7fb2e arm64: dts: ls1028a: fix endian setting for dcfg
DCFG block uses little endian.  Fix it so that register access becomes
correct.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Fixes: 8897f3255c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 14:48:48 +08:00
Yinbo Zhu 00187f4911 arm64: dts: ls1028a-rdb: enable emmc hs400 mode
This patch is to enable emmc hs400 mode for ls1028ardb.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 14:43:53 +08:00
Peng Ma 869bf85429 arm64: dts: ls1028a: Update edma compatible to fit eDMA driver
The eDMA of LS1028A soc has a little bit different from others, So we
should distinguish them in driver by compatible.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:56:25 +08:00
Peng Fan aebf07e63e arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
There is no binding doc for these compatible string
"fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough
for aips usage, so drop the upper two.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:54:42 +08:00
Frieder Schrempf 2728c4a124 arm64: dts: imx8mm: Add missing mux options for UART1 and UART2 signals
According to the reference manual and the "Pins Tool" from NXP, the
signals for UART1 and UART2 can be muxed to the SAI2 and SAI3 pads
respectively. Let's add the missing options.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:41:38 +08:00
Rabeeh Khoury 0e8322dc5e arm64: dts: lx2160a: add dts for CEX7 platforms
The device tree enables the following features -
1. dpmac17 RGMII MAC connected to Atheros AR8035 phy
2. 2x MDIO busses
3. 2x USB 3.0 controllers
4. 4x SATA ports
5. MT35X 512Mb SPI flash
6. Temperature sensor on i2c0 channel 3
7. AMC6821 temperature and PWM fan controller (not fitted)

The module supports AMC6821 PWM controller which is not currently
assembled on currently available Com Express 7 hardware.

This commit adds support for the Clearfog CX and Honeycomb variants,
which are indentical in this patch, but once QSFP support is finished,
only the Clearfog CX will have a QSFP description.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
[Add Makefile patch, split into clearfog-cx and honeycomb variants,
reworded commit -- rmk]
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:36:36 +08:00
Russell King 5705b9dcda arm64: dts: lx2160a: add emdio2 node
Add a description for the emdio2 controller to the lx2160a dtsi file,
so we can use it in the SolidRun Clearfog CX platform.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:36:25 +08:00
Linus Torvalds a313c8e056 PPC:
* Fix a bug where we try to do an ultracall on a system without an ultravisor.
 
 KVM:
 - Fix uninitialised sysreg accessor
 - Fix handling of demand-paged device mappings
 - Stop spamming the console on IMPDEF sysregs
 - Relax mappings of writable memslots
 - Assorted cleanups
 
 MIPS:
 - Now orphan, James Hogan is stepping down
 
 x86:
 - MAINTAINERS change, so long Radim and thanks for all the fish
 - supported CPUID fixes for AMD machines without SPEC_CTRL
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "PPC:
   - Fix a bug where we try to do an ultracall on a system without an
     ultravisor

  KVM:
   - Fix uninitialised sysreg accessor
   - Fix handling of demand-paged device mappings
   - Stop spamming the console on IMPDEF sysregs
   - Relax mappings of writable memslots
   - Assorted cleanups

  MIPS:
   - Now orphan, James Hogan is stepping down

  x86:
   - MAINTAINERS change, so long Radim and thanks for all the fish
   - supported CPUID fixes for AMD machines without SPEC_CTRL"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  MAINTAINERS: remove Radim from KVM maintainers
  MAINTAINERS: Orphan KVM for MIPS
  kvm: x86: Host feature SSBD doesn't imply guest feature AMD_SSBD
  kvm: x86: Host feature SSBD doesn't imply guest feature SPEC_CTRL_SSBD
  KVM: PPC: Book3S HV: Don't do ultravisor calls on systems without ultravisor
  KVM: arm/arm64: Properly handle faulting of device mappings
  KVM: arm64: Ensure 'params' is initialised when looking up sys register
  KVM: arm/arm64: Remove excessive permission check in kvm_arch_prepare_memory_region
  KVM: arm64: Don't log IMP DEF sysreg traps
  KVM: arm64: Sanely ratelimit sysreg messages
  KVM: arm/arm64: vgic: Use wrapper function to lock/unlock all vcpus in kvm_vgic_create()
  KVM: arm/arm64: vgic: Fix potential double free dist->spis in __kvm_vgic_destroy()
  KVM: arm/arm64: Get rid of unused arg in cpu_init_hyp_mode()
2019-12-22 10:26:59 -08:00
Bjorn Andersson d83d8d7b8a arm64: defconfig: Enable ATH10K_SNOC
The ath10k snoc is found on the Qualcomm QCS404 and SDM845, so enable
the driver for this.

Tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191028171837.3907550-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-21 13:06:16 -08:00
Bjorn Andersson 2e198c395a arm64: dts: qcom: db845c: Enable ath10k 8bit host-cap quirk
The WiFi firmware used on db845c implements the 8bit host-capability
message, so enable the quirk for this.

Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191113232245.4039932-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-21 13:06:04 -08:00
Douglas Anderson 276bb28c29 arm64: dts: qcom: sdm845: Rename gic-its node to msi-controller
This is just like commit ac00546a67 ("arm64: dts: qcom: sc7180:
Rename gic-its node to msi-controller") but for sdm845.  This fixes
all arm64/qcom device trees that I could find.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191216222021.1.I684f124a05a1c3f0b113c8d06d5f9da5d69b801e@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-21 12:12:45 -08:00
Jagan Teki 29478208c0 arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has
- VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.

VAMRC RK3399Pro SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N10 SBC.

So, add initial support for Rock Pi N10 by including rk3399,
rk3399pro vamrc-som and raxda dalang carrier board dtsi files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20191216174711.17856-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-21 13:14:44 +01:00
Jagan Teki 4885335331 arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
VMARC RK3399Pro SOM is a standard SMARC SOM design with
Rockchip RK3399Pro SoC, which is designed by Vamrs.

Specification:
- Rockchip RK3399Pro
- PMIC: RK809-3
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP

Add initial support for VMARC RK3399Pro SOM, this would use
with associated carrier board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20191216174711.17856-3-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-21 13:14:29 +01:00
Soeren Moch e09dabe49c arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
With enabled wifi support (required for firmware loading) for the
Ampak AP6359SA based wifi/bt combo module we now also can enable
the bluetooth part.

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Soeren Moch <smoch@web.de>
Link: https://lore.kernel.org/r/20191218223523.30154-3-smoch@web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-21 12:57:22 +01:00
Soeren Moch 7c5b6bfb14 arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
RockPro64 supports an Ampak AP6359SA based wifi/bt combo module.
The BCM4359/9 wifi controller in this module is connected to sdio0,
enable this interface.

Use the in-band sdio irq instead of the out-of-band wifi_host_wake_l
signal since the latter is not working reliably on this board (probably
due to it's PCIe WAKE# connection).

Signed-off-by: Soeren Moch <smoch@web.de>
Link: https://lore.kernel.org/r/20191218223523.30154-2-smoch@web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-21 12:56:32 +01:00
Linus Torvalds 3939f2c866 arm64 fixes:
- Leftover put_cpu() in the perf/smmuv3 error path.
 
 - Add Hisilicon TSV110 to spectre-v2 safe list
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - Leftover put_cpu() in the perf/smmuv3 error path.

 - Add Hisilicon TSV110 to spectre-v2 safe list

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: cpu_errata: Add Hisilicon TSV110 to spectre-v2 safe list
  perf/smmuv3: Remove the leftover put_cpu() in error path
2019-12-20 13:36:49 -08:00
Sibi Sankar a9ee66deec arm64: dts: qcom: msm8998: Add ADSP, MPSS and SLPI nodes
This patch adds ADSP, MPSS and SLPI nodes for MSM8998 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218132217.28141-6-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-20 10:02:45 -08:00
Sibi Sankar fda8fba668 arm64: dts: qcom: msm8998: Update reserved memory map
Update existing and add missing regions to the reserved memory map, as
described in version 7.1

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218132217.28141-5-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-20 10:02:43 -08:00
Wei Li aa638cfe3e arm64: cpu_errata: Add Hisilicon TSV110 to spectre-v2 safe list
HiSilicon Taishan v110 CPUs didn't implement CSV2 field of the
ID_AA64PFR0_EL1, but spectre-v2 is mitigated by hardware, so
whitelist the MIDR in the safe list.

Signed-off-by: Wei Li <liwei391@huawei.com>
[hanjun: re-write the commit log]
Signed-off-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-20 17:57:22 +00:00
Fabrizio Castro ae56c940f1 arm64: dts: renesas: Add EK874 board with idk-2121wr display support
The EK874 is advertised as compatible with panel IDK-2121WR from
Advantech, however the panel isn't sold alongside the board.
A new dts, adding everything that's required to get the panel to
to work with the EK874, is the most convenient way to support the
EK874 when it's connected to the IDK-2121WR.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1576590361-28244-7-git-send-email-fabrizio.castro@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 111cc9ace2 arm64: dts: renesas: r8a77961: Add SDHI nodes
Add device nodes for the SDHI Interfaces on the Renesas R-Car M3-W+
(r8a77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-7-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 19d40e5513 arm64: dts: renesas: r8a77961: Add I2C nodes
Add device nodes for the I2C and IIC Controllers on the Renesas R-Car
M3-W+ (r8a77961) SoC, including DMA properties linking them to the DMA
controllers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-6-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 8372579d5b arm64: dts: renesas: r8a77961: Add SYS-DMAC nodes
Add device nodes for the System DMA Controllers (SYS-DMAC) on the
Renesas R-Car M3-W+ (r8a77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-5-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 9ccf74a93d arm64: dts: renesas: r8a77961: Add RAVB node
Add a device node for the Ethernet AVB (RAVB) interface on the Renesas
R-Car M3-W+ (r8a77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-4-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven c6ef2b3498 arm64: dts: renesas: r8a77961: Add GPIO nodes
Add device nodes for the GPIO controllers on the Renesas R-Car M3-W+
(r8a77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-3-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 36065b0715 arm64: dts: renesas: r8a77961: Add RWDT node
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car M3-W+ (r8a77961) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191216124740.16647-2-geert+renesas@glider.be
2019-12-20 17:24:05 +01:00
Kuninori Morimoto bf2b74ce9b arm64: dts: renesas: r8a77990: ebisu: Remove clkout-lr-synchronous from sound
rcar_sound doesn't support clkout-lr-synchronous in upstream.
It was supported under out-of-tree rcar_sound.
upstream rcar_sound is supporting
	- clkout-lr-synchronous
	+ clkout-lr-asynchronous

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87mubt3tux.wl-kuninori.morimoto.gx@renesas.com
Fixes: 56629fcba9 ("arm64: dts: renesas: ebisu: Enable Audio")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20 17:24:05 +01:00
Geert Uytterhoeven 993f2c9abe arm64: dts: renesas: r8a77970: Group tuples in thermal reg property
To improve human readability and enable automatic validation, the tuples
in "reg" properties should be grouped.

Fix this by grouping the tuples in the thermal node's "reg" property
using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-9-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:50:15 +01:00
Geert Uytterhoeven 9504a9f27a arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties
To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI device nodes should
be grouped.

Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:50:10 +01:00
Geert Uytterhoeven 0aab5b914b arm64: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped.  While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property.

Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-7-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:50:06 +01:00
Geert Uytterhoeven 36f062124d arm64: dts: renesas: Group tuples in regulator-gpio states properties
To improve human readability and enable automatic validation, the tuples
in the "states" properties of device nodes compatible with
"regulator-gpio" should be grouped, as reported by "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
    arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dt.yaml: regulator-vccq-sdhi0: states:0: Additional items are not allowed (1800000, 0 were unexpected)
    arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dt.yaml: regulator-vccq-sdhi0: states:0: [3300000, 1, 1800000, 0] is too long
    arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dt.yaml: regulator-vccq-sdhi3: states:0: Additional items are not allowed (1800000, 0 were unexpected)
    arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dt.yaml: regulator-vccq-sdhi3: states:0: [3300000, 1, 1800000, 0] is too long
    ...

Fix this by grouping the tuples using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-6-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:49:31 +01:00
Mark Brown 0e89640b64 crypto: arm64 - Use modern annotations for assembly functions
In an effort to clarify and simplify the annotation of assembly functions
in the kernel new macros have been introduced. These replace ENTRY and
ENDPROC and also add a new annotation for static functions which previously
had no ENTRY equivalent. Update the annotations in the crypto code to the
new macros.

There are a small number of files imported from OpenSSL where the assembly
is generated using perl programs, these are not currently annotated at all
and have not been modified.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-20 14:58:35 +08:00
Sibi Sankar f5ab220d16 arm64: dts: qcom: sc7180: Add remoteproc enablers
Add scm, smem, smp2p, aoss-qmp, aoss-cc and pdc-global device nodes
to SC7180 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218143332.29107-1-sibis@codeaurora.org
[bjorn: Updated subject]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-19 18:14:55 -08:00
Sibi Sankar fea8930bd5 arm64: dts: qcom: sm8150: Add cpufreq HW device node
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191219120633.20723-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-19 16:41:56 -08:00
Sai Prakash Ranjan 9692d9ffa8 arm64: dts: qcom: qcs404: Update the compatible for watchdog timer
Update the compatible for QCS404 watchdog timer with proper
SoC specific compatible.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/757995875cc12d3f5a8f5fd5659b04653950970a.1576211720.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-19 16:37:44 -08:00
Olof Johansson 43522b78b5 arm64: dts: agilex/stratix10: fix pmu interrupt numbers
- Fix incorrect PMU interrupts numbers on the Agilex/Stratix10 platforms
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Merge tag 'socfpga_dts_fix_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

arm64: dts: agilex/stratix10: fix pmu interrupt numbers
- Fix incorrect PMU interrupts numbers on the Agilex/Stratix10 platforms

* tag 'socfpga_dts_fix_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: agilex/stratix10: fix pmu interrupt numbers

Link: https://lore.kernel.org/r/20191218161336.32377-1-dinguyen@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-18 10:39:11 -08:00
Douglas Anderson 29c5cb641b arm64: dts: qcom: sc7180: Fix I2C/UART numbers 2, 4, 7, and 9
Commit f4a73f5e26 ("pinctrl: qcom: sc7180: Add new qup functions")
has landed which means that we absolutely need to use the proper names
for the pinmuxing for I2C/UART numbers 2, 4, 7, and 9.  Let's do it.

For reference:
- If you get only one of this commit and the pinctrl commit then none
  of I2C/UART 2, 4, 7, and 9 will work.
- If you get neither of these commits then I2C 2, 4, 7, and 9 will
  work but not UART.

...but despite the above it should be fine for this commit to land in
the Qualcomm tree because sc7180.dtsi only exists there (it hasn't
made it to mainline).

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191217130352.1.Id8562de45e8441cac34699047e25e7424281e9d4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-18 09:57:34 -08:00
Paolo Bonzini f5d5f5fae4 KVM/arm fixes for .5.5, take #1
- Fix uninitialised sysreg accessor
 - Fix handling of demand-paged device mappings
 - Stop spamming the console on IMPDEF sysregs
 - Relax mappings of writable memslots
 - Assorted cleanups
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Merge tag 'kvmarm-fixes-5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master

KVM/arm fixes for .5.5, take #1

- Fix uninitialised sysreg accessor
- Fix handling of demand-paged device mappings
- Stop spamming the console on IMPDEF sysregs
- Relax mappings of writable memslots
- Assorted cleanups
2019-12-18 17:47:38 +01:00
Jeffrey Hugo 28d647fd83 arm64: dts: msm8998-clamshell: Add pm8005_s1 regulator
The pm8005_s1 is VDD_GFX, and needs to be on to enable the GPU.
This should be hooked up to the GPU CPR, but we don't have support for that
yet, so until then, just turn on the regulator and keep it on so that we
can focus on basic GPU bringup.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191217170249.5280-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-17 22:23:11 -08:00
Maulik Shah 456d677c4e arm64: dts: qcom: sc7180: Add wakeup parent for TLMM
Specify wakeup parent irqchip for sc7180 TLMM.

Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1572419178-5750-3-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-17 22:20:13 -08:00
Sibi Sankar 49076351a2 arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI remoteprocs
Add ADSP, CDSP, MPSS and SLPI device tree nodes for SM8150 SoC.

Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191217092503.10699-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-17 22:18:58 -08:00
Matthias Kaehlcke 7cee5c7428 arm64: dts: qcom: sc7180: Fix node order
The SC7180 device tree nodes should be ordered by address. Re-shuffle
some nodes which currently don't follow this convention.

Since we are already moving it add a missing leading zero to the
address in the 'reg' property of the 'interrupt-controller@b220000'
node.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212170824.v2.1.I55198466344789267ed1eb5ec555fd890c9fc6e1@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-17 21:35:44 -08:00
Jeffrey Hugo 8529728f25 arm64: dts: qcom: msm8998: Fixup uart3 gpio config for bluetooth
It turns out that the wcn3990 can float the gpio lines during bootup, etc
which will result in the uart core thinking there is incoming data.  This
results in the bluetooth stack getting garbage.  By applying a bias to
match what wcn3990 would drive, the issue is corrected.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191021161921.31825-1-jeffrey.l.hugo@gmail.com
[bjorn: Moved board specific pinctrl states to the end]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-17 21:26:58 -08:00
Stephen Boyd 39523c56b6 arm64: dts: qcom: sdm845-cheza: Add cr50 spi node
Add the cr50 device to the spi controller it is attached to. This
enables /dev/tpm0 and some login things on Cheza.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191216234204.190769-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-16 19:10:11 -08:00
Sibi Sankar 61025b815e arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI smp2p
Add the SMP2P nodes for the remoteproc states for ADSP, CDSP, MPSS and
SLPI remoteprocs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e80793dfa-9d0f6e93-01db-4c95-a226-d64bb50238cb-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-16 15:45:57 -08:00
Dinh Nguyen 210de0e996 arm64: dts: agilex/stratix10: fix pmu interrupt numbers
Fix up the correct interrupt numbers for the PMU unit on Agilex
and Stratix10.

Fixes: 78cd6a9d8e ("arm64: dts: Add base stratix 10 dtsi")
Cc: linux-stable <stable@vger.kernel.org>
Reported-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-12-16 16:14:15 -06:00
Jerome Brunet 865a0d06f8 arm64: dts: meson: add libretech-pc boards support
Add support for the the amlogic libretech-pc platform, aka tartiflette.
There is 2 variants of the platform, one with the s905d, the other with
the s912.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-16 11:34:52 -08:00
Jerome Brunet f8683c2abd arm64: defconfig: enable FUSB302 as module
Enable the type C fusb302 driver as module

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-16 11:34:29 -08:00
Jerome Brunet 4e11697528 arm64: dts: meson: gxl: add i2c C pins
Add the DV18 and DV19 pinmux setting for the i2c C of the gxl family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-16 11:34:05 -08:00
Clément Péron cabbaed719
arm64: dts: allwinner: unify header comment style
Allwinner device tree files used different comment style for
copyright notice.

Update this to keep a coherency.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-16 11:16:14 +01:00
Clément Péron b4b8f2c961
arm64: dts: allwinner: Convert license to SPDX identifier
Use a shorter SPDX identifier instead of pasting the
whole license.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-16 11:16:04 +01:00
Clément Péron d2ab1a6756
arm64: dts: allwinner: Fix wrong license header
Some headers specify that files are under dual-licensed GPL2.0+
and X11. But in fact, it turns out that the full licenses texts
associated are GPL2.0+ and MIT.

Fix license headers to reflect real licenses associated.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-16 11:15:55 +01:00
Katsuhiro Suzuki c2753d15d2 arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
This patch splits rk3399-rockpro64 dts file to 2 files for v2 and
v2.1 boards.

Both v2 and v2.1 boards can use almost same settings but we find a
difference in I2C address of audio CODEC ES8136.

Reported-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20191202055929.26540-1-katsuhiro@katsuster.net
[put pine64,rockpro64-v2.* into an enum]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-16 10:56:26 +01:00
Heiko Stuebner 0c556dea08 arm64: dts: rockchip: enable the gpu on px30-evb
The px30 has a Mali Bifrost gpu, so enable it on the evb board
and connect it with its supplying regulator.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191208145508.3124-3-heiko@sntech.de
2019-12-16 10:32:30 +01:00
Heiko Stuebner a07f34a083 arm64: dts: rockchip: add the gpu for px30
The px30 contains a Mali Bifrost gpu, so add the necessary core node
for it with interrupts and powerdomains.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191208145508.3124-2-heiko@sntech.de
2019-12-16 10:32:20 +01:00
Hsin-Yi Wang 1180beb08b arm64: dts: mt8173: add Mediatek JPEG Codec
Add JPEG codec node in mt8173.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-12-14 22:39:38 +01:00
Neil Armstrong 302d95c613 arm64: dts: meson-sm1: add video decoder compatible
Add the video decoder specific compatible for Amlogic SM1 SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-13 08:52:41 -08:00
Maxime Jourdan fbceee82c1 arm64: dts: meson-g12-common: add video decoder node
Add the video decoder node for the Amlogic G12A and compatible SoC.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-13 08:50:48 -08:00
Geert Uytterhoeven 83772e1b44 arm64: dts: renesas: Rename r8a7796* to r8a77960*
CONFIG_ARCH_R8A7796 was renamed to CONFIG_ARCH_R8A77960 in commit
39e57e14d7 ("soc: renesas: Add ARCH_R8A77960 for existing R-Car
M3-W"), to avoid confusion between R-Car M3-W (R8A77960) and R-Car M3-W+
(R8A77961).

Rename the DTS files as well, for consistency.

Note that DT binding headers, definitions, and compatible values were
not renamed, to preserve backward compatibility.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211131311.23661-1-geert+renesas@glider.be
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-12-13 14:36:46 +01:00
Geert Uytterhoeven 8792422673 arm64: dts: renesas: Remove use of ARCH_R8A7796
CONFIG_ARCH_R8A7796 was renamed to CONFIG_ARCH_R8A77960 in commit
39e57e14d7 ("soc: renesas: Add ARCH_R8A77960 for existing R-Car
M3-W"), so its users can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211100438.7094-1-geert+renesas@glider.be
2019-12-13 14:35:33 +01:00
Robin Murphy 36be91112f arm64: dts: rockchip: Add GPU cooling device for RK3399
As for RK3288, now that we have a binding for the GPU we can
hook up the missing cooling device for the thermal zone.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/cb905e17526d846d6d35fb86fbd3c8ba4af4cdaf.1574974673.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-13 11:07:45 +01:00
Matwey V. Kornilov cfd66c682e arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
Add 0.9V and 1.8V voltage regulators for Radxa Rock Pi 4 board PCIe.

Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
Link: https://lore.kernel.org/r/20191120161302.5157-1-matwey@sai.msu.ru
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-13 11:05:36 +01:00
Markus Reichl 04a0077fdb arm64: dts: rockchip: Remove always-on properties from regulator nodes on rk3399-roc-pc.
Some regulators don't need the always-on property, remove it.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/f985665c-86c0-1657-14f8-f77e2ce5a3f7@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-13 11:02:09 +01:00
Shile Zhang 1091670637 scripts/sorttable: Rename 'sortextable' to 'sorttable'
Use a more generic name for additional table sorting usecases,
such as the upcoming ORC table sorting feature. This tool is
not tied to exception table sorting anymore.

No functional changes intended.

[ mingo: Rewrote the changelog. ]

Signed-off-by: Shile Zhang <shile.zhang@linux.alibaba.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: linux-kbuild@vger.kernel.org
Link: https://lkml.kernel.org/r/20191204004633.88660-6-shile.zhang@linux.alibaba.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-13 10:47:58 +01:00
Douglas Anderson fd91651664 arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
The bindings for the QMP PHY are truly strange.  I believe (?) that
they may have originated because with PCIe each lane is treated as a
different PHY and the same PHY driver is used for a whole bunch of
things (incluidng PCIe).

In any case, now that we have "make dtbs_check", we find that having
the outer node named "phy" triggers the
"schemas/phy/phy-provider.yaml" schema, yelling about:

  phy@88e9000: '#phy-cells' is a required property

Let's call the outer node the "phy-wrapper" and the inner node the
"phy" to make dtbs_check happy.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.6.Iec10b23bb000186b36b8bacfb6789d8233de04a7@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:18:41 -08:00
Douglas Anderson 3f155dbebf arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
This is just like commit e77cc85ee3 ("arm64: dts: qcom: sdm845:
remove macro from unit name").  It fixes the error in 'make
dtbs_check':

arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: a727ec1232 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.4.I5f67a5ed7665f658c95447a837cbd0021e1dc689@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:23 -08:00
Douglas Anderson 6e3697279e arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
Running "dtbs_check" yells:
  '#clock-cells' is a dependency of 'clock-output-names'

...and sure enough the bindings say we should have "#clock-cells".
Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.3.Ia530e4065ca81f55ac8f89a400f6a0a084ff6712@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:17 -08:00
Douglas Anderson ac00546a67 arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
Running `make dtbs_check` yells:

  arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema

From "arm,gic-v3.yaml" we can grok that this is explained by the
comment "msi-controller is preferred".  Switch to the preferred name
so that dtbs_check stops yelling.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.2.Ibad7d3b0bea02957e89047942c61cc6c0aa61715@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:08 -08:00
Douglas Anderson d8c5133583 arm64: dts: qcom: sc7180: Add SoC name to compatible
Running `make dtbs_check` yells because qcom.yaml says that we should
have:

- items:
    - enum:
        - qcom,sc7180-idp
    - const: qcom,sc7180

...but we're missing "qcom,sc7180".  Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.1.I158061c65974bf0f653ceb79b442b76a1fd64868@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:14:59 -08:00
Anurag Kumar Vulisha df906cf54b arm64: zynqmp: Add dr_mode property to usb node
This patch adds dr_mode property to the usb node for
zynqmp boards.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-12 15:41:04 +01:00
Laurent Pinchart a6764cbda6 arm64: dts: zynqmp: Use decimal values for drm-clock properties
The #clock-cells and clock-accuracy properties are all expressed in
decimal, except for the drm-clock. Fix it, as decimal is easier to read
for those properties.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-12 15:39:56 +01:00
Manish Narani a8fdb80f4d arm64: zynqmp: Add ZynqMP SDHCI compatible string
Add the new compatible string for ZynqMP SD Host Controller for its use
in the Arasan SDHCI driver for some of the ZynqMP specific operations.
Add required properties for the same.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-12 15:38:58 +01:00
Will Deacon 1ce74e96c2 KVM: arm64: Ensure 'params' is initialised when looking up sys register
Commit 4b927b94d5 ("KVM: arm/arm64: vgic: Introduce find_reg_by_id()")
introduced 'find_reg_by_id()', which looks up a system register only if
the 'id' index parameter identifies a valid system register. As part of
the patch, existing callers of 'find_reg()' were ported over to the new
interface, but this breaks 'index_to_sys_reg_desc()' in the case that the
initial lookup in the vCPU target table fails because we will then call
into 'find_reg()' for the system register table with an uninitialised
'param' as the key to the lookup.

GCC 10 is bright enough to spot this (amongst a tonne of false positives,
but hey!):

  | arch/arm64/kvm/sys_regs.c: In function ‘index_to_sys_reg_desc.part.0.isra’:
  | arch/arm64/kvm/sys_regs.c:983:33: warning: ‘params.Op2’ may be used uninitialized in this function [-Wmaybe-uninitialized]
  |   983 |   (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2);
  | [...]

Revert the hunk of 4b927b94d5 which breaks 'index_to_sys_reg_desc()' so
that the old behaviour of checking the index upfront is restored.

Fixes: 4b927b94d5 ("KVM: arm/arm64: vgic: Introduce find_reg_by_id()")
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191212094049.12437-1-will@kernel.org
2019-12-12 09:52:49 +00:00
Sibi Sankar 017e7856ed arm64: dts: sm8150: Add rpmh power-domain node
Add the DT node for the rpmhpd power controller.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99eab9-35efa01f-8ed3-4a77-87e1-09c381173121-000000@us-west-2.amazonses.com
[bjorn: Use constant for opp6, until include lands]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 23:33:46 -08:00
Rajendra Nayak 9868a31c31 arm64: dts: sc7180: Add aliases for all i2c and spi devices
Add aliases for all i2c and spi nodes

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cded0a-f85e1f98-f3be-4f6f-805f-82f8b6a83e14-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:51:16 -08:00
Rajendra Nayak d8b076b891 arm64: dts: sc7180: Remove additional spi chip select muxes
remove the additional CS muxes that were added by default for
spi so every board using sc7180 does not have to override it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cdad4a-cbfbc482-1f74-4cb7-88fc-b4b6ed7e7543-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:51:04 -08:00
Loic Poulain 4868f573a7 arm: dts: qcom: db410c: Enable USB OTG support
The Dragonboard-410c is able to act either as USB Host or Device.
The role can be determined at runtime via the USB_HS_ID pin which is
derived from the micro-usb port VBUS pin.

In Host role, SoC USB D+/D- are routed to the onboard USB 2.0 HUB.
In Device role, SoC USB D+/D- are routed to the USB 2.0 micro B port.
Routing is selected via USB_SW_SEL_PM gpio.

In device role USB HUB can be held in reset.

chipidea driver expects two extcon device pointers, one for the
EXTCON_USB event and one for the EXTCON_USB_HOST event. Since
the extcon-usb-gpio device is capable of generating both these
events, point two times to this extcon device.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1576083014-5842-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:48:37 -08:00
Stephan Gerhold 741a5ea7a6 arm64: dts: qcom: pm8916: Add vibration motor node
PM8916 has one vibration motor driver that is already supported
by the pm8xxx-vibrator driver.

Add a node describing it to pm8916.dtsi.
Keep it disabled by default since not all devices make use of it.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191211192906.56638-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:40:35 -08:00
Michael Walle 3f0fb37b22 arm64: dts: ls1028a: fix reboot node
The reboot register isn't located inside the DCFG controller, but in its
own RST controller. Fix it.

Fixes: 8897f3255c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-12 09:59:38 +08:00
Daniel Borkmann 81c22041d9 bpf, x86, arm64: Enable jit by default when not built as always-on
After Spectre 2 fix via 290af86629 ("bpf: introduce BPF_JIT_ALWAYS_ON
config") most major distros use BPF_JIT_ALWAYS_ON configuration these days
which compiles out the BPF interpreter entirely and always enables the
JIT. Also given recent fix in e1608f3fa8 ("bpf: Avoid setting bpf insns
pages read-only when prog is jited"), we additionally avoid fragmenting
the direct map for the BPF insns pages sitting in the general data heap
since they are not used during execution. Latter is only needed when run
through the interpreter.

Since both x86 and arm64 JITs have seen a lot of exposure over the years,
are generally most up to date and maintained, there is more downside in
!BPF_JIT_ALWAYS_ON configurations to have the interpreter enabled by default
rather than the JIT. Add a ARCH_WANT_DEFAULT_BPF_JIT config which archs can
use to set the bpf_jit_{enable,kallsyms} to 1. Back in the days the
bpf_jit_kallsyms knob was set to 0 by default since major distros still
had /proc/kallsyms addresses exposed to unprivileged user space which is
not the case anymore. Hence both knobs are set via BPF_JIT_DEFAULT_ON which
is set to 'y' in case of BPF_JIT_ALWAYS_ON or ARCH_WANT_DEFAULT_BPF_JIT.

Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Martin KaFai Lau <kafai@fb.com>
Link: https://lore.kernel.org/bpf/f78ad24795c2966efcc2ee19025fa3459f622185.1575903816.git.daniel@iogearbox.net
2019-12-11 16:16:01 -08:00
Bibby Hsieh d3c306e31b arm64: dts: add gce node for mt8183
add gce device node for mt8183

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-12-11 19:55:51 +01:00
michael.kao 19f62c76f1 arm64: dts: mt8173: Add dynamic power node.
This device node is for calculating dynamic power in mW.
Since mt8173 has two clusters, there are two dynamic power
coefficient as well.

Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Signed-off-by: Michael.Kao <michael.kao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-12-11 19:06:01 +01:00
Michael Walle 9c015e13c8 arm64: dts: ls1028a: put SAIs into async mode
The LS1028A SoC has only unidirectional SAIs. Therefore, it doesn't make
sense to have the RX and TX part synchronous. Even worse, the RX part
wont work out of the box because by default it is configured as
synchronous to the TX part. And as said before, the pinmux of the SoC
can only be configured to route either the RX or the TX signals to the
SAI but never both at the same time. Thus configure the asynchronous
mode by default.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 17:20:20 +08:00
Clément Péron 012af55314
arm64: dts: allwiner: Fix typo in dual licensed SPDX identifier
With dual licensed SPDX identifier the "OR" should
be uppercase.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-11 10:19:11 +01:00
Stefan Mavrodiev f0c3b29f56
arm64: dts: allwinner: a64: olinuxino: Add bank supply regulators
Allwinner A64 SoC has separate supplies for PC, PD, PE, PG and PL. This
patch adds regulators for them to the pinctrl node.

Exception is PL which is used by the RSB bus. To avoid circular
dependencies, VCC-PL is omitted.

On boards with eMMC, VCC-PC is supplied by ELDO1, instead of DCDC1.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
[Maxime: Changed the r_pio comment a bit]
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-11 10:19:11 +01:00
Jernej Skrabec 88432f5f84
arm64: dts: allwinner: h6: Add PWM node
Allwinner H6 PWM is similar to that in A20 except that it has additional
bus clock and reset line.

Note that first PWM channel is connected to output pin and second
channel is used internally, as a clock source to AC200 co-packaged chip.
This means that any combination of these two channels can be used and
thus it doesn't make sense to add pinctrl nodes at this point.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-11 10:19:10 +01:00
Michael Walle 434f9cc1f7 arm64: dts: ls1028a: add missing sai nodes
The LS1028A has six SAI cores.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 17:16:15 +08:00
Michael Walle 961f8209c8 arm64: dts: ls1028a: fix typo in TMU calibration data
The temperature sensor may jump backwards because there is a wrong
calibration value. Both values have to be monotonically increasing.
Fix it.

This was tested on a custom board.

Fixes: 571cebfe8e ("arm64: dts: ls1028a: Add Thermal Monitor Unit node")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 17:15:43 +08:00
Ard Biesheuvel 5441c6507b crypto: arm64/ghash-neon - bump priority to 150
The SIMD based GHASH implementation for arm64 is typically much faster
than the generic one, and doesn't use any lookup tables, so it is
clearly preferred when available. So bump the priority to reflect that.

Fixes: 5a22b198cd ("crypto: arm64/ghash - register PMULL variants ...")
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11 16:36:55 +08:00
Sami Tolvanen 6320a15e98 crypto: arm64/sha - fix function types
Instead of casting pointers to callback functions, add C wrappers
to avoid type mismatch failures with Control-Flow Integrity (CFI)
checking.

Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-12-11 16:36:55 +08:00
Sandeep Maheswaram 0b766e7fe5 arm64: dts: qcom: sc7180: Add USB related nodes
Add nodes for DWC3 USB controller, QMP and QUSB PHYs.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573795421-13989-2-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:49:02 -08:00
Rajeshwari 82bdc93972 arm64: dts: qcom: sc7180: Add device node support for TSENS in SC7180
Add TSENS node and user thermal zone for TSENS sensors in SC7180.

Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1574934847-30372-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:46:25 -08:00
Jeffrey Hugo 876a757370 arm64: dts: qcom: msm8998: Add gpucc node
Add MSM8998 GPU Clock Controller DT node.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191031185806.15602-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:42:25 -08:00
Vinod Koul 3e5bf28d2c arm64: dts: qcom: sm8150-mtp: Enable UFS nodes
Enable the UFS HC and phy nodes and add regulators used by these.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:34:15 -08:00
Vinod Koul 3834a2e922 arm64: dts: qcom: sm8150: Add ufs nodes
Add the ufs hc node and ufs phy nodes found in SM8150

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:34:14 -08:00
Vinod Koul d6f55763c7 arm64: dts: qcom: Use gcc clock enums
Now that header defining gcc clocks is upstream, use the enums instead
of numbers

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084604.1746544-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:28:58 -08:00
Taniya Das 86899d8235 arm64: dts: sc7180: Add cpufreq HW node for cpu scaling
cpufreq hw node required to scale CPU frequency on sc7180.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ed02b6356-5165eaaa-6c54-47ff-a008-821c91831e56-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:15:06 -08:00
Amit Kucheria 2dcb404529 arm64: defconfig: Enable QCOM PMIC thermal
QCOM_SPMI_ADC5 and SPMI_TEMP_ALARM expose thermistors on the PMIC of
several QCOM platforms through the thermal framework. Enable them.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/5f193f2a7508d82037e8f04e73150feee1a2583e.1575887866.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:12:01 -08:00
Manu Gautam d026c96b25 arm64: dts: qcom: msm8996: Disable USB2 PHY suspend by core
QUSB2 PHY on msm8996 doesn't work well when autosuspend by
dwc3 core using USB2PHYCFG register is enabled. One of the
issue seen is that PHY driver reports PLL lock failure and
fails phy_init() if dwc3 core has USB2 PHY suspend enabled.
Fix this by using quirks to disable USB2 PHY LPM/suspend and
dwc3 core already takes care of explicitly suspending PHY
during suspend if quirks are specified.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Paolo Pisati <p.pisati@gmail.com>
Link: https://lore.kernel.org/r/20191209151501.26993-1-p.pisati@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:11:41 -08:00
Sai Prakash Ranjan c831fa2999 arm64: dts: qcom: sc7180: Add Last level cache controller node
Add device tree node for LLCC aka system cache controller for
SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3394291-2290a8be-91c9-4d46-b5ca-acd5277eb6e2-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:51:23 -08:00
Sai Prakash Ranjan fb2d815006 arm64: dts: qcom: sm8150: Add APSS watchdog node
Add APSS (Application Processor Subsystem) watchdog
DT node for SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3393092-487ddf4a-2e17-40f0-8161-3e686a7b57dc-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:51:13 -08:00
Sai Prakash Ranjan 4722f95646 arm64: dts: qcom: sc7180: Add APSS watchdog node
Add APSS (Application Processor Subsystem) watchdog
DT node for SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3391ce3-438cca2f-458c-47d9-a62a-381f1c6bfb15-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:50:29 -08:00
Sai Prakash Ranjan 39abbd3087 arm64: dts: sdm845: Update the device tree node for LLCC
LLCC cache-controller was renamed to system-cache-controller
to make schema pass the dt binding check. Update the device
tree node to reflect this change.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/a2bb92de65e90768bf1d6b8c0b7fbd43cba704d2.1573814758.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:43:33 -08:00
Douglas Anderson a0f9639033 arm64: dts: sc7180: Add a comment to i2c7 about external pullup
Make i2c7 symmetric with the other i2c busses and comment that we have
no internal pull because there is an external one.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.2.I8d4cbb3d7ac5824f8e950c53038df8c27a512905@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:41:07 -08:00
Douglas Anderson 15f1eae346 arm64: dts: sc7180: Fix indentation/ordering of qspi nodes in sc7180-idp
The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section.  Fix.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:40:38 -08:00
Amit Kucheria 809b3c51e6 arm64: dts: msm8916: thermal: Add interrupt support
Register upper-lower interrupt for the tsens controller.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/88eff964b708c8aff57b24370d2e14389ace09e9.1572526427.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 21:23:28 -08:00
Li Jun bf587f8934 arm64: dts: imx8mn-evk: enable usb1 and typec support
USB1 port has typec connector with power delivery support:
- Dual data role: host and device.
- Dual power role: source and sink, prefer power sink.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:50:49 +08:00
Li Jun d51cb99cf3 arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF
Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting
for it.

Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:47:15 +08:00
Ioana Ciornei f4bd225f7c arm64: dts: lx2160a: add RGMII phy nodes
Annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs.
Also, add phy-handles for dpmac17 and dpmac18 to its associated PHY.
The MAC is not capable to add the needed RGMII delays, thus the
"rgmii-id" phy-connection-type is used.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:17:49 +08:00
Ioana Ciornei 6e1b8fae89 arm64: dts: lx2160a: add emdio1 node
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:17:37 +08:00
Ashish Kumar 68a2b3fddb arm64: dts: ls1088a: Add QSPI support for NXP LS1088
Add QSPI node in dtsi(ls1088a), and dts(ls1088ardb, ls1088aqds) boards.

Both ls1088ardb and ls1088aqds has two 64MB flash from SPANSION(s25fs512s).
QUAD I/O is tested in case of read and single I/O is tested in case of
write.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:13:44 +08:00
Ashish Kumar d5cee6cd8b arm64: dts: ls208x: Remove non-compatible driver device from qspi node
Since device properties are different, so remove fsl, ls1021a-qspi.
ls1021a-qspi is to be used only for Big-endian verion of QSPI controller

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:13:41 +08:00
Ashish Kumar 070b761d54 arm64: dts: ls1046a: Update QSPI node properties of ls1046ardb
Update the compatibles to use jedec,spi-nor.
Also update the max-frequency to 50MHz and spi-tx-bus-width to 1.

Align the QSPI node with other similar boards like(ls1088ardb,
ls1046afrwy) as per bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:13:39 +08:00
Kuldeep Singh a932cb2377 arm64: dts: ls1046a: Add QSPI node for ls1046afrwy
This board has a single 64MB mt25qu512a flash.
QUAD I/O read and single I/O write is tested.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:13:37 +08:00
Ashish Kumar c77fae5ba0 arm64: dts: ls1028a: Add FlexSPI support
Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
RDB and QDS are having one SPI-NOR flash device, mt35xu02g
connected at CS0.
This flash device "mt35xu02g" is tested for octal read

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:13:21 +08:00
Lina Iyer aeae948f6a arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845
PDC always-on interrupt controller can detect certain GPIOs even when
the TLMM interrupt controller is powered off. Link the PDC as TLMM's
wakeup parent.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-12-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Lina Iyer 72b67ebf9d arm64: dts: qcom: add PDC interrupt controller for SDM845
Add PDC interrupt controller device bindings for SDM845.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-11-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Jeffrey Hugo 05caa5bf9c arm64: dts: qcom: msm8998: Fix tcsr syscon size
The tcsr syscon region is really 0x40000 in size.  We need access to the
full region so that we can access the axi resets when managing the
modem subsystem.

Fixes: c783394956 ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo 19b7caaa93 arm64: dts: qcom: msm8998: Add wifi node
Add the wifi node and required reserved memory to enable the wlan
hardware.  Enable the wifi node in both the mtp and clamshell platforms
after adding the relevant regulators for each platform.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo a21c954821 arm64: dts: qcom: msm8998: Add anoc2 smmu node
While there are several peripherals on the anoc2, most are not behind the
smmu.  However, the SoC integrated wlan block is behind the smmu, so we'll
need to control the smmu inorder to enable wifi.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Roja Rani Yarubandi ba3fc64963 arm64: dts: sc7180: Add qupv3_0 and qupv3_1
Add QUP SE instances configuration for sc7180.

Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-14-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Taniya Das 0def3f14c5 arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver
Add node for rpmhcc clock driver.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-13-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Kiran Gunda b62e108da5 arm64: dts: qcom: sc7180-idp: Add RPMh regulators
Add the rpmh regulators for the sc7180 idp platform. This platform
consists of PMIC PM6150 and PM6150l

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-12-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda a727ec1232 arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals
Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other
PMIC infra modules.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-11-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda 0f9dc5f09f arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Maulik Shah 22f185ee81 arm64: dts: qcom: sc7180: Add pdc interrupt controller
Add pdc interrupt controller for sc7180

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-9-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah fec6359c28 arm64: dts: qcom: sc7180: Add rpmh-rsc node
Add device bindings for the application processor's rsc. The rsc
contains the TCS that are used for communicating with the hardened
resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-6-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah e0abc5eb52 arm64: dts: qcom: sc7180: Add cmd_db reserved area
Command_db provides mapping for resource key and address managed
by remote processor. Add cmd_db reserved memory area.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-5-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Vivek Gautam d66df6248a arm64: dts: sc7180: Add device node for apps_smmu
Adding device node for APPS SMMU that is connected to
devices such as display, video, usb, mmc, etc. on SC7180
chipset.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-4-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Rajendra Nayak 90db71e480 arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc
Add skeletal sc7180 SoC dtsi and idp board dts files.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-3-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Amit Kucheria e68ca6b6fd arm64: dts: sdm845: thermal: Add critical interrupt support
Register critical interrupts for each of the two tsens controllers

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/c536e9cdb448bbad3441f6580fa57f1f921fb580.1573499020.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Lina Iyer c7b20ce5b4 arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845
Enable PDC interrupt controller for SDM845 devices. The interrupt
controller can detect wakeup capable interrupts when the SoC is in a low
power state.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-13-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:40 -08:00
Bjorn Andersson f27dbbda59 arm64: defconfig: Enable Qualcomm watchdog driver
Enable the driver for the watchdog found in the application processor
subsystem on most modern Qualcomm platforms.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:21 -08:00
Bjorn Andersson 2774e55815 arm64: defconfig: Enable Qualcomm pseudo rng
Most Qualcomm platforms contain a pseudo random number generator
hardware block. Enable the driver for this block and also enable the
interface for exposing this to userspace.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Jeffrey Hugo 4ac0379f9c arm64: defconfig: Enable SN65DSI86 display bridge
This enables display on the Lenovo Yoga C630 by connecting the DSI output
from the SoC to the eDP input of the panel.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Jeffrey Hugo df614ece27 arm64: defconfig: Enable QCA Bluetooth over UART
This enables Bluetooth on the Lenovo Yoga C630.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson a0238c8432 arm64: defconfig: Enable Qualcomm CPUfreq HW driver
The Qualcomm CPUfreq HW provides CPU voltage and frequency scaling on
many modern Qualcomm SoCs. Enable the driver for this hardware block to
enable this functionality on the SDM845 platform.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson e0ff7f9fc3 arm64: defconfig: Enable Qualcomm socinfo driver
The Qualcomm socinfo driver provides SoC information to userspace using
the standard soc interface as well as a number of debugfs entries.

Enable this to allow certain user space tools to acquire this
information, as well as getting developers access to the information in
debugfs that is useful when reporting bugs.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson 603ca8dc62 arm64: defconfig: Enable Qualcomm SPI and QSPI controller
Enable the drivers for GENI SPI and QSPI controllers found on the
Qualcomm SDM845 platform, among others.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:19 -08:00
Bjorn Andersson 6fc73e3f7f arm64: defconfig: Enable Qualcomm remoteproc dependencies
Enable the the power domains, reset controllers and remote block device
memory access drivers necessary to boot the Audio, Compute and Modem
DSPs on Qualcomm SDM845.

None of the power domains are system critical, but needs to be builtin
as the driver core prohibits probe deferal past late initcall.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Alex Elder <elder@linaro.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:19 -08:00
Andre Przywara c35a516a46
arm64: dts: allwinner: H5: Add PMU node
Add the Performance Monitoring Unit (PMU) device tree node to the H5
.dtsi, which tells DT users which interrupts are triggered by PMU
overflow events on each core.
As with the A64, the interrupt numbers from the manual were wrong (off
by 4), the actual SPI IDs have been gathered in U-Boot, and were
verified with perf in Linux.

Tested with perf record and taskset on an OrangePi PC2.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:35 +01:00
Andre Przywara 7aa9b9eb7d
arm64: dts: allwinner: H6: Add PMU mode
Add the Performance Monitoring Unit (PMU) device tree node to the H6
.dtsi, which tells DT users which interrupts are triggered by PMU
overflow events on each core. The numbers come from the manual and have
been checked in U-Boot and with perf in Linux.

Tested with perf record and taskset on a Pine H64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Jernej Skrabec 42ccc3d79b
arm64: dts: allwinner: h6: tanix-tx6: Add IR remote mapping
Tanix TX6 box comes with a remote. Add a mapping for it.

Suggested-by: Michael Lange <linuxstuff@milaw.biz>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Corentin Labbe f33a911750
arm64: dts: allwinner: add pineh64 model B
This patch adds the model B of the PineH64.
The model B is smaller than the pine64 model A and has no PCIE slot.

The only devicetree difference with the pineH64 model A, is the PHY
regulator and the HDMI connector node.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Corentin Labbe 24e9f61c14
arm64: dts: allwinner: sun50i-h6-pine-h64: state that the DT supports the modelA
The current sun50i-h6-pine-h64 DT does not specify which model (A or B)
it supports.
When this file was created, only modelA was existing, but now both model
exists and with the time, this DT drifted to support the model B since it is
the most common one.
Furtheremore, some part of the model A does not work with it like ethernet and
HDMI connector (as confirmed by Jernej on IRC).

So it is time to settle the issue, and the easiest way was to state that
this DT is for model B.
Easiest since only a small name changes is required.
Doing the opposite (stating this file is for model A) will add changes (for
ethernet and HDMI) and so, will break too many setup.

But as asked by the maintainer this patch state this file is for model A.
In the process this patch adds the missing compoments to made it work on
model A.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:34 +01:00
Georgii Staroselskii e69f2736cf
ARM: dts: allwinner: Split out non-SoC specific parts of Neutis N5
A new variant of Emlid Neutis has been inroduced. This one uses H3
instead of H5. The boards are essentially the same. This commit moves
non-SoC-specific parts out so that the common parts could be reused with
ease.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10 10:43:33 +01:00
Ingo Molnar 1f059dfdf5 mm/vmalloc: Add empty <asm/vmalloc.h> headers and use them from <linux/vmalloc.h>
In the x86 MM code we'd like to untangle various types of historic
header dependency spaghetti, but for this we'd need to pass to
the generic vmalloc code various vmalloc related defines that
customarily come via the <asm/page.h> low level arch header.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10 10:12:55 +01:00
Mohammad Rasim db353fa92d arm64: dts: meson-gxbb: add support for Videostrong KII Pro
This patch adds support for the Videostrong KII Pro tv box which is
based on the gxbb-p201 reference design

Device specifications:
- SOC: Amlogic S905
- RAM: 2GB DDR3
- Storage: 16GB
- Connectivity:
	- 10/100M Ethernet (IC Plus IP101GR)
	- 802.11 b/g/n/ac Wi-Fi (Ampak AP6335 BT/WIFI combo)
	- Bluetooth 4.0 (Ampak AP6335 BT/WIFI combo)
- Video out: HDMI 2.0 up to 4K @ 60Hz, and 3.5mm AV (composite video) jack
- Audio out: HDMI, AV (stereo audio) and optical S/PDIF
- Tuner: AVL6862 DVB-C/T/T2 + DVB-S/S2 demod and Rafael Micro R848 tuner
- Ports:
	- x1 micro SD card slot up to 32GB
	- 4x USB 2.0 host ports
- Misc:
    - Power button and LED, IR receiver

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:46:11 -08:00
Qianggui Song e6eeb92d23 arm64: dts: meson: a1: add pinctrl controller support
add peripheral pinctrl controller to a1 SoC

Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:21:56 -08:00
Xingyu Chen 03f2dea752 arm64: dts: meson: add reset controller for Meson-A1 SoC
Add the reset controller device of Meson-A1 SoC family

Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:21:56 -08:00
Guillaume La Roque 30388cc075 arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt
add gpio irq to support interrupt trigger mode.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 15:21:21 -08:00
Kevin Hilman f424da7f78 arm64: dts: meson-sm1-sei610: gpio-keys: switch to IRQs
Switch the GPIO buttons/switches to use interrupts instead of polling.
While at it, add the mic mute switch and the power button.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-12-09 13:38:54 -08:00
Olof Johansson e691c23ebe SoCFPGA DTS updates for v5.5, part 2
- Add NAND support for both Agilex and Stratix10 boards
 - Agilex
 	- Add FPGA manager and Service Layer support
 	- Add EDAC support
 	- Add System manager
 	- Add System manager property to ethernet nodes
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Merge tag 'socfpga_dts_updates_for_v5.5_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.5, part 2
- Add NAND support for both Agilex and Stratix10 boards
- Agilex
	- Add FPGA manager and Service Layer support
	- Add EDAC support
	- Add System manager
	- Add System manager property to ethernet nodes

* tag 'socfpga_dts_updates_for_v5.5_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: agilex: Add SysMgr to Ethernet nodes
  arm64: dts: agilex: Add SysMgr compatible
  arm64: dts: agilex: Add EDAC Device Tree
  arm64: dts: add NAND board files for Stratix10 and Agilex
  arm64: dts: agilex: add NAND IP to base dts

Link: https://lore.kernel.org/r/20191118220559.16623-1-dinguyen@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-09 09:22:49 -08:00
Russell King cd592187f9 arm64: dts: uDPU: SFP cages support 3W modules
The SFP cages are designed to support up to 3W modules, such as G.hn,
G.fast and MoCA modules. Although there is no way for such modules to
declare to software that they consume 3W, we document in DT that this
is the designed power level for these cages.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-12-09 15:30:59 +01:00
Russell King fe3ec631a7 arm64: dts: uDPU: remove i2c-fast-mode
The I2C bus violates the timing specifications when run in fast mode
on the uDPU, so switch to 100kHz mode.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-12-09 15:29:36 +01:00
Russell King 1eebac0240 arm64: dts: uDPU: fix broken ethernet
The uDPU uses both ethernet controllers, which ties up COMPHY 0 for
eth1 and COMPHY 1 for eth0, with no USB3 comphy.  The addition of
COMPHY support made the kernel override the setup by the boot loader
breaking this platform by assuming that COMPHY 0 was always used for
USB3.  Delete the USB3 COMPHY definition at platform level, and add
phy specifications for the ethernet channels.

Fixes: bd3d25b073 ("arm64: dts: marvell: armada-37xx: link USB hosts with their PHYs")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-12-09 15:27:55 +01:00
Markus Reichl a43e290909 arm64: dts: rockchip: Enable MTD Flash on rk3399-roc-pc
rk3399-roc-pc has 16 MB SPI NOR Flash, enable it.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/94f44e1d-86c6-1e32-aa63-56edbd7d75f5@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:23 +01:00
Markus Reichl 140e816a80 arm64: dts: rockchip: Add SDR104 mode to SD-card I/F on rk3399-roc-pc
Add SDR104 capability and regulators to SD card node.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/1b9b8314-8778-2d48-6f7a-3502c2146c42@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Markus Reichl a308163a9d arm64: dts: rockchip: Use correct pin for lcd-reset pinctrl on rk3399-roc-pc
Fix typo according to schematics.
The original pin is needed to enable vcc3v0_sd in second patch of this series.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/cd5fd3a8-b0eb-9dc1-c473-9355762cdaa5@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Kever Yang 88c5a235e8 arm64: dts: rockchip: Fix min voltage for rk3399-firefly vdd_log
The min/max value of vdd_log is decide by pwm IO voltage and its
resistors, the rk3399-firefly board's pwm regulator circuit is designed
for IO voltage at 1.8V, while the board actually use 3.0V for IO, which
at last lead to the min-microvolt to '430mV' instead of '800mV'.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20191111005158.25070-1-kever.yang@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Markus Reichl c38d8009ed arm64: dts: rockchip: Fix vdd_log on rk3399-roc-pc
On rk3399 vdd_log shall not exceed 1.0 V. On rk3399-roc-pc
vdd_log is presently 1118 mV. Fix by setting the min voltage
of the respective pwm-regulator down to 450 mV.
This results in a vdd_log of 953 mV.
Specify the supply to silence warning.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/d786ef47-eda8-3994-2ef2-fc4a584bcdcc@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Markus Reichl a8e611f634 arm64: dts: rockchip: Disable HS400 for mmc on rk3399-roc-pc
Working with rootfs on two 128GB mmcs on rk3399-roc-pc.

One (mmc name 128G72, one screw hole) works fine in HS400 mode.
Other (mmc name DJNB4R, firefly on pcb, two screw holes) gets lots of
mmc1: "running CQE recovery", even hangs with damaged fs,
when running under heavy load, e.g. compiling kernel.
Both run fine with HS200.

Disabling CQ with patch mmc: core: Add MMC Command Queue Support kernel parameter [0] did not help.
[0] 54e264154b

Therefore I propose to disable HS400 mode on roc-pc for now.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/367bf78a-f079-f0b4-68fe-52c86823c174@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Heiko Stuebner 67dd31f715 arm64: dts: rockchip: enable tsadc on px30-evb
Enable the tsadc thermal controller on px30-evb.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191116095249.31193-2-heiko@sntech.de
2019-12-09 09:44:22 +01:00
Heiko Stuebner 023115cdea arm64: dts: rockchip: add thermal infrastructure to px30
Add tsadc and necessary connections to core px30 components.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191116095249.31193-1-heiko@sntech.de
2019-12-09 09:44:22 +01:00
Heiko Stuebner 8554723e66 arm64: dts: rockchip: remove 408MHz operating point from px30
It looks like the px30 is running unstable at this 408MHz operating point.
This shows in stalled threads and other big numbers of kernel exception.

At 600MHz and above it instead works stable and as expected. As the 408MHz
point doesn't even decrease the voltage compared to 600MHz, just drop this
408MHz operating point for now.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20191116095220.31122-1-heiko@sntech.de
2019-12-09 09:44:22 +01:00
Robin Murphy 876816b267 arm64: dts: rockchip: Improve nanopi4 PCIe
Expand the power tree description with the 0V9 and 1V8 supplies to the
RK3399 PCIe block. The NanoPis M4 and NEO4 just route 2 lanes to the
user expansion pins, so there's not much more to say at the board level
for them; NanoPC-T4 has a standard M.2 connector so we can at least
claim the 3.3V supply to that too.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/a04a17f4b9b12e8698c76b34e7ca22f0c81845ce.1573908195.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:22 +01:00
Robin Murphy a793e19c15 arm64: dts: rockchip: Fix NanoPC-T4 cooling maps
Although it appeared to follow logically from the bindings, apparently
the thermal framework can't properly cope with a single cooling device
being shared between multiple maps. The CPU zone is probably easier to
overheat, so remove the references to the (optional) fan from the GPU
cooling zone to avoid things getting confused. Hopefully GPU-intensive
tasks will leak enough heat across to the CPU zone to still hit the
fan trips before reaching critical GPU temperatures.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/5bb39f3115df1a487d717d3ae87e523b03749379.1573908197.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Matwey V. Kornilov 526ba2e2cf arm64: dts: rockchip: Enable PCIe for Radxa Rock Pi 4 board
Radxa Rock Pi 4 is equipped with M.2 PCIe slot,
so enable PCIe for the board.

The changes has been tested with Intel SSD 660p series device.

    01:00.0 Class 0108: Device 8086:f1a8 (rev 03)

Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
Link: https://lore.kernel.org/r/20191117101545.6406-1-matwey@sai.msu.ru
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Anand Moon 635f9a6d9c arm64: dts: rockchip: Add regulators for pcie on rk3399-rock960
As per Rock960 schematics add 0V9 and 1V8 voltage supplies to the
RK3399 PCIe block.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20191117140728.917-1-linux.amoon@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Markus Reichl e748d35527 arm64: dts: rockchip: Enable HDMI Sound on rk3399-roc-pc
HDMI-Sound is the only available sound card on rk3399-roc-pc, enable it.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/c9db5599-743b-bb90-999e-5989be6556ac@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Markus Reichl ec5b0af7da arm64: dts: rockchip: Add regulators for pcie on rk3399-roc-pc
Add regulators to pcie node from schematics.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/8fa0c3da-b64d-f47f-a9eb-b3456a3fd073@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Markus Reichl ec7d731d81 arm64: dts: rockchip: Add node for gpu on rk3399-roc-pc
rk3399-roc-pc has a Mali gpu, enable it for use with panfrost and mesa >19.2.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/c2b88509-129d-46d4-9e23-15d0482951be@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-12-09 09:44:21 +01:00
Lucas Stach fcb1991c46 arm64: dts: imx8mq: add missing SAI nodes
Currently only SAI2 is present in the DT. Add all the other SAI
instances present on the SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 15:49:07 +08:00
Clément Péron 59f3f4dcf6
arm64: dts: allwinner: h6: Enable USB 3.0 host for Beelink GS1 and Tanix TX6
Enable USB 3.0 phy and host controller.

VBUS is directly connected to DCIN 5V and doesn't
require to be switched on.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-09 08:47:15 +01:00
Andre Heider 2c63afdafa
arm64: dts: allwinner: orange-pi-3: Enable IR receiver
Orange Pi 3 has an on-board IR receiver, enable it.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-09 08:47:15 +01:00
Stefan Mavrodiev 3d615c2fc2
arm64: dts: allwinner: a64: olinuxino: Fix SDIO supply regulator
A64-OLinuXino uses DCDC1 (VCC-IO) for MMC1 supply. In commit 916b68cfe4
("arm64: dts: a64-olinuxino: Enable RTL8723BS WiFi") ALDO2 is set, which is
VCC-PL. Since DCDC1 is always present, the boards are working without a
problem.

This patch sets the correct regulator.

Fixes: 916b68cfe4 ("arm64: dts: a64-olinuxino: Enable RTL8723BS WiFi")
Cc: stable@vger.kernel.org # v4.16+
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-09 08:46:59 +01:00
Stefan Mavrodiev 8467ebbf70
arm64: dts: allwinner: a64: olinuxino: Fix eMMC supply regulator
A64-OLinuXino-eMMC uses 1.8V for eMMC supply. This is done via a triple
jumper, which sets VCC-PL to either 1.8V or 3.3V. This setting is different
for boards with and without eMMC.

This is not a big issue for DDR52 mode, however the eMMC will not work in
HS200/HS400, since these modes explicitly requires 1.8V.

Fixes: 94f68f3a4b ("arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)")
Cc: stable@vger.kernel.org # v5.4
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-09 08:46:59 +01:00
Ruslan V. Sushko 4999236e05 arm64: dts: zii-ultra: adjust board names
Change ZII Ultra board names to be more in line with other ZII RDU platforms.

Signed-off-by: Ruslan Sushko <Ruslan.Sushko@zii.aero>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 15:27:18 +08:00
Guido Günther 1987ddfca3 arm64: dts: imx8mq: Add eLCDIF controller
Add a node for the eLCDIF controller, "disabled" by default.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 15:12:31 +08:00
Philipp Zabel 912b9dacf3 arm64: dts: imx8mq: increase NOC clock to 800 MHz
The NOC clock defaults to 400 MHz. Increase it to 800 MHz for improved
memory performance.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 14:19:37 +08:00
Leonard Crestez 0376f6ec9e arm64: dts: imx8m: Add ddr controller nodes
This is used by the imx-ddrc devfreq driver to implement dynamic
frequency scaling of DRAM.

Support for proactive scaling via interconnect will come later. The
high-performance bus masters which need that (display, vpu, gpu) are
mostly not yet enabled in upstream anyway.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 09:22:26 +08:00
Fancy Fang 0f93eb28ff arm64: dts: imx8mn: remove "simple-bus" for anatop
Remove "simple-bus" compatible for device anatop,
since no child nodes exist under it and it is not
a populated bus.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 08:28:52 +08:00
Fancy Fang 0900a48492 arm64: dts: imx8mm: remove "simple-bus" for anatop
Remove "simple-bus" compatible for device anatop,
since no child nodes exist under it and it is not
a populated bus.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 08:28:51 +08:00
Anson Huang c7649739f5 arm64: dts: imx8qxp: Remove unnecessary "interrupt-parent" property
gic is appointed as default interrupt parent for devices, so no need
to specify it again in device nodes which use it as interrupt parent.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09 08:28:51 +08:00
Thomas Gleixner 7ef858dad9 sched/rt, arm64: Use CONFIG_PREEMPTION
CONFIG_PREEMPTION is selected by CONFIG_PREEMPT and by CONFIG_PREEMPT_RT.
Both PREEMPT and PREEMPT_RT require the same functionality which today
depends on CONFIG_PREEMPT.

Switch the Kconfig dependency, entry code and preemption handling over
to use CONFIG_PREEMPTION. Add PREEMPT_RT output in show_stack().

[bigeasy: +traps.c, Kconfig]

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20191015191821.11479-3-bigeasy@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-08 14:37:32 +01:00
Linus Torvalds 347f56fb38 ARM: SoC fixes
A set of fixes that we've merged late, but for the most part that have
 been sitting in -next for a while through platform maintainer trees.
 
  + Fixes to suspend/resume on Tegra, caused by the added features
    this merge window
 
  + Cleanups and minor fixes to TI additions this merge window
 
  + Tee fixes queued up late before the merge window, included here.
 
  + A handful of other fixlets
 
 There's also a refresh of the shareed config files (multi_v* on 32-bit,
 and defconfig on 64-bit), to avoid conflicts when we get new
 contributions.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "A set of fixes that we've merged late, but for the most part that have
  been sitting in -next for a while through platform maintainer trees:

   - Fixes to suspend/resume on Tegra, caused by the added features this
     merge window

   - Cleanups and minor fixes to TI additions this merge window

   - Tee fixes queued up late before the merge window, included here.

   - A handful of other fixlets

  There's also a refresh of the shareed config files (multi_v* on
  32-bit, and defconfig on 64-bit), to avoid conflicts when we get new
  contributions"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: multi_v7_defconfig: Restore debugfs support
  ARM: defconfig: re-run savedefconfig on multi_v* configs
  arm64: defconfig: re-run savedefconfig
  ARM: pxa: Fix resource properties
  soc: mediatek: cmdq: fixup wrong input order of write api
  soc: aspeed: Fix snoop_file_poll()'s return type
  MAINTAINERS: Switch to Marvell addresses
  MAINTAINERS: update Cavium ThunderX drivers
  Revert "arm64: dts: juno: add dma-ranges property"
  MAINTAINERS: Make Nicolas Saenz Julienne the new bcm2835 maintainer
  firmware: arm_scmi: Avoid double free in error flow
  arm64: dts: juno: Fix UART frequency
  ARM: dts: Fix sgx sysconfig register for omap4
  arm: socfpga: execute cold reboot by default
  ARM: dts: Fix vcsi regulator to be always-on for droid4 to prevent hangs
  ARM: dts: dra7: fix cpsw mdio fck clock
  ARM: dts: am57xx-beagle-x15: Update pinmux name to ddr_3_3v
  ARM: dts: omap3-tao3530: Fix incorrect MMC card detection GPIO polarity
  soc/tegra: pmc: Add reset sources and levels on Tegra194
  soc/tegra: pmc: Add missing IRQ callbacks on Tegra194
  ...
2019-12-06 14:19:37 -08:00
Linus Torvalds 9888428102 arm64 updates for 5.5:
- ZONE_DMA32 initialisation fix when memblocks fall entirely within the
   first GB (used by ZONE_DMA in 5.5 for Raspberry Pi 4).
 
 - Couple of ftrace fixes following the FTRACE_WITH_REGS patchset.
 
 - access_ok() fix for the Tagged Address ABI when called from from a
   kernel thread (asynchronous I/O): the kthread does not have the TIF
   flags of the mm owner, so untag the user address unconditionally.
 
 - KVM compute_layout() called before the alternatives code patching.
 
 - Minor clean-ups.
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - ZONE_DMA32 initialisation fix when memblocks fall entirely within the
   first GB (used by ZONE_DMA in 5.5 for Raspberry Pi 4).

 - Couple of ftrace fixes following the FTRACE_WITH_REGS patchset.

 - access_ok() fix for the Tagged Address ABI when called from from a
   kernel thread (asynchronous I/O): the kthread does not have the TIF
   flags of the mm owner, so untag the user address unconditionally.

 - KVM compute_layout() called before the alternatives code patching.

 - Minor clean-ups.

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: entry: refine comment of stack overflow check
  arm64: ftrace: fix ifdeffery
  arm64: KVM: Invoke compute_layout() before alternatives are applied
  arm64: Validate tagged addresses in access_ok() called from kernel threads
  arm64: mm: Fix column alignment for UXN in kernel_page_tables
  arm64: insn: consistently handle exit text
  arm64: mm: Fix initialisation of DMA zones on non-NUMA systems
2019-12-06 14:18:01 -08:00
Mark Rutland 54ad68b777 KVM: arm64: Don't log IMP DEF sysreg traps
We don't intend to support IMPLEMENATION DEFINED system registers, but
have to trap them (and emulate them as UNDEFINED). These traps aren't
interesting to the system administrator or to the KVM developers, so
let's not bother logging when we do so.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20191205180652.18671-3-mark.rutland@arm.com
2019-12-06 19:37:48 +00:00
Heyi Guo de858040ee arm64: entry: refine comment of stack overflow check
Stack overflow checking can be done by testing sp & (1 << THREAD_SHIFT)
only for the stacks are aligned to (2 << THREAD_SHIFT) with size of
(1 << THREAD_SIZE), and this is the case when CONFIG_VMAP_STACK is set.

Fix the code comment to avoid confusion.

Cc: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Heyi Guo <guoheyi@huawei.com>
[catalin.marinas@arm.com: Updated comment following Mark's suggestion]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-06 14:11:31 +00:00
Mark Rutland 70927d02d4 arm64: ftrace: fix ifdeffery
When I tweaked the ftrace entry assembly in commit:

  3b23e4991f ("arm64: implement ftrace with regs")

... my ifdeffery tweaks left ftrace_graph_caller undefined for
CONFIG_DYNAMIC_FTRACE && CONFIG_FUNCTION_GRAPH_TRACER when ftrace is
based on mcount.

The kbuild test robot reported that this issue is detected at link time:

| arch/arm64/kernel/entry-ftrace.o: In function `skip_ftrace_call':
| arch/arm64/kernel/entry-ftrace.S:238: undefined reference to `ftrace_graph_caller'
| arch/arm64/kernel/entry-ftrace.S:238:(.text+0x3c): relocation truncated to fit: R_AARCH64_CONDBR19 against undefined symbol
| `ftrace_graph_caller'
| arch/arm64/kernel/entry-ftrace.S:243: undefined reference to `ftrace_graph_caller'
| arch/arm64/kernel/entry-ftrace.S:243:(.text+0x54): relocation truncated to fit: R_AARCH64_CONDBR19 against undefined symbol
| `ftrace_graph_caller'

This patch fixes the ifdeffery so that the mcount version of
ftrace_graph_caller doesn't depend on CONFIG_DYNAMIC_FTRACE. At the same
time, a redundant #else is removed from the ifdeffery for the
patchable-function-entry version of ftrace_graph_caller.

Fixes: 3b23e4991f ("arm64: implement ftrace with regs")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Torsten Duwe <duwe@lst.de>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-06 13:25:14 +00:00
Sebastian Andrzej Siewior 0492747c72 arm64: KVM: Invoke compute_layout() before alternatives are applied
compute_layout() is invoked as part of an alternative fixup under
stop_machine(). This function invokes get_random_long() which acquires a
sleeping lock on -RT which can not be acquired in this context.

Rename compute_layout() to kvm_compute_layout() and invoke it before
stop_machine() applies the alternatives. Add a __init prefix to
kvm_compute_layout() because the caller has it, too (and so the code can be
discarded after boot).

Reviewed-by: James Morse <james.morse@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-06 12:14:45 +00:00
Catalin Marinas df325e05a6 arm64: Validate tagged addresses in access_ok() called from kernel threads
__range_ok(), invoked from access_ok(), clears the tag of the user
address only if CONFIG_ARM64_TAGGED_ADDR_ABI is enabled and the thread
opted in to the relaxed ABI. The latter sets the TIF_TAGGED_ADDR thread
flag. In the case of asynchronous I/O (e.g. io_submit()), the
access_ok() may be called from a kernel thread. Since kernel threads
don't have TIF_TAGGED_ADDR set, access_ok() will fail for valid tagged
user addresses. Example from the ffs_user_copy_worker() thread:

	use_mm(io_data->mm);
	ret = ffs_copy_to_iter(io_data->buf, ret, &io_data->data);
	unuse_mm(io_data->mm);

Relax the __range_ok() check to always untag the user address if called
in the context of a kernel thread. The user pointers would have already
been checked via aio_setup_rw() -> import_{single_range,iovec}() at the
time of the asynchronous I/O request.

Fixes: 63f0c60379 ("arm64: Introduce prctl() options to control the tagged user addresses ABI")
Cc: <stable@vger.kernel.org> # 5.4.x-
Cc: Will Deacon <will@kernel.org>
Reported-by: Evgenii Stepanov <eugenis@google.com>
Tested-by: Evgenii Stepanov <eugenis@google.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-06 12:02:56 +00:00
Mark Rutland bf4b96bb54 KVM: arm64: Sanely ratelimit sysreg messages
Currently kvm_pr_unimpl() is ratelimited, so print_sys_reg_instr() won't
spam the console. However, someof its callers try to print some
contextual information with kvm_err(), which is not ratelimited. This
means that in some cases the context may be printed without the sysreg
encoding, which isn't all that useful.

Let's ensure that both are consistently printed together and
ratelimited, by refactoring print_sys_reg_instr() so that some callers
can provide it with an arbitrary format string.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20191205180652.18671-2-mark.rutland@arm.com
2019-12-06 11:41:45 +00:00
Olof Johansson f693ff65c3 arm64: defconfig: re-run savedefconfig
This is mostly to reorder the entries as they've moved in the Kconfig
hierarchies. Doing this periodically (but not very often) simplifies
conflict resolution for new options, etc.

Link: https://lore.kernel.org/r/20191205211438.27552-3-olof@lixom.net
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-05 13:20:17 -08:00
Olof Johansson 942e6f8a83 Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-05 13:18:54 -08:00
Linus Torvalds b08baef02b ARM: SoC defconfig updates
We keep this in a separate branch to avoid cross-branch conflicts, but
 most of the material here is fairly boring -- some new drivers turned on
 for hardware since they were merged, and some refreshed files due to
 time having moved a lot of entries around.
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Merge tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC defconfig updates from Olof Johansson:
 "We keep this in a separate branch to avoid cross-branch conflicts, but
  most of the material here is fairly boring -- some new drivers turned
  on for hardware since they were merged, and some refreshed files due
  to time having moved a lot of entries around"

* tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (36 commits)
  ARM: config: multi_v5: ASPEED SDHCI, SGPIO
  ARM: configs: multi_v7: ASPEED network, gpio, FSI
  ARM: config: aspeed-g4: Add MMC, and cleanup
  ARM: config: aspeed-g5: Add SGPIO and FSI drivers
  ARM: config: aspeed-g5: Enable 8250_DW quirks
  arm64: defconfig: Change CONFIG_AT803X_PHY from m to y
  ARM: shmobile: defconfig: Refresh for v5.4-rc1
  arm64: defconfig: Enable R8A77961 SoC
  ARM: configs: sunxi: Enable MICREL_PHY
  arm64: defconfig: add new Allwinner crypto options
  ARM: configs: sunxi: add new Allwinner crypto options
  ARM: tegra: Enable Tegra VDE driver in tegra_defconfig
  ARM: imx_v6_v7_defconfig: Enable CONFIG_TOUCHSCREEN_DA9052
  arm64: defconfig: Enable configs for S32V234
  arm64: defconfig: Enable CONFIG_KEYBOARD_IMX_SC_KEY as module
  arm64: defconfig: Enable SMMU v3 PMCG
  arm64: defconfig: Enable HiSilicon ZIP controller
  arm64: defconfig: enable Altera GPIO controller
  ARM: multi_v7_defconfig: Enable audio support for stm32mp157
  arm64: defconfig: enable rsu driver
  ...
2019-12-05 12:14:19 -08:00
Linus Torvalds eb275167d1 ARM: Device-tree updates
As always, the bulk of updates. Some of the news this cycle:
 
 New SoC descriptions:
  - Broadcom BCM2711
  - Amlogic Meson A1 and G12
  - Freescale S32V234
  - Marvell Armada AP807/AP807-quad and CP115
  - Realtek RTD1293 and RTD1296
  - Rockchip RK3308
 
 New boards and platforms:
  - Allwinner: NanoPi Duo2
  - Amlogic: Ugoos am6
  - Atmel at91: Overkiz Kizbox2/4
  - Broadcom: RPi4, Luxul XWC-2000
  - Marvell: New Espressobin flavor
  - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
    E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
    OPOS6ULDev
  - Renesas: Salvator-XS
  - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "As always, the bulk of updates.  Some of the news this cycle:

  New SoC descriptions:
   - Broadcom BCM2711
   - Amlogic Meson A1 and G12
   - Freescale S32V234
   - Marvell Armada AP807/AP807-quad and CP115
   - Realtek RTD1293 and RTD1296
   - Rockchip RK3308

  New boards and platforms:
   - Allwinner: NanoPi Duo2
   - Amlogic: Ugoos am6
   - Atmel at91: Overkiz Kizbox2/4
   - Broadcom: RPi4, Luxul XWC-2000
   - Marvell: New Espressobin flavor
   - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
     E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
     OPOS6ULDev
   - Renesas: Salvator-XS
   - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits)
  ARM: dts: logicpd-torpedo: Disable USB Host
  arm: dts: mt6323: add keys, power-controller, rtc and codec
  arm64: dts: mt8183: add systimer0 device node
  dt-bindings: mediatek: update bindings for MT8183 systimer
  arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
  arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
  arm64: dts: rockchip: Add Beelink A1
  dt-bindings: ARM: rockchip: Add Beelink A1
  arm64: dts: rockchip: Add RK3328 audio pipelines
  arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
  arm64: dts: ti: k3-j721e-main: add USB controller nodes
  ARM: dts: aspeed-g6: Add timer description
  ARM: dts: aspeed: ast2600evb: Enable i2c buses
  ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards
  dt-bindings: arm: at91: Document Kizbox2-2 board binding
  arm64: dts: meson-gx: fix i2c compatible
  arm64: dts: meson-gx: cec node should be disabled by default
  arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
  arm64: dts: meson-gxm: fix gpu irq order
  arm64: dts: meson-g12a: fix gpu irq order
  ...
2019-12-05 12:09:47 -08:00
Linus Torvalds 38206c24ab ARM: SoC platform updates
Most of these are for MMP (seeing a bunch of cleanups and refactorings
 for the first time in a while), and for OMAP (a bunch of cleanups and
 added support for voltage controller on OMAP4430).
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "Most of these are for MMP (seeing a bunch of cleanups and refactorings
  for the first time in a while), and for OMAP (a bunch of cleanups and
  added support for voltage controller on OMAP4430)"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: OMAP2+: Add missing put_device() call in omapdss_init_of()
  OMAP2: fixup doc comments in omap_device
  ARM: OMAP1: drop duplicated dependency on ARCH_OMAP1
  ARM: ASPEED: update default ARCH_NR_GPIO for ARCH_ASPEED
  ARM: imx: use generic function to exit coherency
  ARM: tegra: Use WFE for power-gating on Tegra30
  ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
  ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOS
  ARM: s3c: Rename s5p_usb_phy functions
  ARM: s3c: Rename s3c64xx_spi_setname() function
  ARM: imx: Add serial number support for i.MX6/7 SoCs
  ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
  arm64: Introduce config for S32
  ARM: hisi: drop useless depend on ARCH_MULTI_V7
  arm64: realtek: Select reset controller
  ARM: shmobile: rcar-gen2: Drop legacy DT clock support
  ARM: OMAP2+: Remove duplicated include from pmic-cpcap.c
  ARM: OMAP1: ams-delta FIQ: Fix a typo ("Initiaize")
  MAINTAINERS: Add logicpd-som-lv and logicpd-torpedo to OMAP TREE
  ARM: OMAP2+: pdata-quirks: drop TI_ST/KIM support
  ...
2019-12-05 11:38:40 -08:00
Linus Torvalds fb3da48a86 Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux
Pull thermal management updates from Zhang Rui:

 - Fix a deadlock regression in thermal core framework, which was
   introduced in 5.3 (Wei Wang)

 - Initialize thermal control framework earlier to enable thermal
   mitigation during boot (Amit Kucheria)

 - Convert the Intelligent Power Allocator (IPA) thermal governor to
   follow the generic PM_EM instead of its own Energy Model (Quentin
   Perret)

 - Introduce a new Amlogic soc thermal driver (Guillaume La Roque)

 - Add interrupt support for tsens thermal driver (Amit Kucheria)

 - Add support for MSM8956/8976 in tsens thermal driver
   (AngeloGioacchino Del Regno)

 - Add support for r8a774b1 in rcar thermal driver (Biju Das)

 - Add support for Thermal Monitor Unit v2 in qoriq thermal driver
   (Yuantian Tang)

 - Some other fixes/cleanups on thermal core framework and soc thermal
   drivers (Colin Ian King, Daniel Lezcano, Hsin-Yi Wang, Tian Tao)

* 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (32 commits)
  thermal: Fix deadlock in thermal thermal_zone_device_check
  thermal: cpu_cooling: Migrate to using the EM framework
  thermal: cpu_cooling: Make the power-related code depend on IPA
  PM / EM: Declare EM data types unconditionally
  arm64: defconfig: Enable CONFIG_ENERGY_MODEL
  drivers: thermal: tsens: fix potential integer overflow on multiply
  thermal: cpu_cooling: Reorder the header file
  thermal: cpu_cooling: Remove pointless dependency on CONFIG_OF
  thermal: no need to set .owner when using module_platform_driver
  thermal: qcom: tsens-v1: Fix kfree of a non-pointer value
  cpufreq: qcom-hw: Move driver initialization earlier
  clk: qcom: Initialize clock drivers earlier
  cpufreq: Initialize cpufreq-dt driver earlier
  cpufreq: Initialize the governors in core_initcall
  thermal: Initialize thermal subsystem earlier
  thermal: Remove netlink support
  dt: thermal: tsens: Document compatible for MSM8976/56
  thermal: qcom: tsens-v1: Add support for MSM8956 and MSM8976
  MAINTAINERS: add entry for Amlogic Thermal driver
  thermal: amlogic: Add thermal driver to support G12 SoCs
  ...
2019-12-05 11:21:24 -08:00
Olof Johansson 563b75d749 ARMv8 Juno fixes for v5.5
Couple of fixes:
 1. Fix for UART clock frequency on all Juno variants that exist since
    the platform was added. This is mainly due to incorrect Juno SoC
    TRM that was referred during initial development days
 2. Drop "dma-ranges" property for now as they are triggering loads of
    warning on boot
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Merge tag 'juno-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

ARMv8 Juno fixes for v5.5

Couple of fixes:
1. Fix for UART clock frequency on all Juno variants that exist since
   the platform was added. This is mainly due to incorrect Juno SoC
   TRM that was referred during initial development days
2. Drop "dma-ranges" property for now as they are triggering loads of
   warning on boot

* tag 'juno-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  Revert "arm64: dts: juno: add dma-ranges property"
  arm64: dts: juno: Fix UART frequency
  arm64: dts: juno: add GPU subsystem

Link: https://lore.kernel.org/r/20191202114338.GA20965@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-05 10:11:38 -08:00
Mark Brown cba779d80a arm64: mm: Fix column alignment for UXN in kernel_page_tables
UXN is the only individual PTE bit other than the PTE_ATTRINDX_MASK ones
which doesn't have both a set and a clear value provided, meaning that the
columns in the table won't all be aligned. The PTE_ATTRINDX_MASK values
are all both mutually exclusive and longer so are listed last to make a
single final column for those values. Ensure everything is aligned by
providing a clear value for UXN.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-04 11:44:29 +00:00
Mark Rutland ca2ef4ffab arm64: insn: consistently handle exit text
A kernel built with KASAN && FTRACE_WITH_REGS && !MODULES, produces a
boot-time splat in the bowels of ftrace:

| [    0.000000] ftrace: allocating 32281 entries in 127 pages
| [    0.000000] ------------[ cut here ]------------
| [    0.000000] WARNING: CPU: 0 PID: 0 at kernel/trace/ftrace.c:2019 ftrace_bug+0x27c/0x328
| [    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.4.0-rc3-00008-g7f08ae53a7e3 #13
| [    0.000000] Hardware name: linux,dummy-virt (DT)
| [    0.000000] pstate: 60000085 (nZCv daIf -PAN -UAO)
| [    0.000000] pc : ftrace_bug+0x27c/0x328
| [    0.000000] lr : ftrace_init+0x640/0x6cc
| [    0.000000] sp : ffffa000120e7e00
| [    0.000000] x29: ffffa000120e7e00 x28: ffff00006ac01b10
| [    0.000000] x27: ffff00006ac898c0 x26: dfffa00000000000
| [    0.000000] x25: ffffa000120ef290 x24: ffffa0001216df40
| [    0.000000] x23: 000000000000018d x22: ffffa0001244c700
| [    0.000000] x21: ffffa00011bf393c x20: ffff00006ac898c0
| [    0.000000] x19: 00000000ffffffff x18: 0000000000001584
| [    0.000000] x17: 0000000000001540 x16: 0000000000000007
| [    0.000000] x15: 0000000000000000 x14: ffffa00010432770
| [    0.000000] x13: ffff940002483519 x12: 1ffff40002483518
| [    0.000000] x11: 1ffff40002483518 x10: ffff940002483518
| [    0.000000] x9 : dfffa00000000000 x8 : 0000000000000001
| [    0.000000] x7 : ffff940002483519 x6 : ffffa0001241a8c0
| [    0.000000] x5 : ffff940002483519 x4 : ffff940002483519
| [    0.000000] x3 : ffffa00011780870 x2 : 0000000000000001
| [    0.000000] x1 : 1fffe0000d591318 x0 : 0000000000000000
| [    0.000000] Call trace:
| [    0.000000]  ftrace_bug+0x27c/0x328
| [    0.000000]  ftrace_init+0x640/0x6cc
| [    0.000000]  start_kernel+0x27c/0x654
| [    0.000000] random: get_random_bytes called from print_oops_end_marker+0x30/0x60 with crng_init=0
| [    0.000000] ---[ end trace 0000000000000000 ]---
| [    0.000000] ftrace faulted on writing
| [    0.000000] [<ffffa00011bf393c>] _GLOBAL__sub_D_65535_0___tracepoint_initcall_level+0x4/0x28
| [    0.000000] Initializing ftrace call sites
| [    0.000000] ftrace record flags: 0
| [    0.000000]  (0)
| [    0.000000]  expected tramp: ffffa000100b3344

This is due to an unfortunate combination of several factors.

Building with KASAN results in the compiler generating anonymous
functions to register/unregister global variables against the shadow
memory. These functions are placed in .text.startup/.text.exit, and
given mangled names like _GLOBAL__sub_{I,D}_65535_0_$OTHER_SYMBOL. The
kernel linker script places these in .init.text and .exit.text
respectively, which are both discarded at runtime as part of initmem.

Building with FTRACE_WITH_REGS uses -fpatchable-function-entry=2, which
also instruments KASAN's anonymous functions. When these are discarded
with the rest of initmem, ftrace removes dangling references to these
call sites.

Building without MODULES implicitly disables STRICT_MODULE_RWX, and
causes arm64's patch_map() function to treat any !core_kernel_text()
symbol as something that can be modified in-place. As core_kernel_text()
is only true for .text and .init.text, with the latter depending on
system_state < SYSTEM_RUNNING, we'll treat .exit.text as something that
can be patched in-place. However, .exit.text is mapped read-only.

Hence in this configuration the ftrace init code blows up while trying
to patch one of the functions generated by KASAN.

We could try to filter out the call sites in .exit.text rather than
initializing them, but this would be inconsistent with how we handle
.init.text, and requires hooking into core bits of ftrace. The behaviour
of patch_map() is also inconsistent today, so instead let's clean that
up and have it consistently handle .exit.text.

This patch teaches patch_map() to handle .exit.text at init time,
preventing the boot-time splat above. The flow of patch_map() is
reworked to make the logic clearer and minimize redundant
conditionality.

Fixes: 3b23e4991f ("arm64: implement ftrace with regs")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Torsten Duwe <duwe@suse.de>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-04 11:32:20 +00:00
Will Deacon 93b90414c3 arm64: mm: Fix initialisation of DMA zones on non-NUMA systems
John reports that the recently merged commit 1a8e1cef76 ("arm64: use
both ZONE_DMA and ZONE_DMA32") breaks the boot on his DB845C board:

  | Booting Linux on physical CPU 0x0000000000 [0x517f803c]
  | Linux version 5.4.0-mainline-10675-g957a03b9e38f
  | Machine model: Thundercomm Dragonboard 845c
  | [...]
  | Built 1 zonelists, mobility grouping on.  Total pages: -188245
  | Kernel command line: earlycon
  | firmware_class.path=/vendor/firmware/ androidboot.hardware=db845c
  | init=/init androidboot.boot_devices=soc/1d84000.ufshc
  | printk.devkmsg=on buildvariant=userdebug root=/dev/sda2
  | androidboot.bootdevice=1d84000.ufshc androidboot.serialno=c4e1189c
  | androidboot.baseband=sda
  | msm_drm.dsi_display0=dsi_lt9611_1080_video_display:
  | androidboot.slot_suffix=_a skip_initramfs rootwait ro init=/init
  |
  | <hangs indefinitely here>

This is because, when CONFIG_NUMA=n, zone_sizes_init() fails to handle
memblocks that fall entirely within the ZONE_DMA region and erroneously ends up
trying to add a negatively-sized region into the following ZONE_DMA32, which is
later interpreted as a large unsigned region by the core MM code.

Rework the non-NUMA implementation of zone_sizes_init() so that the start
address of the memblock being processed is adjusted according to the end of the
previous zone, which is then range-checked before updating the hole information
of subsequent zones.

Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/lkml/CALAqxLVVcsmFrDKLRGRq7GewcW405yTOxG=KR3csVzQ6bXutkA@mail.gmail.com
Fixes: 1a8e1cef76 ("arm64: use both ZONE_DMA and ZONE_DMA32")
Reported-by: John Stultz <john.stultz@linaro.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-12-04 11:25:20 +00:00
Linus Torvalds c3bed3b20e pci-v5.5-changes
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Merge tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
 "Enumeration:

   - Warn if a host bridge has no NUMA info (Yunsheng Lin)

   - Add PCI_STD_NUM_BARS for the number of standard BARs (Denis
     Efremov)

  Resource management:

   - Fix boot-time Embedded Controller GPE storm caused by incorrect
     resource assignment after ACPI Bus Check Notification (Mika
     Westerberg)

   - Protect pci_reassign_bridge_resources() against concurrent
     addition/removal (Benjamin Herrenschmidt)

   - Fix bridge dma_ranges resource list cleanup (Rob Herring)

   - Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control
     the MMIO and prefetchable MMIO window sizes of hotplug bridges
     independently (Nicholas Johnson)

   - Fix MMIO/MMIO_PREF window assignment that assigned more space than
     desired (Nicholas Johnson)

   - Only enforce bus numbers from bridge EA if the bridge has EA
     devices downstream (Subbaraya Sundeep)

   - Consolidate DT "dma-ranges" parsing and convert all host drivers to
     use shared parsing (Rob Herring)

  Error reporting:

   - Restore AER capability after resume (Mayurkumar Patel)

   - Add PoisonTLPBlocked AER counter (Rajat Jain)

   - Use for_each_set_bit() to simplify AER code (Andy Shevchenko)

   - Fix AER kernel-doc (Andy Shevchenko)

   - Add "pcie_ports=dpc-native" parameter to allow native use of DPC
     even if platform didn't grant control over AER (Olof Johansson)

  Hotplug:

   - Avoid returning prematurely from sysfs requests to enable or
     disable a PCIe hotplug slot (Lukas Wunner)

   - Don't disable interrupts twice when suspending hotplug ports (Mika
     Westerberg)

   - Fix deadlocks when PCIe ports are hot-removed while suspended (Mika
     Westerberg)

  Power management:

   - Remove unnecessary ASPM locking (Bjorn Helgaas)

   - Add support for disabling L1 PM Substates (Heiner Kallweit)

   - Allow re-enabling Clock PM after it has been disabled (Heiner
     Kallweit)

   - Add sysfs attributes for controlling ASPM link states (Heiner
     Kallweit)

   - Remove CONFIG_PCIEASPM_DEBUG, including "link_state" and "clk_ctl"
     sysfs files (Heiner Kallweit)

   - Avoid AMD FCH XHCI USB PME# from D0 defect that prevents wakeup on
     USB 2.0 or 1.1 connect events (Kai-Heng Feng)

   - Move power state check out of pci_msi_supported() (Bjorn Helgaas)

   - Fix incorrect MSI-X masking on resume and revert related nvme quirk
     for Kingston NVME SSD running FW E8FK11.T (Jian-Hong Pan)

   - Always return devices to D0 when thawing to fix hibernation with
     drivers like mlx4 that used legacy power management (previously we
     only did it for drivers with new power management ops) (Dexuan Cui)

   - Clear PCIe PME Status even for legacy power management (Bjorn
     Helgaas)

   - Fix PCI PM documentation errors (Bjorn Helgaas)

   - Use dev_printk() for more power management messages (Bjorn Helgaas)

   - Apply D2 delay as milliseconds, not microseconds (Bjorn Helgaas)

   - Convert xen-platform from legacy to generic power management (Bjorn
     Helgaas)

   - Removed unused .resume_early() and .suspend_late() legacy power
     management hooks (Bjorn Helgaas)

   - Rearrange power management code for clarity (Rafael J. Wysocki)

   - Decode power states more clearly ("4" or "D4" really refers to
     "D3cold") (Bjorn Helgaas)

   - Notice when reading PM Control register returns an error (~0)
     instead of interpreting it as being in D3hot (Bjorn Helgaas)

   - Add missing link delays required by the PCIe spec (Mika Westerberg)

  Virtualization:

   - Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI (Bjorn
     Helgaas)

   - Allow VFs to use PRI (the PF PRI is shared by the VFs, but the code
     previously didn't recognize that) (Kuppuswamy Sathyanarayanan)

   - Allow VFs to use PASID (the PF PASID capability is shared by the
     VFs, but the code previously didn't recognize that) (Kuppuswamy
     Sathyanarayanan)

   - Disconnect PF and VF ATS enablement, since ATS in PFs and
     associated VFs can be enabled independently (Kuppuswamy
     Sathyanarayanan)

   - Cache PRI and PASID capability offsets (Kuppuswamy Sathyanarayanan)

   - Cache the PRI PRG Response PASID Required bit (Bjorn Helgaas)

   - Consolidate ATS declarations in linux/pci-ats.h (Krzysztof
     Wilczynski)

   - Remove unused PRI and PASID stubs (Bjorn Helgaas)

   - Removed unnecessary EXPORT_SYMBOL_GPL() from ATS, PRI, and PASID
     interfaces that are only used by built-in IOMMU drivers (Bjorn
     Helgaas)

   - Hide PRI and PASID state restoration functions used only inside the
     PCI core (Bjorn Helgaas)

   - Add a DMA alias quirk for the Intel VCA NTB (Slawomir Pawlowski)

   - Serialize sysfs sriov_numvfs reads vs writes (Pierre Crégut)

   - Update Cavium ACS quirk for ThunderX2 and ThunderX3 (George
     Cherian)

   - Fix the UPDCR register address in the Intel ACS quirk (Steffen
     Liebergeld)

   - Unify ACS quirk implementations (Bjorn Helgaas)

  Amlogic Meson host bridge driver:

   - Fix meson PERST# GPIO polarity problem (Remi Pommarel)

   - Add DT bindings for Amlogic Meson G12A (Neil Armstrong)

   - Fix meson clock names to match DT bindings (Neil Armstrong)

   - Add meson support for Amlogic G12A SoC with separate shared PHY
     (Neil Armstrong)

   - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe
     combo PHY (Neil Armstrong)

   - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong)

   - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT
     (Neil Armstrong)

  Broadcom iProc host bridge driver:

   - Invalidate iProc PAXB address mapping before programming it
     (Abhishek Shah)

   - Fix iproc-msi and mvebu __iomem annotations (Ben Dooks)

  Cadence host bridge driver:

   - Refactor Cadence PCIe host controller to use as a library for both
     host and endpoint (Tom Joseph)

  Freescale Layerscape host bridge driver:

   - Add layerscape LS1028a support (Xiaowei Bao)

  Intel VMD host bridge driver:

   - Add VMD bus 224-255 restriction decode (Jon Derrick)

   - Add VMD 8086:9A0B device ID (Jon Derrick)

   - Remove Keith from VMD maintainer list (Keith Busch)

  Marvell ARMADA 3700 / Aardvark host bridge driver:

   - Use LTSSM state to build link training flag since Aardvark doesn't
     implement the Link Training bit (Remi Pommarel)

   - Delay before training Aardvark link in case PERST# was asserted
     before the driver probe (Remi Pommarel)

   - Fix Aardvark issues with Root Control reads and writes (Remi
     Pommarel)

   - Don't rely on jiffies in Aardvark config access path since
     interrupts may be disabled (Remi Pommarel)

   - Fix Aardvark big-endian support (Grzegorz Jaszczyk)

  Marvell ARMADA 370 / XP host bridge driver:

   - Make mvebu_pci_bridge_emul_ops static (Ben Dooks)

  Microsoft Hyper-V host bridge driver:

   - Add hibernation support for Hyper-V virtual PCI devices (Dexuan
     Cui)

   - Track Hyper-V pci_protocol_version per-hbus, not globally (Dexuan
     Cui)

   - Avoid kmemleak false positive on hv hbus buffer (Dexuan Cui)

  Mobiveil host bridge driver:

   - Change mobiveil csr_read()/write() function names that conflict
     with riscv arch functions (Kefeng Wang)

  NVIDIA Tegra host bridge driver:

   - Fix Tegra CLKREQ dependency programming (Vidya Sagar)

  Renesas R-Car host bridge driver:

   - Remove unnecessary header include from rcar (Andrew Murray)

   - Tighten register index checking for rcar inbound range programming
     (Marek Vasut)

   - Fix rcar inbound range alignment calculation to improve packing of
     multiple entries (Marek Vasut)

   - Update rcar MACCTLR setting to match documentation (Yoshihiro
     Shimoda)

   - Clear bit 0 of MACCTLR before PCIETCTLR.CFINIT per manual
     (Yoshihiro Shimoda)

   - Add Marek Vasut and Yoshihiro Shimoda as R-Car maintainers (Simon
     Horman)

  Rockchip host bridge driver:

   - Make rockchip 0V9 and 1V8 power regulators non-optional (Robin
     Murphy)

  Socionext UniPhier host bridge driver:

   - Set uniphier to host (RC) mode always (Kunihiko Hayashi)

  Endpoint drivers:

   - Fix endpoint driver sign extension problem when shifting page
     number to phys_addr_t (Alan Mikhak)

  Misc:

   - Add NumaChip SPDX header (Krzysztof Wilczynski)

   - Replace EXTRA_CFLAGS with ccflags-y (Krzysztof Wilczynski)

   - Remove unused includes (Krzysztof Wilczynski)

   - Removed unused sysfs attribute groups (Ben Dooks)

   - Remove PTM and ASPM dependencies on PCIEPORTBUS (Bjorn Helgaas)

   - Add PCIe Link Control 2 register field definitions to replace magic
     numbers in AMDGPU and Radeon CIK/SI (Bjorn Helgaas)

   - Fix incorrect Link Control 2 Transmit Margin usage in AMDGPU and
     Radeon CIK/SI PCIe Gen3 link training (Bjorn Helgaas)

   - Use pcie_capability_read_word() instead of pci_read_config_word()
     in AMDGPU and Radeon CIK/SI (Frederick Lawler)

   - Remove unused pci_irq_get_node() Greg Kroah-Hartman)

   - Make asm/msi.h mandatory and simplify PCI_MSI_IRQ_DOMAIN Kconfig
     (Palmer Dabbelt, Michal Simek)

   - Read all 64 bits of Switchtec part_event_bitmap (Logan Gunthorpe)

   - Fix erroneous intel-iommu dependency on CONFIG_AMD_IOMMU (Bjorn
     Helgaas)

   - Fix bridge emulation big-endian support (Grzegorz Jaszczyk)

   - Fix dwc find_next_bit() usage (Niklas Cassel)

   - Fix pcitest.c fd leak (Hewenliang)

   - Fix typos and comments (Bjorn Helgaas)

   - Fix Kconfig whitespace errors (Krzysztof Kozlowski)"

* tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (160 commits)
  PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist
  asm-generic: Make msi.h a mandatory include/asm header
  Revert "nvme: Add quirk for Kingston NVME SSD running FW E8FK11.T"
  PCI/MSI: Fix incorrect MSI-X masking on resume
  PCI/MSI: Move power state check out of pci_msi_supported()
  PCI/MSI: Remove unused pci_irq_get_node()
  PCI: hv: Avoid a kmemleak false positive caused by the hbus buffer
  PCI: hv: Change pci_protocol_version to per-hbus
  PCI: hv: Add hibernation support
  PCI: hv: Reorganize the code in preparation of hibernation
  MAINTAINERS: Remove Keith from VMD maintainer
  PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code
  PCI/ASPM: Add sysfs attributes for controlling ASPM link states
  PCI: Fix indentation
  drm/radeon: Prefer pcie_capability_read_word()
  drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions
  drm/radeon: Correct Transmit Margin masks
  drm/amdgpu: Prefer pcie_capability_read_word()
  PCI: uniphier: Set mode register to host mode
  drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions
  ...
2019-12-03 13:58:22 -08:00
Linus Torvalds 483847a702 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:

 - Fix build error in crypto lib code when crypto API is off

 - Fix NULL/error check in hisilicon

 - Fix Kconfig-related build error in talitos

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: hisilicon - fix a NULL vs IS_ERR() bug in sec_create_qp_ctx()
  crypto: talitos - Fix build error by selecting LIB_DES
  crypto: arch - conditionalize crypto api in arch glue for lib code
2019-12-02 17:23:21 -08:00
Linus Torvalds b94ae8ad9f seccomp updates for v5.5
- implement SECCOMP_USER_NOTIF_FLAG_CONTINUE (Christian Brauner)
 - fixes to selftests (Christian Brauner)
 - remove secure_computing() argument (Christian Brauner)
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Merge tag 'seccomp-v5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux

Pull seccomp updates from Kees Cook:
 "Mostly this is implementing the new flag SECCOMP_USER_NOTIF_FLAG_CONTINUE,
  but there are cleanups as well.

   - implement SECCOMP_USER_NOTIF_FLAG_CONTINUE (Christian Brauner)

   - fixes to selftests (Christian Brauner)

   - remove secure_computing() argument (Christian Brauner)"

* tag 'seccomp-v5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  seccomp: rework define for SECCOMP_USER_NOTIF_FLAG_CONTINUE
  seccomp: fix SECCOMP_USER_NOTIF_FLAG_CONTINUE test
  seccomp: simplify secure_computing()
  seccomp: test SECCOMP_USER_NOTIF_FLAG_CONTINUE
  seccomp: add SECCOMP_USER_NOTIF_FLAG_CONTINUE
  seccomp: avoid overflow in implicit constant conversion
2019-11-30 17:23:16 -08:00
Linus Torvalds 81b6b96475 dma-mapping updates for 5.5-rc1
- improve dma-debug scalability (Eric Dumazet)
  - tiny dma-debug cleanup (Dan Carpenter)
  - check for vmap memory in dma_map_single (Kees Cook)
  - check for dma_addr_t overflows in dma-direct when using
    DMA offsets (Nicolas Saenz Julienne)
  - switch the x86 sta2x11 SOC to use more generic DMA code
    (Nicolas Saenz Julienne)
  - fix arm-nommu dma-ranges handling (Vladimir Murzin)
  - use __initdata in CMA (Shyam Saini)
  - replace the bus dma mask with a limit (Nicolas Saenz Julienne)
  - merge the remapping helpers into the main dma-direct flow (me)
  - switch xtensa to the generic dma remap handling (me)
  - various cleanups around dma_capable (me)
  - remove unused dev arguments to various dma-noncoherent helpers (me)
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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux; tag 'dma-mapping-5.5' of git://git.infradead.org/users/hch/dma-mapping

Pull dma-mapping updates from Christoph Hellwig:

 - improve dma-debug scalability (Eric Dumazet)

 - tiny dma-debug cleanup (Dan Carpenter)

 - check for vmap memory in dma_map_single (Kees Cook)

 - check for dma_addr_t overflows in dma-direct when using DMA offsets
   (Nicolas Saenz Julienne)

 - switch the x86 sta2x11 SOC to use more generic DMA code (Nicolas
   Saenz Julienne)

 - fix arm-nommu dma-ranges handling (Vladimir Murzin)

 - use __initdata in CMA (Shyam Saini)

 - replace the bus dma mask with a limit (Nicolas Saenz Julienne)

 - merge the remapping helpers into the main dma-direct flow (me)

 - switch xtensa to the generic dma remap handling (me)

 - various cleanups around dma_capable (me)

 - remove unused dev arguments to various dma-noncoherent helpers (me)

* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux:

* tag 'dma-mapping-5.5' of git://git.infradead.org/users/hch/dma-mapping: (22 commits)
  dma-mapping: treat dev->bus_dma_mask as a DMA limit
  dma-direct: exclude dma_direct_map_resource from the min_low_pfn check
  dma-direct: don't check swiotlb=force in dma_direct_map_resource
  dma-debug: clean up put_hash_bucket()
  powerpc: remove support for NULL dev in __phys_to_dma / __dma_to_phys
  dma-direct: avoid a forward declaration for phys_to_dma
  dma-direct: unify the dma_capable definitions
  dma-mapping: drop the dev argument to arch_sync_dma_for_*
  x86/PCI: sta2x11: use default DMA address translation
  dma-direct: check for overflows on 32 bit DMA addresses
  dma-debug: increase HASH_SIZE
  dma-debug: reorder struct dma_debug_entry fields
  xtensa: use the generic uncached segment support
  dma-mapping: merge the generic remapping helpers into dma-direct
  dma-direct: provide mmap and get_sgtable method overrides
  dma-direct: remove the dma_handle argument to __dma_direct_alloc_pages
  dma-direct: remove __dma_direct_free_pages
  usb: core: Remove redundant vmap checks
  kernel: dma-contiguous: mark CMA parameters __initdata/__initconst
  dma-debug: add a schedule point in debug_dma_dump_mappings()
  ...
2019-11-28 11:16:43 -08:00
Linus Torvalds a308a71022 generic ioremap support
- clean up various obsolete ioremap and iounmap variants
  - add a new generic ioremap implementation and switch csky, nds32 and
    riscv over to it
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Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremap

Pull generic ioremap support from Christoph Hellwig:
 "This adds the remaining bits for an entirely generic ioremap and
  iounmap to lib/ioremap.c. To facilitate that, it cleans up the giant
  mess of weird ioremap variants we had with no users outside the arch
  code.

  For now just the three newest ports use the code, but there is more
  than a handful others that can be converted without too much work.

  Summary:

   - clean up various obsolete ioremap and iounmap variants

   - add a new generic ioremap implementation and switch csky, nds32 and
     riscv over to it"

* tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremap: (21 commits)
  nds32: use generic ioremap
  csky: use generic ioremap
  csky: remove ioremap_cache
  riscv: use the generic ioremap code
  lib: provide a simple generic ioremap implementation
  sh: remove __iounmap
  nios2: remove __iounmap
  hexagon: remove __iounmap
  m68k: rename __iounmap and mark it static
  arch: rely on asm-generic/io.h for default ioremap_* definitions
  asm-generic: don't provide ioremap for CONFIG_MMU
  asm-generic: ioremap_uc should behave the same with and without MMU
  xtensa: clean up ioremap
  x86: Clean up ioremap()
  parisc: remove __ioremap
  nios2: remove __ioremap
  alpha: remove the unused __ioremap wrapper
  hexagon: clean up ioremap
  ia64: rename ioremap_nocache to ioremap_uc
  unicore32: remove ioremap_cached
  ...
2019-11-28 10:57:12 -08:00
Sudeep Holla 54fb3fe0f2 Revert "arm64: dts: juno: add dma-ranges property"
This reverts commit 193d00a2b3.

Commit 951d48855d ("of: Make of_dma_get_range() work on bus nodes")
reworked the logic such that of_dma_get_range() works correctly
starting from a bus node containing "dma-ranges".

Since on Juno we don't have a SoC level bus node and "dma-ranges" is
present only in the root node, we get the following error:

OF: translation of DMA address(0) to CPU address failed node(/sram@2e000000)
OF: translation of DMA address(0) to CPU address failed node(/uart@7ff80000)
...
OF: translation of DMA address(0) to CPU address failed node(/mhu@2b1f0000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)

So let's fix it by dropping the "dma-ranges" property for now. This
should be fine since it doesn't represent any kind of device-visible
restriction; it was only there for completeness, and we've since given
in to the assumption that missing "dma-ranges" implies a 1:1 mapping
anyway.

We can add it later with a proper SoC bus node and moving all the
devices that belong there along with the "dma-ranges" if required.

Fixes: 193d00a2b3 ("arm64: dts: juno: add dma-ranges property")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-28 16:40:51 +00:00
Bjorn Helgaas 30c50d3a26 Merge branch 'remotes/lorenzo/pci/meson'
- Fix meson PERST# GPIO polarity problem (Remi Pommarel)

  - Add DT bindings for Amlogic Meson G12A (Neil Armstrong)

  - Fix meson clock names to match DT bindings (Neil Armstrong)

  - Add meson support for Amlogic G12A SoC with separate shared PHY (Neil
    Armstrong)

  - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe combo
    PHY (Neil Armstrong)

  - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong)

  - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT (Neil
    Armstrong)

* remotes/lorenzo/pci/meson:
  arm64: dts: khadas-vim3: add commented support for PCIe
  arm64: dts: meson-g12a: Add PCIe node
  phy: meson-g12a-usb3-pcie: Add support for PCIe mode
  PCI: amlogic: meson: Add support for G12A
  PCI: amlogic: Fix probed clock names
  dt-bindings: pci: amlogic, meson-pcie: Add G12A bindings
  PCI: amlogic: Fix reset assertion via gpio descriptor
2019-11-28 08:54:46 -06:00
Jason A. Donenfeld 8394bfec51 crypto: arch - conditionalize crypto api in arch glue for lib code
For glue code that's used by Zinc, the actual Crypto API functions might
not necessarily exist, and don't need to exist either. Before this
patch, there are valid build configurations that lead to a unbuildable
kernel. This fixes it to conditionalize those symbols on the existence
of the proper config entry.

Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-27 13:08:49 +08:00
Linus Torvalds 89d57dddd7 media updates for v5.5-rc1
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Merge tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - uAPI documentation for stateless decoders

 - Added a new CEC ioctl together with its documentation

 - Improved IPU3 documentation

 - New i2c drivers: hi556 and imx290

 - Added support on Vivid driver for meta streams

 - Added de-interlace support for sunxi subdriver

 - Added a few new remote controler keymaps

 - Added H.265 support for Sunxi Cedrus driver

 - Another round of random driver cleanups, fixes and improvements

* tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (361 commits)
  media: Revert "media: mtk-vcodec: Remove extra area allocation in an input buffer on encoding"
  media: hantro: Set H264 FIELDPIC_FLAG_E flag correctly
  media: hantro: Remove now unused H264 pic_size
  media: hantro: Use output buffer width and height for H264 decoding
  media: hantro: Reduce H264 extra space for motion vectors
  media: hantro: Fix H264 motion vector buffer offset
  media: ti-vpe: vpe: fix compatible to match bindings
  media: dt-bindings: media: ti-vpe: Document VPE driver
  media: zr364xx: remove redundant assigmnent to idx, clean up code
  media: Documentation: media: *_DEFAULT targets for subdevs
  media: hantro: Fix s_fmt for dynamic resolution changes
  media: i2c: Use the correct style for SPDX License Identifier
  media: siano: Use the correct style for SPDX License Identifier
  media: vicodec: media_device_cleanup was called too early
  media: vim2m: media_device_cleanup was called too early
  media: cedrus: Increase maximum supported size
  media: cedrus: Fix H264 4k support
  media: cedrus: Properly signal size in mode register
  media: v4l2-ctrl: Lock main_hdl on operations of requests_queued.
  media: si470x-i2c: add missed operations in remove
  ...
2019-11-26 20:11:43 -08:00
Linus Torvalds 6e9f879684 ACPI updates for 5.5-rc1
- Update the ACPICA code in the kernel to upstream revision 20191018
    including:
 
    * Fixes for Clang warnings (Bob Moore).
 
    * Fix for possible overflow in get_tick_count() (Bob Moore).
 
    * Introduction of acpi_unload_table() (Bob Moore).
 
    * Debugger and utilities updates (Erik Schmauss).
 
    * Fix for unloading tables loaded via configfs (Nikolaus Voss).
 
  - Add support for EFI specific purpose memory to optionally allow
    either application-exclusive or core-kernel-mm managed access to
    differentiated memory (Dan Williams).
 
  - Fix and clean up processing of the HMAT table (Brice Goglin,
    Qian Cai, Tao Xu).
 
  - Update the ACPI EC driver to make it work on systems with
    hardware-reduced ACPI (Daniel Drake).
 
  - Always build in support for the Generic Event Device (GED) to
    allow one kernel binary to work both on systems with full
    hardware ACPI and hardware-reduced ACPI (Arjan van de Ven).
 
  - Fix the table unload mechanism to unregister platform devices
    created when the given table was loaded (Andy Shevchenko).
 
  - Rework the lid blacklist handling in the button driver and add
    more lid quirks to it (Hans de Goede).
 
  - Improve ACPI-based device enumeration for some platforms based
    on Intel BayTrail SoCs (Hans de Goede).
 
  - Add an OpRegion driver for the Cherry Trail Crystal Cove PMIC
    and prevent handlers from being registered for unhandled PMIC
    OpRegions (Hans de Goede).
 
  - Unify ACPI _HID/_UID matching (Andy Shevchenko).
 
  - Clean up documentation and comments (Cao jin, James Pack, Kacper
    Piwiński).
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Merge tag 'acpi-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI updates from Rafael Wysocki:
 "These update the ACPICA code in the kernel to upstream revision
  20191018, add support for EFI specific purpose memory, update the ACPI
  EC driver to make it work on systems with hardware-reduced ACPI,
  improve ACPI-based device enumeration for some platforms, rework the
  lid blacklist handling in the button driver and add more lid quirks to
  it, unify ACPI _HID/_UID matching, fix assorted issues and clean up
  the code and documentation.

  Specifics:

   - Update the ACPICA code in the kernel to upstream revision 20191018
     including:
      * Fixes for Clang warnings (Bob Moore)
      * Fix for possible overflow in get_tick_count() (Bob Moore)
      * Introduction of acpi_unload_table() (Bob Moore)
      * Debugger and utilities updates (Erik Schmauss)
      * Fix for unloading tables loaded via configfs (Nikolaus Voss)

   - Add support for EFI specific purpose memory to optionally allow
     either application-exclusive or core-kernel-mm managed access to
     differentiated memory (Dan Williams)

   - Fix and clean up processing of the HMAT table (Brice Goglin, Qian
     Cai, Tao Xu)

   - Update the ACPI EC driver to make it work on systems with
     hardware-reduced ACPI (Daniel Drake)

   - Always build in support for the Generic Event Device (GED) to allow
     one kernel binary to work both on systems with full hardware ACPI
     and hardware-reduced ACPI (Arjan van de Ven)

   - Fix the table unload mechanism to unregister platform devices
     created when the given table was loaded (Andy Shevchenko)

   - Rework the lid blacklist handling in the button driver and add more
     lid quirks to it (Hans de Goede)

   - Improve ACPI-based device enumeration for some platforms based on
     Intel BayTrail SoCs (Hans de Goede)

   - Add an OpRegion driver for the Cherry Trail Crystal Cove PMIC and
     prevent handlers from being registered for unhandled PMIC OpRegions
     (Hans de Goede)

   - Unify ACPI _HID/_UID matching (Andy Shevchenko)

   - Clean up documentation and comments (Cao jin, James Pack, Kacper
     Piwiński)"

* tag 'acpi-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (52 commits)
  ACPI: OSI: Shoot duplicate word
  ACPI: HMAT: use %u instead of %d to print u32 values
  ACPI: NUMA: HMAT: fix a section mismatch
  ACPI: HMAT: don't mix pxm and nid when setting memory target processor_pxm
  ACPI: NUMA: HMAT: Register "soft reserved" memory as an "hmem" device
  ACPI: NUMA: HMAT: Register HMAT at device_initcall level
  device-dax: Add a driver for "hmem" devices
  dax: Fix alloc_dax_region() compile warning
  lib: Uplevel the pmem "region" ida to a global allocator
  x86/efi: Add efi_fake_mem support for EFI_MEMORY_SP
  arm/efi: EFI soft reservation to memblock
  x86/efi: EFI soft reservation to E820 enumeration
  efi: Common enable/disable infrastructure for EFI soft reservation
  x86/efi: Push EFI_MEMMAP check into leaf routines
  efi: Enumerate EFI_MEMORY_SP
  ACPI: NUMA: Establish a new drivers/acpi/numa/ directory
  ACPICA: Update version to 20191018
  ACPICA: debugger: remove leading whitespaces when converting a string to a buffer
  ACPICA: acpiexec: initialize all simple types and field units from user input
  ACPICA: debugger: add field unit support for acpi_db_get_next_token
  ...
2019-11-26 19:25:25 -08:00
Linus Torvalds 168829ad09 Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking updates from Ingo Molnar:
 "The main changes in this cycle were:

   - A comprehensive rewrite of the robust/PI futex code's exit handling
     to fix various exit races. (Thomas Gleixner et al)

   - Rework the generic REFCOUNT_FULL implementation using
     atomic_fetch_* operations so that the performance impact of the
     cmpxchg() loops is mitigated for common refcount operations.

     With these performance improvements the generic implementation of
     refcount_t should be good enough for everybody - and this got
     confirmed by performance testing, so remove ARCH_HAS_REFCOUNT and
     REFCOUNT_FULL entirely, leaving the generic implementation enabled
     unconditionally. (Will Deacon)

   - Other misc changes, fixes, cleanups"

* 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits)
  lkdtm: Remove references to CONFIG_REFCOUNT_FULL
  locking/refcount: Remove unused 'refcount_error_report()' function
  locking/refcount: Consolidate implementations of refcount_t
  locking/refcount: Consolidate REFCOUNT_{MAX,SATURATED} definitions
  locking/refcount: Move saturation warnings out of line
  locking/refcount: Improve performance of generic REFCOUNT_FULL code
  locking/refcount: Move the bulk of the REFCOUNT_FULL implementation into the <linux/refcount.h> header
  locking/refcount: Remove unused refcount_*_checked() variants
  locking/refcount: Ensure integer operands are treated as signed
  locking/refcount: Define constants for saturation and max refcount values
  futex: Prevent exit livelock
  futex: Provide distinct return value when owner is exiting
  futex: Add mutex around futex exit
  futex: Provide state handling for exec() as well
  futex: Sanitize exit state handling
  futex: Mark the begin of futex exit explicitly
  futex: Set task::futex_state to DEAD right after handling futex exit
  futex: Split futex_mm_release() for exit/exec
  exit/exec: Seperate mm_release()
  futex: Replace PF_EXITPIDONE with a state
  ...
2019-11-26 16:02:40 -08:00
Michal Simek a1b39bae16 asm-generic: Make msi.h a mandatory include/asm header
msi.h is generic for all architectures except x86, which has its own
version.  Enabling MSI by adding msi.h to every architecture's Kbuild is
just an additional step which doesn't need to be done.

Make msi.h mandatory in the asm-generic/Kbuild so we don't have to do it
for each architecture.

Suggested-by: Christoph Hellwig <hch@infradead.org>
Link: https://lore.kernel.org/r/c991669e29a79b1a8e28c3b4b3a125801a693de8.1571983829.git.michal.simek@xilinx.com
Tested-by: Paul Walmsley <paul.walmsley@sifive.com> # build only, rv32/rv64
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Waiman Long <longman@redhat.com>
Acked-by: Paul Walmsley <paul.walmsley@sifive.com> # arch/riscv
2019-11-26 13:14:11 -06:00
Linus Torvalds 1d87200446 Merge branch 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 asm updates from Ingo Molnar:
 "The main changes in this cycle were:

   - Cross-arch changes to move the linker sections for NOTES and
     EXCEPTION_TABLE into the RO_DATA area, where they belong on most
     architectures. (Kees Cook)

   - Switch the x86 linker fill byte from x90 (NOP) to 0xcc (INT3), to
     trap jumps into the middle of those padding areas instead of
     sliding execution. (Kees Cook)

   - A thorough cleanup of symbol definitions within x86 assembler code.
     The rather randomly named macros got streamlined around a
     (hopefully) straightforward naming scheme:

        SYM_START(name, linkage, align...)
        SYM_END(name, sym_type)

        SYM_FUNC_START(name)
        SYM_FUNC_END(name)

        SYM_CODE_START(name)
        SYM_CODE_END(name)

        SYM_DATA_START(name)
        SYM_DATA_END(name)

     etc - with about three times of these basic primitives with some
     label, local symbol or attribute variant, expressed via postfixes.

     No change in functionality intended. (Jiri Slaby)

   - Misc other changes, cleanups and smaller fixes"

* 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (67 commits)
  x86/entry/64: Remove pointless jump in paranoid_exit
  x86/entry/32: Remove unused resume_userspace label
  x86/build/vdso: Remove meaningless CFLAGS_REMOVE_*.o
  m68k: Convert missed RODATA to RO_DATA
  x86/vmlinux: Use INT3 instead of NOP for linker fill bytes
  x86/mm: Report actual image regions in /proc/iomem
  x86/mm: Report which part of kernel image is freed
  x86/mm: Remove redundant address-of operators on addresses
  xtensa: Move EXCEPTION_TABLE to RO_DATA segment
  powerpc: Move EXCEPTION_TABLE to RO_DATA segment
  parisc: Move EXCEPTION_TABLE to RO_DATA segment
  microblaze: Move EXCEPTION_TABLE to RO_DATA segment
  ia64: Move EXCEPTION_TABLE to RO_DATA segment
  h8300: Move EXCEPTION_TABLE to RO_DATA segment
  c6x: Move EXCEPTION_TABLE to RO_DATA segment
  arm64: Move EXCEPTION_TABLE to RO_DATA segment
  alpha: Move EXCEPTION_TABLE to RO_DATA segment
  x86/vmlinux: Move EXCEPTION_TABLE to RO_DATA segment
  x86/vmlinux: Actually use _etext for the end of the text segment
  vmlinux.lds.h: Allow EXCEPTION_TABLE to live in RO_DATA
  ...
2019-11-26 10:42:40 -08:00
Rafael J. Wysocki 782b59711e Merge branch 'acpi-mm'
* acpi-mm:
  ACPI: HMAT: use %u instead of %d to print u32 values
  ACPI: NUMA: HMAT: fix a section mismatch
  ACPI: HMAT: don't mix pxm and nid when setting memory target processor_pxm
  ACPI: NUMA: HMAT: Register "soft reserved" memory as an "hmem" device
  ACPI: NUMA: HMAT: Register HMAT at device_initcall level
  device-dax: Add a driver for "hmem" devices
  dax: Fix alloc_dax_region() compile warning
  lib: Uplevel the pmem "region" ida to a global allocator
  x86/efi: Add efi_fake_mem support for EFI_MEMORY_SP
  arm/efi: EFI soft reservation to memblock
  x86/efi: EFI soft reservation to E820 enumeration
  efi: Common enable/disable infrastructure for EFI soft reservation
  x86/efi: Push EFI_MEMMAP check into leaf routines
  efi: Enumerate EFI_MEMORY_SP
  ACPI: NUMA: Establish a new drivers/acpi/numa/ directory
2019-11-26 10:31:02 +01:00
Linus Torvalds 642356cb5f Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
 "API:
   - Add library interfaces of certain crypto algorithms for WireGuard
   - Remove the obsolete ablkcipher and blkcipher interfaces
   - Move add_early_randomness() out of rng_mutex

  Algorithms:
   - Add blake2b shash algorithm
   - Add blake2s shash algorithm
   - Add curve25519 kpp algorithm
   - Implement 4 way interleave in arm64/gcm-ce
   - Implement ciphertext stealing in powerpc/spe-xts
   - Add Eric Biggers's scalar accelerated ChaCha code for ARM
   - Add accelerated 32r2 code from Zinc for MIPS
   - Add OpenSSL/CRYPTOGRAMS poly1305 implementation for ARM and MIPS

  Drivers:
   - Fix entropy reading failures in ks-sa
   - Add support for sam9x60 in atmel
   - Add crypto accelerator for amlogic GXL
   - Add sun8i-ce Crypto Engine
   - Add sun8i-ss cryptographic offloader
   - Add a host of algorithms to inside-secure
   - Add NPCM RNG driver
   - add HiSilicon HPRE accelerator
   - Add HiSilicon TRNG driver"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (285 commits)
  crypto: vmx - Avoid weird build failures
  crypto: lib/chacha20poly1305 - use chacha20_crypt()
  crypto: x86/chacha - only unregister algorithms if registered
  crypto: chacha_generic - remove unnecessary setkey() functions
  crypto: amlogic - enable working on big endian kernel
  crypto: sun8i-ce - enable working on big endian
  crypto: mips/chacha - select CRYPTO_SKCIPHER, not CRYPTO_BLKCIPHER
  hwrng: ks-sa - Enable COMPILE_TEST
  crypto: essiv - remove redundant null pointer check before kfree
  crypto: atmel-aes - Change data type for "lastc" buffer
  crypto: atmel-tdes - Set the IV after {en,de}crypt
  crypto: sun4i-ss - fix big endian issues
  crypto: sun4i-ss - hide the Invalid keylen message
  crypto: sun4i-ss - use crypto_ahash_digestsize
  crypto: sun4i-ss - remove dependency on not 64BIT
  crypto: sun4i-ss - Fix 64-bit size_t warnings on sun4i-ss-hash.c
  MAINTAINERS: Add maintainer for HiSilicon SEC V2 driver
  crypto: hisilicon - add DebugFS for HiSilicon SEC
  Documentation: add DebugFS doc for HiSilicon SEC
  crypto: hisilicon - add SRIOV for HiSilicon SEC
  ...
2019-11-25 19:49:58 -08:00
Linus Torvalds 436b2a8039 Printk changes for 5.5
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Merge tag 'printk-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pmladek/printk

Pull printk updates from Petr Mladek:

 - Allow to print symbolic error names via new %pe modifier.

 - Use pr_warn() instead of the remaining pr_warning() calls. Fix
   formatting of the related lines.

 - Add VSPRINTF entry to MAINTAINERS.

* tag 'printk-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pmladek/printk: (32 commits)
  checkpatch: don't warn about new vsprintf pointer extension '%pe'
  MAINTAINERS: Add VSPRINTF
  tools lib api: Renaming pr_warning to pr_warn
  ASoC: samsung: Use pr_warn instead of pr_warning
  lib: cpu_rmap: Use pr_warn instead of pr_warning
  trace: Use pr_warn instead of pr_warning
  dma-debug: Use pr_warn instead of pr_warning
  vgacon: Use pr_warn instead of pr_warning
  fs: afs: Use pr_warn instead of pr_warning
  sh/intc: Use pr_warn instead of pr_warning
  scsi: Use pr_warn instead of pr_warning
  platform/x86: intel_oaktrail: Use pr_warn instead of pr_warning
  platform/x86: asus-laptop: Use pr_warn instead of pr_warning
  platform/x86: eeepc-laptop: Use pr_warn instead of pr_warning
  oprofile: Use pr_warn instead of pr_warning
  of: Use pr_warn instead of pr_warning
  macintosh: Use pr_warn instead of pr_warning
  idsn: Use pr_warn instead of pr_warning
  ide: Use pr_warn instead of pr_warning
  crypto: n2: Use pr_warn instead of pr_warning
  ...
2019-11-25 19:40:40 -08:00
Linus Torvalds 752272f16d ARM:
- Data abort report and injection
 - Steal time support
 - GICv4 performance improvements
 - vgic ITS emulation fixes
 - Simplify FWB handling
 - Enable halt polling counters
 - Make the emulated timer PREEMPT_RT compliant
 
 s390:
 - Small fixes and cleanups
 - selftest improvements
 - yield improvements
 
 PPC:
 - Add capability to tell userspace whether we can single-step the guest.
 - Improve the allocation of XIVE virtual processor IDs
 - Rewrite interrupt synthesis code to deliver interrupts in virtual
   mode when appropriate.
 - Minor cleanups and improvements.
 
 x86:
 - XSAVES support for AMD
 - more accurate report of nested guest TSC to the nested hypervisor
 - retpoline optimizations
 - support for nested 5-level page tables
 - PMU virtualization optimizations, and improved support for nested
   PMU virtualization
 - correct latching of INITs for nested virtualization
 - IOAPIC optimization
 - TSX_CTRL virtualization for more TAA happiness
 - improved allocation and flushing of SEV ASIDs
 - many bugfixes and cleanups
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM updates from Paolo Bonzini:
 "ARM:
   - data abort report and injection
   - steal time support
   - GICv4 performance improvements
   - vgic ITS emulation fixes
   - simplify FWB handling
   - enable halt polling counters
   - make the emulated timer PREEMPT_RT compliant

  s390:
   - small fixes and cleanups
   - selftest improvements
   - yield improvements

  PPC:
   - add capability to tell userspace whether we can single-step the
     guest
   - improve the allocation of XIVE virtual processor IDs
   - rewrite interrupt synthesis code to deliver interrupts in virtual
     mode when appropriate.
   - minor cleanups and improvements.

  x86:
   - XSAVES support for AMD
   - more accurate report of nested guest TSC to the nested hypervisor
   - retpoline optimizations
   - support for nested 5-level page tables
   - PMU virtualization optimizations, and improved support for nested
     PMU virtualization
   - correct latching of INITs for nested virtualization
   - IOAPIC optimization
   - TSX_CTRL virtualization for more TAA happiness
   - improved allocation and flushing of SEV ASIDs
   - many bugfixes and cleanups"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (127 commits)
  kvm: nVMX: Relax guest IA32_FEATURE_CONTROL constraints
  KVM: x86: Grab KVM's srcu lock when setting nested state
  KVM: x86: Open code shared_msr_update() in its only caller
  KVM: Fix jump label out_free_* in kvm_init()
  KVM: x86: Remove a spurious export of a static function
  KVM: x86: create mmu/ subdirectory
  KVM: nVMX: Remove unnecessary TLB flushes on L1<->L2 switches when L1 use apic-access-page
  KVM: x86: remove set but not used variable 'called'
  KVM: nVMX: Do not mark vmcs02->apic_access_page as dirty when unpinning
  KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it
  KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality
  KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID
  KVM: x86: do not modify masked bits of shared MSRs
  KVM: x86: fix presentation of TSX feature in ARCH_CAPABILITIES
  KVM: PPC: Book3S HV: XIVE: Fix potential page leak on error path
  KVM: PPC: Book3S HV: XIVE: Free previous EQ page when setting up a new one
  KVM: nVMX: Assume TLB entries of L1 and L2 are tagged differently if L0 use EPT
  KVM: x86: Unexport kvm_vcpu_reload_apic_access_page()
  KVM: nVMX: add CR4_LA57 bit to nested CR4_FIXED1
  KVM: nVMX: Use semi-colon instead of comma for exit-handlers initialization
  ...
2019-11-25 18:02:36 -08:00
Linus Torvalds 4ba380f616 arm64 updates for 5.5:
- On ARMv8 CPUs without hardware updates of the access flag, avoid
   failing cow_user_page() on PFN mappings if the pte is old. The patches
   introduce an arch_faults_on_old_pte() macro, defined as false on x86.
   When true, cow_user_page() makes the pte young before attempting
   __copy_from_user_inatomic().
 
 - Covert the synchronous exception handling paths in
   arch/arm64/kernel/entry.S to C.
 
 - FTRACE_WITH_REGS support for arm64.
 
 - ZONE_DMA re-introduced on arm64 to support Raspberry Pi 4
 
 - Several kselftest cases specific to arm64, together with a MAINTAINERS
   update for these files (moved to the ARM64 PORT entry).
 
 - Workaround for a Neoverse-N1 erratum where the CPU may fetch stale
   instructions under certain conditions.
 
 - Workaround for Cortex-A57 and A72 errata where the CPU may
   speculatively execute an AT instruction and associate a VMID with the
   wrong guest page tables (corrupting the TLB).
 
 - Perf updates for arm64: additional PMU topologies on HiSilicon
   platforms, support for CCN-512 interconnect, AXI ID filtering in the
   IMX8 DDR PMU, support for the CCPI2 uncore PMU in ThunderX2.
 
 - GICv3 optimisation to avoid a heavy barrier when accessing the
   ICC_PMR_EL1 register.
 
 - ELF HWCAP documentation updates and clean-up.
 
 - SMC calling convention conduit code clean-up.
 
 - KASLR diagnostics printed during boot
 
 - NVIDIA Carmel CPU added to the KPTI whitelist
 
 - Some arm64 mm clean-ups: use generic free_initrd_mem(), remove stale
   macro, simplify calculation in __create_pgd_mapping(), typos.
 
 - Kconfig clean-ups: CMDLINE_FORCE to depend on CMDLINE, choice for
   endinanness to help with allmodconfig.
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Catalin Marinas:
 "Apart from the arm64-specific bits (core arch and perf, new arm64
  selftests), it touches the generic cow_user_page() (reviewed by
  Kirill) together with a macro for x86 to preserve the existing
  behaviour on this architecture.

  Summary:

   - On ARMv8 CPUs without hardware updates of the access flag, avoid
     failing cow_user_page() on PFN mappings if the pte is old. The
     patches introduce an arch_faults_on_old_pte() macro, defined as
     false on x86. When true, cow_user_page() makes the pte young before
     attempting __copy_from_user_inatomic().

   - Covert the synchronous exception handling paths in
     arch/arm64/kernel/entry.S to C.

   - FTRACE_WITH_REGS support for arm64.

   - ZONE_DMA re-introduced on arm64 to support Raspberry Pi 4

   - Several kselftest cases specific to arm64, together with a
     MAINTAINERS update for these files (moved to the ARM64 PORT entry).

   - Workaround for a Neoverse-N1 erratum where the CPU may fetch stale
     instructions under certain conditions.

   - Workaround for Cortex-A57 and A72 errata where the CPU may
     speculatively execute an AT instruction and associate a VMID with
     the wrong guest page tables (corrupting the TLB).

   - Perf updates for arm64: additional PMU topologies on HiSilicon
     platforms, support for CCN-512 interconnect, AXI ID filtering in
     the IMX8 DDR PMU, support for the CCPI2 uncore PMU in ThunderX2.

   - GICv3 optimisation to avoid a heavy barrier when accessing the
     ICC_PMR_EL1 register.

   - ELF HWCAP documentation updates and clean-up.

   - SMC calling convention conduit code clean-up.

   - KASLR diagnostics printed during boot

   - NVIDIA Carmel CPU added to the KPTI whitelist

   - Some arm64 mm clean-ups: use generic free_initrd_mem(), remove
     stale macro, simplify calculation in __create_pgd_mapping(), typos.

   - Kconfig clean-ups: CMDLINE_FORCE to depend on CMDLINE, choice for
     endinanness to help with allmodconfig"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (93 commits)
  arm64: Kconfig: add a choice for endianness
  kselftest: arm64: fix spelling mistake "contiguos" -> "contiguous"
  arm64: Kconfig: make CMDLINE_FORCE depend on CMDLINE
  MAINTAINERS: Add arm64 selftests to the ARM64 PORT entry
  arm64: kaslr: Check command line before looking for a seed
  arm64: kaslr: Announce KASLR status on boot
  kselftest: arm64: fake_sigreturn_misaligned_sp
  kselftest: arm64: fake_sigreturn_bad_size
  kselftest: arm64: fake_sigreturn_duplicated_fpsimd
  kselftest: arm64: fake_sigreturn_missing_fpsimd
  kselftest: arm64: fake_sigreturn_bad_size_for_magic0
  kselftest: arm64: fake_sigreturn_bad_magic
  kselftest: arm64: add helper get_current_context
  kselftest: arm64: extend test_init functionalities
  kselftest: arm64: mangle_pstate_invalid_mode_el[123][ht]
  kselftest: arm64: mangle_pstate_invalid_daif_bits
  kselftest: arm64: mangle_pstate_invalid_compat_toggle and common utils
  kselftest: arm64: extend toplevel skeleton Makefile
  drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform
  arm64: mm: reserve CMA and crashkernel in ZONE_DMA32
  ...
2019-11-25 15:39:19 -08:00
Andre Przywara 39a1a8941b arm64: dts: juno: Fix UART frequency
Older versions of the Juno *SoC* TRM [1] recommended that the UART clock
source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more
correct value of 7.3728 MHz. Somehow the wrong value managed to end up in
our DT.

Doing a prime factorisation, a modulo divide by 115200 and trying
to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest
that the old value was actually a typo. The actual UART clock is driven
by a PLL, configured via a parameter in some board.txt file in the
firmware, which reads 7.37 MHz (sic!).

Fix this to correct the baud rate divisor calculation on the Juno board.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0515b.b/DDI0515B_b_juno_arm_development_platform_soc_trm.pdf
[2] http://infocenter.arm.com/help/topic/com.arm.doc.100113_0000_07_en/arm_versatile_express_juno_development_platform_(v2m_juno)_technical_reference_manual_100113_0000_07_en.pdf

Fixes: 71f867ec13 ("arm64: Add Juno board device tree.")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-25 17:43:51 +00:00
Will Deacon fb041bb7c0 locking/refcount: Consolidate implementations of refcount_t
The generic implementation of refcount_t should be good enough for
everybody, so remove ARCH_HAS_REFCOUNT and REFCOUNT_FULL entirely,
leaving the generic implementation enabled unconditionally.

Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Kees Cook <keescook@chromium.org>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Elena Reshetova <elena.reshetova@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20191121115902.2551-9-will@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-11-25 09:15:32 +01:00
Linus Torvalds 81429eb8d9 arm64 fix for 5.4
- Ensure PAN is re-enabled following user fault in uaccess routines
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fix from Will Deacon:
 "Ensure PAN is re-enabled following user fault in uaccess routines.

  After I thought we were done for 5.4, we had a report this week of a
  nasty issue that has been shown to leak data between different user
  address spaces thanks to corruption of entries in the TLB. In
  hindsight, we should have spotted this in review when the PAN code was
  merged back in v4.3, but hindsight is 20/20 and I'm trying not to beat
  myself up too much about it despite being fairly miserable.

  Anyway, the fix is "obvious" but the actual failure is more more
  subtle, and is described in the commit message. I've included a fairly
  mechanical follow-up patch here as well, which moves this checking out
  into the C wrappers which is what we do for {get,put}_user() already
  and allows us to remove these bloody assembly macros entirely. The
  patches have passed kernelci [1] [2] [3] and CKI [4] tests over night,
  as well as some targetted testing [5] for this particular issue.

  The first patch is tagged for stable and should be applied to 4.14,
  4.19 and 5.3. I have separate backports for 4.4 and 4.9, which I'll
  send out once this has landed in your tree (although the original
  patch applies cleanly, it won't build for those two trees).

  Thanks to Pavel Tatashin for reporting this and Mark Rutland for
  helping to diagnose the issue and review/test the solution"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: uaccess: Remove uaccess_*_not_uao asm macros
  arm64: uaccess: Ensure PAN is re-enabled after unhandled uaccess fault
2019-11-21 12:15:24 -08:00
Christoph Hellwig d7293f79ca Merge branch 'for-next/zone-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into dma-mapping-for-next
Pull in a stable branch from the arm64 tree that adds the zone_dma_bits
variable to avoid creating hard to resolve conflicts with that addition.
2019-11-21 18:13:03 +01:00
Paolo Bonzini 46f4f0aabc Merge branch 'kvm-tsx-ctrl' into HEAD
Conflicts:
	arch/x86/kvm/vmx/vmx.c
2019-11-21 12:03:40 +01:00
Paolo Bonzini 14edff8831 KVM/arm updates for Linux 5.5:
- Allow non-ISV data aborts to be reported to userspace
 - Allow injection of data aborts from userspace
 - Expose stolen time to guests
 - GICv4 performance improvements
 - vgic ITS emulation fixes
 - Simplify FWB handling
 - Enable halt pool counters
 - Make the emulated timer PREEMPT_RT compliant
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Merge tag 'kvmarm-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/arm updates for Linux 5.5:

- Allow non-ISV data aborts to be reported to userspace
- Allow injection of data aborts from userspace
- Expose stolen time to guests
- GICv4 performance improvements
- vgic ITS emulation fixes
- Simplify FWB handling
- Enable halt pool counters
- Make the emulated timer PREEMPT_RT compliant

Conflicts:
	include/uapi/linux/kvm.h
2019-11-21 09:58:35 +01:00
Christoph Hellwig 56e35f9c5b dma-mapping: drop the dev argument to arch_sync_dma_for_*
These are pure cache maintainance routines, so drop the unused
struct device argument.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2019-11-20 20:31:38 +01:00
Pavel Tatashin e50be648aa arm64: uaccess: Remove uaccess_*_not_uao asm macros
It is safer and simpler to drop the uaccess assembly macros in favour of
inline C functions. Although this bloats the Image size slightly, it
aligns our user copy routines with '{get,put}_user()' and generally
makes the code a lot easier to reason about.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
[will: tweaked commit message and changed temporary variable names]
Signed-off-by: Will Deacon <will@kernel.org>
2019-11-20 18:51:54 +00:00
Pavel Tatashin 94bb804e1e arm64: uaccess: Ensure PAN is re-enabled after unhandled uaccess fault
A number of our uaccess routines ('__arch_clear_user()' and
'__arch_copy_{in,from,to}_user()') fail to re-enable PAN if they
encounter an unhandled fault whilst accessing userspace.

For CPUs implementing both hardware PAN and UAO, this bug has no effect
when both extensions are in use by the kernel.

For CPUs implementing hardware PAN but not UAO, this means that a kernel
using hardware PAN may execute portions of code with PAN inadvertently
disabled, opening us up to potential security vulnerabilities that rely
on userspace access from within the kernel which would usually be
prevented by this mechanism. In other words, parts of the kernel run the
same way as they would on a CPU without PAN implemented/emulated at all.

For CPUs not implementing hardware PAN and instead relying on software
emulation via 'CONFIG_ARM64_SW_TTBR0_PAN=y', the impact is unfortunately
much worse. Calling 'schedule()' with software PAN disabled means that
the next task will execute in the kernel using the page-table and ASID
of the previous process even after 'switch_mm()', since the actual
hardware switch is deferred until return to userspace. At this point, or
if there is a intermediate call to 'uaccess_enable()', the page-table
and ASID of the new process are installed. Sadly, due to the changes
introduced by KPTI, this is not an atomic operation and there is a very
small window (two instructions) where the CPU is configured with the
page-table of the old task and the ASID of the new task; a speculative
access in this state is disastrous because it would corrupt the TLB
entries for the new task with mappings from the previous address space.

As Pavel explains:

  | I was able to reproduce memory corruption problem on Broadcom's SoC
  | ARMv8-A like this:
  |
  | Enable software perf-events with PERF_SAMPLE_CALLCHAIN so userland's
  | stack is accessed and copied.
  |
  | The test program performed the following on every CPU and forking
  | many processes:
  |
  |	unsigned long *map = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE,
  |				  MAP_SHARED | MAP_ANONYMOUS, -1, 0);
  |	map[0] = getpid();
  |	sched_yield();
  |	if (map[0] != getpid()) {
  |		fprintf(stderr, "Corruption detected!");
  |	}
  |	munmap(map, PAGE_SIZE);
  |
  | From time to time I was getting map[0] to contain pid for a
  | different process.

Ensure that PAN is re-enabled when returning after an unhandled user
fault from our uaccess routines.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Fixes: 338d4f49d6 ("arm64: kernel: Add support for Privileged Access Never")
Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
[will: rewrote commit message]
Signed-off-by: Will Deacon <will@kernel.org>
2019-11-20 18:51:47 +00:00
Thor Thayer 2f804ba7aa arm64: dts: agilex: Add SysMgr to Ethernet nodes
Ethernet needs the System Manager to setup the low-level
interface and PHY.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-11-18 15:51:50 -06:00
Thor Thayer a6706bd60b arm64: dts: agilex: Add SysMgr compatible
Add the System Manager compatible string to the sysmgr node
for accessing the System Manager driver.
Ethernet and EDAC drivers use this driver.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-11-18 15:50:56 -06:00
Thor Thayer 310704e614 arm64: dts: agilex: Add EDAC Device Tree
Add the device tree nodes required to support the Intel
Agilex SoCFPGA EDAC framework.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-11-18 15:50:56 -06:00
Dinh Nguyen 3c0f3b8545 arm64: dts: add NAND board files for Stratix10 and Agilex
The Stratix10 and Agilex devkits support a separate NAND daughter card.
The NAND daughter card replaces the SDMMC slot that is on the default
daughter card thus requires a separate board dts file.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-11-18 15:50:56 -06:00
Dinh Nguyen 6844135353 arm64: dts: agilex: add NAND IP to base dts
Add NAND entry to base DTSI.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-11-18 15:50:55 -06:00
Ard Biesheuvel c12d3362a7 int128: move __uint128_t compiler test to Kconfig
In order to use 128-bit integer arithmetic in C code, the architecture
needs to have declared support for it by setting ARCH_SUPPORTS_INT128,
and it requires a version of the toolchain that supports this at build
time. This is why all existing tests for ARCH_SUPPORTS_INT128 also test
whether __SIZEOF_INT128__ is defined, since this is only the case for
compilers that can support 128-bit integers.

Let's fold this additional test into the Kconfig declaration of
ARCH_SUPPORTS_INT128 so that we can also use the symbol in Makefiles,
e.g., to decide whether a certain object needs to be included in the
first place.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:42 +08:00
Ard Biesheuvel f569ca1647 crypto: arm64/poly1305 - incorporate OpenSSL/CRYPTOGAMS NEON implementation
This is a straight import of the OpenSSL/CRYPTOGAMS Poly1305 implementation
for NEON authored by Andy Polyakov, and contributed by him to the OpenSSL
project. The file 'poly1305-armv8.pl' is taken straight from this upstream
GitHub repository [0] at commit ec55a08dc0244ce570c4fc7cade330c60798952f,
and already contains all the changes required to build it as part of a
Linux kernel module.

[0] https://github.com/dot-asm/cryptogams

Co-developed-by: Andy Polyakov <appro@cryptogams.org>
Signed-off-by: Andy Polyakov <appro@cryptogams.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:41 +08:00
Ard Biesheuvel b36d8c09e7 crypto: arm/chacha - remove dependency on generic ChaCha driver
Instead of falling back to the generic ChaCha skcipher driver for
non-SIMD cases, use a fast scalar implementation for ARM authored
by Eric Biggers. This removes the module dependency on chacha-generic
altogether, which also simplifies things when we expose the ChaCha
library interface from this module.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:40 +08:00
Ard Biesheuvel b3aad5bad2 crypto: arm64/chacha - expose arm64 ChaCha routine as library function
Expose the accelerated NEON ChaCha routine directly as a symbol
export so that users of the ChaCha library API can use it directly.

Given that calls into the library API will always go through the
routines in this module if it is enabled, switch to static keys
to select the optimal implementation available (which may be none
at all, in which case we defer to the generic implementation for
all invocations).

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:39 +08:00
Ard Biesheuvel c77da4867c crypto: arm64/chacha - depend on generic chacha library instead of crypto driver
Depend on the generic ChaCha library routines instead of pulling in the
generic ChaCha skcipher driver, which is more than we need, and makes
managing the dependencies between the generic library, generic driver,
accelerated library and driver more complicated.

While at it, drop the logic to prefer the scalar code on short inputs.
Turning the NEON on and off is cheap these days, and one major use case
for ChaCha20 is ChaCha20-Poly1305, which is guaranteed to hit the scalar
path upon every invocation  (when doing the Poly1305 nonce generation)

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:39 +08:00
Ard Biesheuvel 5fb8ef2580 crypto: chacha - move existing library code into lib/crypto
Currently, our generic ChaCha implementation consists of a permute
function in lib/chacha.c that operates on the 64-byte ChaCha state
directly [and which is always included into the core kernel since it
is used by the /dev/random driver], and the crypto API plumbing to
expose it as a skcipher.

In order to support in-kernel users that need the ChaCha streamcipher
but have no need [or tolerance] for going through the abstractions of
the crypto API, let's expose the streamcipher bits via a library API
as well, in a way that permits the implementation to be superseded by
an architecture specific one if provided.

So move the streamcipher code into a separate module in lib/crypto,
and expose the init() and crypt() routines to users of the library.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-17 09:02:39 +08:00
Olof Johansson db6efda854 Two OP-TE driver fixes:
- Add proper cleanup on optee_enumerate_devices() failure
 - Make sure to register kernel allocations of dynamic shared memory
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Merge tag 'tee-fixes-for-v5.4' of git://git.linaro.org/people/jens.wiklander/linux-tee into arm/fixes

Two OP-TE driver fixes:
- Add proper cleanup on optee_enumerate_devices() failure
- Make sure to register kernel allocations of dynamic shared memory

* tag 'tee-fixes-for-v5.4' of git://git.linaro.org/people/jens.wiklander/linux-tee: (591 commits)
  tee: optee: fix device enumeration error handling
  tee: optee: Fix dynamic shm pool allocations
  Linux 5.4-rc3
  tracing: Initialize iter->seq after zeroing in tracing_read_pipe()
  tracing/hwlat: Don't ignore outer-loop duration when calculating max_latency
  tracing/hwlat: Report total time spent in all NMIs during the sample
  recordmcount: Fix nop_mcount() function
  tracing: Do not create tracefs files if tracefs lockdown is in effect
  tracing: Add locked_down checks to the open calls of files created for tracefs
  tracing: Add tracing_check_open_get_tr()
  tracing: Have trace events system open call tracing_open_generic_tr()
  tracing: Get trace_array reference for available_tracers files
  ftrace: Get a reference counter for the trace_array on filter files
  tracefs: Revert ccbd54ff54 ("tracefs: Restrict tracefs when the kernel is locked down")
  perf/x86/cstate: Add Tiger Lake CPU support
  perf/x86/msr: Add Tiger Lake CPU support
  perf/x86/intel: Add Tiger Lake CPU support
  perf/x86/cstate: Update C-state counters for Ice Lake
  perf/x86/msr: Add new CPU model numbers for Ice Lake
  perf/x86/cstate: Add Comet Lake CPU support
  ...

Link: https://lore.kernel.org/r/20191115105353.GA26176@jax
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-16 15:38:59 -08:00
Anders Roxell d8e85e144b arm64: Kconfig: add a choice for endianness
When building allmodconfig KCONFIG_ALLCONFIG=$(pwd)/arch/arm64/configs/defconfig
CONFIG_CPU_BIG_ENDIAN gets enabled. Which tends not to be what most
people want. Another concern that has come up is that ACPI isn't built
for an allmodconfig kernel today since that also depends on !CPU_BIG_ENDIAN.

Rework so that we introduce a 'choice' and default the choice to
CPU_LITTLE_ENDIAN. That means that when we build an allmodconfig kernel
it will default to CPU_LITTLE_ENDIAN that most people tends to want.

Reviewed-by: John Garry <john.garry@huawei.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-14 14:39:03 +00:00
Olof Johansson f1deadb5be mt8183:
add systimer node and bindings
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Merge tag 'v5.4-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt8183:
add systimer node and bindings

* tag 'v5.4-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  arm64: dts: mt8183: add systimer0 device node
  dt-bindings: mediatek: update bindings for MT8183 systimer

Link: https://lore.kernel.org/r/4d3984bd-4bb3-b8c4-6e02-19a7185cd682@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-11 13:08:44 -08:00
Christoph Hellwig d092a87073 arch: rely on asm-generic/io.h for default ioremap_* definitions
Various architectures that use asm-generic/io.h still defined their
own default versions of ioremap_nocache, ioremap_wt and ioremap_wc
that point back to plain ioremap directly or indirectly.  Remove these
definitions and rely on asm-generic/io.h instead.  For this to work
the backup ioremap_* defintions needs to be changed to purely cpp
macros instea of inlines to cover for architectures like openrisc
that only define ioremap after including <asm-generic/io.h>.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
2019-11-11 21:18:19 +01:00
Anders Roxell f70c08e46d arm64: Kconfig: make CMDLINE_FORCE depend on CMDLINE
When building allmodconfig KCONFIG_ALLCONFIG=$(pwd)/arch/arm64/configs/defconfig
CONFIG_CMDLINE_FORCE gets enabled. Which forces the user to pass the
full cmdline to CONFIG_CMDLINE="...".

Rework so that CONFIG_CMDLINE_FORCE gets set only if CONFIG_CMDLINE is
set to something except an empty string.

Suggested-by: John Garry <john.garry@huawei.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-11 18:22:57 +00:00
Christoph Hellwig 34dc0ea6bc dma-direct: provide mmap and get_sgtable method overrides
For dma-direct we know that the DMA address is an encoding of the
physical address that we can trivially decode.  Use that fact to
provide implementations that do not need the arch_dma_coherent_to_pfn
architecture hook.  Note that we still can only support mmap of
non-coherent memory only if the architecture provides a way to set an
uncached bit in the page tables.  This must be true for architectures
that use the generic remap helpers, but other architectures can also
manually select it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
2019-11-11 10:52:15 +01:00
Olof Johansson 5588aa81d2 arm64: dts: Amlogic updates for v5.5
Hightlights
 - new board; ugoos am6, based on G12B SoC
 - g12: add thermal driver and cooling properties
 - sm1: enable audio on SEI610 board
 - IR: add several keymaps
 - sdio: add keep-power-in-suspend property for multiple boards
 - pcie: add support for G12A
 - multiple fixes, cleanups
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Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.5

Hightlights
- new board; ugoos am6, based on G12B SoC
- g12: add thermal driver and cooling properties
- sm1: enable audio on SEI610 board
- IR: add several keymaps
- sdio: add keep-power-in-suspend property for multiple boards
- pcie: add support for G12A
- multiple fixes, cleanups

* tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (62 commits)
  arm64: dts: meson-gx: fix i2c compatible
  arm64: dts: meson-gx: cec node should be disabled by default
  arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
  arm64: dts: meson-gxm: fix gpu irq order
  arm64: dts: meson-g12a: fix gpu irq order
  ARM64: dts: amlogic: adds crypto hardware node
  arm64: dts: meson-gxbb-vega-s95: set rc-vega-s9x ir keymap
  arm64: dts: meson-gxm-vega-s96: set rc-vega-s9x ir keymap
  arm64: dts: meson: g12b: add cooling properties
  arm64: dts: meson: g12a: add cooling properties
  arm64: dts: meson: g12: Add minimal thermal zone
  arm64: dts: meson: g12: add temperature sensor
  arm64: dts: meson: sei610: enable audio
  arm64: dts: meson: sm1: add audio devices
  dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
  dt-bindings: clk: axg-audio: add sm1 bindings
  arm64: dts: meson-g12: add support for simplefb
  arm64: dts: meson: g12a: add audio devices resets
  arm64: dts: meson: odroid-c2: Add missing regulator linked to HDMI supply
  arm64: dts: meson: odroid-c2: Add missing regulator linked to VDDIO_AO3V3 regulator
  ...

Link: https://lore.kernel.org/r/7hd0dzs0m1.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-10 21:29:06 -08:00
Olof Johansson 077f46db63 One new soc the rk3308 with quad-Cortex-A35 cores.
New boards are Beelink A1, roc-rk3308-cc, rk3308-evb
 A big number of improvements for the rk3399-roc-pc board
 (support for M.2 variant, reworked power-tree, buttons, leds)
 and further improvements of the px30-evb (usb2phy, otp controller,
 removal of default optee node - optee does add its own when loaded)
 And finally rk3328 audio support, sdmmc detection fix and enabled
 of the gpu on rk3399-puma.
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Merge tag 'v5.5-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

One new soc the rk3308 with quad-Cortex-A35 cores.
New boards are Beelink A1, roc-rk3308-cc, rk3308-evb
A big number of improvements for the rk3399-roc-pc board
(support for M.2 variant, reworked power-tree, buttons, leds)
and further improvements of the px30-evb (usb2phy, otp controller,
removal of default optee node - optee does add its own when loaded)
And finally rk3328 audio support, sdmmc detection fix and enabled
of the gpu on rk3399-puma.

* tag 'v5.5-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
  arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
  arm64: dts: rockchip: Add Beelink A1
  dt-bindings: ARM: rockchip: Add Beelink A1
  arm64: dts: rockchip: Add RK3328 audio pipelines
  arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc
  dt-bindings: Add doc for Firefly ROC-RK3308-CC board
  dt-bindings: clean up rockchip grf binding document
  arm64: dts: rockchip: Rework voltage supplies for regulators on rk3399-roc-pc
  arm64: dts: rockchip: Add vcc_sys enable pin on rk3399-roc-pc
  arm64: dts: rockchip: Add nodes for buttons on rk3399-roc-pc
  arm64: dts: rockchip: enable usb2phy on px30-evb
  arm64: dts: rockchip: add usb2phy for px30
  arm64: dts: rockchip: remove px30 default optee node
  arm64: dts: rockchip: enable gpu on rk3399-puma
  arm64: dts: rockchip: add px30 otp controller
  arm64: dts: rockchip: Add LED nodes on rk3399-roc-pc
  arm64: dts: rockchip: Add basic dts for RK3308 EVB
  dt-bindings: Add doc for rk3308-evb
  arm64: dts: rockchip: Add core dts for RK3308 SOC
  ...

Link: https://lore.kernel.org/r/12204771.K8DX0fml49@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-10 21:28:10 -08:00
Linus Torvalds 4486695680 ARM: SoC fixes
A set of fixes that have trickled in over the last couple of weeks:
 
  - MAINTAINER update for Cavium/Marvell ThunderX2
 
  - stm32 tweaks to pinmux for Joystick/Camera, and RAM allocation for CAN
    interfaces
 
  - i.MX fixes for voltage regulator GPIO mappings, fixes voltage scaling
    issues
 
  - More i.MX fixes for various issues on i.MX eval boards: interrupt
    storm due to u-boot leaving pins in new states, fixing power button
    config, a couple of compatible-string corrections.
 
  - Powerdown and Suspend/Resume fixes for Allwinner A83-based tablets
 
  - A few documentation tweaks and a fix of a memory leak in the reset
    subsystem
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "A set of fixes that have trickled in over the last couple of weeks:

   - MAINTAINER update for Cavium/Marvell ThunderX2

   - stm32 tweaks to pinmux for Joystick/Camera, and RAM allocation for
     CAN interfaces

   - i.MX fixes for voltage regulator GPIO mappings, fixes voltage
     scaling issues

   - More i.MX fixes for various issues on i.MX eval boards: interrupt
     storm due to u-boot leaving pins in new states, fixing power button
     config, a couple of compatible-string corrections.

   - Powerdown and Suspend/Resume fixes for Allwinner A83-based tablets

   - A few documentation tweaks and a fix of a memory leak in the reset
     subsystem"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: update Cavium ThunderX2 maintainers
  ARM: dts: stm32: change joystick pinctrl definition on stm32mp157c-ev1
  ARM: dts: stm32: remove OV5640 pinctrl definition on stm32mp157c-ev1
  ARM: dts: stm32: Fix CAN RAM mapping on stm32mp157c
  ARM: dts: stm32: relax qspi pins slew-rate for stm32mp157
  arm64: dts: zii-ultra: fix ARM regulator GPIO handle
  ARM: sunxi: Fix CPU powerdown on A83T
  ARM: dts: sun8i-a83t-tbs-a711: Fix WiFi resume from suspend
  arm64: dts: imx8mn: fix compatible string for sdma
  arm64: dts: imx8mm: fix compatible string for sdma
  reset: fix reset_control_ops kerneldoc comment
  ARM: dts: imx6-logicpd: Re-enable SNVS power key
  soc: imx: gpc: fix initialiser format
  ARM: dts: imx6qdl-sabreauto: Fix storm of accelerometer interrupts
  arm64: dts: ls1028a: fix a compatible issue
  reset: fix reset_control_get_exclusive kerneldoc comment
  reset: fix reset_control_lookup kerneldoc comment
  reset: fix of_reset_control_get_count kerneldoc comment
  reset: fix of_reset_simple_xlate kerneldoc comment
  reset: Fix memory leak in reset_control_array_put()
2019-11-10 13:41:59 -08:00
Dehui Sun 5bc8e2875f arm64: dts: mt8183: add systimer0 device node
Add systimer device node for MT8183.

Signed-off-by: Dehui Sun <dehui.sun@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-11-10 21:14:18 +01:00
Linus Torvalds 621084cd3d Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:
 "A small set of fixes for timekeepoing and clocksource drivers:

   - VDSO data was updated conditional on the availability of a VDSO
     capable clocksource. This causes the VDSO functions which do not
     depend on a VDSO capable clocksource to operate on stale data.
     Always update unconditionally.

   - Prevent a double free in the mediatek driver

   - Use the proper helper in the sh_mtu2 driver so it won't attempt to
     initialize non-existing interrupts"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  timekeeping/vsyscall: Update VDSO data unconditionally
  clocksource/drivers/sh_mtu2: Do not loop using platform_get_irq_by_name()
  clocksource/drivers/mediatek: Fix error handling
2019-11-10 12:03:58 -08:00
Clément Péron 6555431ba2 media: arm64: dts: allwinner: beelink-gs1: Add rc-beelink-gs1 keymap
Beelink GS1 ships with a NEC remote control.

Add the rc keymap to the device-tree.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2019-11-09 09:17:26 +01:00
Peter Geis 75aa567803 arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
With working GPIO, during init the GPIO state s reset.
This causes the sdmmc regulator to shut down, preventing detection.
Removing and replacing the card will allow it to be detected, but that should not be necessary.
Fix this by setting the regulator on at boot.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20191016185945.1962-1-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-09 02:15:22 +01:00
Markus Reichl f9010b0edc arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
For rk3399-roc-pc is a mezzanine board available that carries M.2 and
POE interfaces. Use it with a separate dts.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/0fb4e21a-fe78-00aa-6142-ca8682a913eb@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-08 23:07:06 +01:00
Robin Murphy 79702ded8c arm64: dts: rockchip: Add Beelink A1
Beelink A1 is a TV box implementing the higher-end options of the
RK3328 reference design - the DTB from the stock Android firmware is
clearly the "rk3328-box-plus" variant from the Rockchip 3.10 BSP with
minor modifications to accommodate the USB WiFi module and additional
VFD-style LED driver. It features:

- 4GB of 32-bit LPDDR3
- 16GB of HS200 eMMC (newer models with 32GB also exist)
- Realtek RTL8211F phy for gigabit ethernet
- Fn-Link 6221E-UUC module (RealTek RTL8821CU) for 11ac WiFi
  and Bluetooth 4.2
- HDMI and analog A/V
- 1x USB 3.0 type A host, 1x USB 2.0 type A OTG, 1x micro SD
- IR receiver and a neat little LED clock display.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/2aa21c5f3020062cf6a47057bdf3c01f0ec863ea.1571090991.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-08 23:06:34 +01:00
Robin Murphy 29e8976e60 arm64: dts: rockchip: Add RK3328 audio pipelines
The audio pipelines for HDMI and the analog codec are internal to the
SoC, so it makes sense to describe them at that level such that boards
need only enable the respective nodes for outputs they implement.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/a09c8d795e7a66fb7bc47af2b6580f6e8dbec91e.1571090991.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-08 23:06:18 +01:00
Olof Johansson 7c3ddc6b03 Texas Instruments K3 SoC family changes for 5.5
- Add USB support for J721E
 - Add mailbox support for AM65x and J721E
 - Add MMC/SD support for J721E
 - Disable WP for AM654 MMC0
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Merge tag 'ti-k3-soc-for-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

Texas Instruments K3 SoC family changes for 5.5

- Add USB support for J721E
- Add mailbox support for AM65x and J721E
- Add MMC/SD support for J721E
- Disable WP for AM654 MMC0

* tag 'ti-k3-soc-for-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
  arm64: dts: ti: k3-j721e-main: add USB controller nodes
  arm64: dts: ti: k3-am654-base-board: Add disable-wp for mmc0
  arm64: dts: ti: j721e-common-proc-board: Add Support for eMMC and SD card
  arm64: dts: ti: j721e-main: Add SDHCI nodes
  arm64: dts: ti: k3-j721e-common-proc-board: Add IPC sub-mailbox nodes
  arm64: dts: ti: k3-j721e-main: Add mailbox cluster nodes
  arm64: dts: ti: k3-am65-base-board: Add IPC sub-mailbox nodes for R5Fs
  arm64: dts: ti: k3-am65-main: Add mailbox cluster nodes

Link: https://lore.kernel.org/r/681f1bb5-d28c-a302-690a-82f0be4a7f34@ti.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-08 10:34:55 -08:00
Olof Johansson 44124df44d arm64: dts: zynqmp: DT changes for v5.5
- Add firmware node with fpga and nvmem support
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Merge tag 'zynqmp-dt-for-v5.5' of https://github.com/Xilinx/linux-xlnx into arm/dt

arm64: dts: zynqmp: DT changes for v5.5

- Add firmware node with fpga and nvmem support

* tag 'zynqmp-dt-for-v5.5' of https://github.com/Xilinx/linux-xlnx:
  arm64: zynqmp: Add support for zynqmp nvmem firmware driver
  arm64: zynqmp: Label whole PL part as fpga_full region
  arm64: zynqmp: Add support for zynqmp fpga manager
  arm64: zynqmp: Add firmware DT node

Link: https://lore.kernel.org/r/543394c2-ddff-33be-4c90-e01847539c64@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-08 10:24:35 -08:00
Catalin Marinas 6be22809e5 Merge branches 'for-next/elf-hwcap-docs', 'for-next/smccc-conduit-cleanup', 'for-next/zone-dma', 'for-next/relax-icc_pmr_el1-sync', 'for-next/double-page-fault', 'for-next/misc', 'for-next/kselftest-arm64-signal' and 'for-next/kaslr-diagnostics' into for-next/core
* for-next/elf-hwcap-docs:
  : Update the arm64 ELF HWCAP documentation
  docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]
  docs/arm64: cpu-feature-registers: Documents missing visible fields
  docs/arm64: elf_hwcaps: Document HWCAP_SB
  docs/arm64: elf_hwcaps: sort the HWCAP{, 2} documentation by ascending value

* for-next/smccc-conduit-cleanup:
  : SMC calling convention conduit clean-up
  firmware: arm_sdei: use common SMCCC_CONDUIT_*
  firmware/psci: use common SMCCC_CONDUIT_*
  arm: spectre-v2: use arm_smccc_1_1_get_conduit()
  arm64: errata: use arm_smccc_1_1_get_conduit()
  arm/arm64: smccc/psci: add arm_smccc_1_1_get_conduit()

* for-next/zone-dma:
  : Reintroduction of ZONE_DMA for Raspberry Pi 4 support
  arm64: mm: reserve CMA and crashkernel in ZONE_DMA32
  dma/direct: turn ARCH_ZONE_DMA_BITS into a variable
  arm64: Make arm64_dma32_phys_limit static
  arm64: mm: Fix unused variable warning in zone_sizes_init
  mm: refresh ZONE_DMA and ZONE_DMA32 comments in 'enum zone_type'
  arm64: use both ZONE_DMA and ZONE_DMA32
  arm64: rename variables used to calculate ZONE_DMA32's size
  arm64: mm: use arm64_dma_phys_limit instead of calling max_zone_dma_phys()

* for-next/relax-icc_pmr_el1-sync:
  : Relax ICC_PMR_EL1 (GICv3) accesses when ICC_CTLR_EL1.PMHE is clear
  arm64: Document ICC_CTLR_EL3.PMHE setting requirements
  arm64: Relax ICC_PMR_EL1 accesses when ICC_CTLR_EL1.PMHE is clear

* for-next/double-page-fault:
  : Avoid a double page fault in __copy_from_user_inatomic() if hw does not support auto Access Flag
  mm: fix double page fault on arm64 if PTE_AF is cleared
  x86/mm: implement arch_faults_on_old_pte() stub on x86
  arm64: mm: implement arch_faults_on_old_pte() on arm64
  arm64: cpufeature: introduce helper cpu_has_hw_af()

* for-next/misc:
  : Various fixes and clean-ups
  arm64: kpti: Add NVIDIA's Carmel core to the KPTI whitelist
  arm64: mm: Remove MAX_USER_VA_BITS definition
  arm64: mm: simplify the page end calculation in __create_pgd_mapping()
  arm64: print additional fault message when executing non-exec memory
  arm64: psci: Reduce the waiting time for cpu_psci_cpu_kill()
  arm64: pgtable: Correct typo in comment
  arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
  arm64: cpufeature: Fix typos in comment
  arm64/mm: Poison initmem while freeing with free_reserved_area()
  arm64: use generic free_initrd_mem()
  arm64: simplify syscall wrapper ifdeffery

* for-next/kselftest-arm64-signal:
  : arm64-specific kselftest support with signal-related test-cases
  kselftest: arm64: fake_sigreturn_misaligned_sp
  kselftest: arm64: fake_sigreturn_bad_size
  kselftest: arm64: fake_sigreturn_duplicated_fpsimd
  kselftest: arm64: fake_sigreturn_missing_fpsimd
  kselftest: arm64: fake_sigreturn_bad_size_for_magic0
  kselftest: arm64: fake_sigreturn_bad_magic
  kselftest: arm64: add helper get_current_context
  kselftest: arm64: extend test_init functionalities
  kselftest: arm64: mangle_pstate_invalid_mode_el[123][ht]
  kselftest: arm64: mangle_pstate_invalid_daif_bits
  kselftest: arm64: mangle_pstate_invalid_compat_toggle and common utils
  kselftest: arm64: extend toplevel skeleton Makefile

* for-next/kaslr-diagnostics:
  : Provide diagnostics on boot for KASLR
  arm64: kaslr: Check command line before looking for a seed
  arm64: kaslr: Announce KASLR status on boot
2019-11-08 17:46:11 +00:00
Linus Torvalds 9e8ed26e60 arm64 fix for -rc7
- Fix pte_same() to avoid getting stuck on write fault
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fix from Will Deacon:
 "Fix pte_same() to avoid getting stuck on write fault.

  This single arm64 fix is a revert of 747a70e60b ("arm64: Fix
  copy-on-write referencing in HugeTLB"), not because that patch was
  wrong, but because it was broken by aa57157be6 ("arm64: Ensure
  VM_WRITE|VM_SHARED ptes are clean by default") which we merged in
  -rc6.

  We spotted the issue in Android (AOSP), where one of the JIT threads
  gets stuck on a write fault during boot because the faulting pte is
  marked as PTE_DIRTY | PTE_WRITE | PTE_RDONLY and the fault handler
  decides that there's nothing to do thanks to pte_same() masking out
  PTE_RDONLY.

  Thanks to John Stultz for reporting this and testing this so quickly,
  and to Steve Capper for confirming that the HugeTLB tests continue to
  pass"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: Do not mask out PTE_RDONLY in pte_same()
2019-11-08 09:43:34 -08:00
Mark Brown 2203e1adb9 arm64: kaslr: Check command line before looking for a seed
Now that we print diagnostics at boot the reason why we do not initialise
KASLR matters. Currently we check for a seed before we check if the user
has explicitly disabled KASLR on the command line which will result in
misleading diagnostics so reverse the order of those checks. We still
parse the seed from the DT early so that if the user has both provided a
seed and disabled KASLR on the command line we still mask the seed on
the command line.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-08 17:36:51 +00:00
Mark Brown 294a9ddde6 arm64: kaslr: Announce KASLR status on boot
Currently the KASLR code is silent at boot unless it forces on KPTI in
which case a message will be printed for that. This can lead to users
incorrectly believing their system has the feature enabled when it in
fact does not, and if they notice the problem the lack of any
diagnostics makes it harder to understand the problem. Add an initcall
which prints a message showing the status of KASLR during boot to make
the status clear.

This is particularly useful in cases where we don't have a seed. It
seems to be a relatively common error for system integrators and
administrators to enable KASLR in their configuration but not provide
the seed at runtime, often due to seed provisioning breaking at some
later point after it is initially enabled and verified.

Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-08 17:36:48 +00:00
Marc Zyngier cd7056ae34 Merge remote-tracking branch 'kvmarm/misc-5.5' into kvmarm/next 2019-11-08 11:27:29 +00:00
Marc Zyngier ef2e78ddad KVM: arm64: Opportunistically turn off WFI trapping when using direct LPI injection
Just like we do for WFE trapping, it can be useful to turn off
WFI trapping when the physical CPU is not oversubscribed (that
is, the vcpu is the only runnable process on this CPU) *and*
that we're using direct injection of interrupts.

The conditions are reevaluated on each vcpu_load(), ensuring that
we don't switch to this mode on a busy system.

On a GICv4 system, this has the effect of reducing the generation
of doorbell interrupts to zero when the right conditions are
met, which is a huge improvement over the current situation
(where the doorbells are screaming if the CPU ever hits a
blocking WFI).

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Link: https://lore.kernel.org/r/20191107160412.30301-3-maz@kernel.org
2019-11-08 11:14:36 +00:00
Catalin Marinas 51effa6d11 Merge branch 'for-next/perf' into for-next/core
- Support for additional PMU topologies on HiSilicon platforms
- Support for CCN-512 interconnect PMU
- Support for AXI ID filtering in the IMX8 DDR PMU
- Support for the CCPI2 uncore PMU in ThunderX2
- Driver cleanup to use devm_platform_ioremap_resource()

* for-next/perf:
  drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform
  perf/imx_ddr: Dump AXI ID filter info to userspace
  docs/perf: Add AXI ID filter capabilities information
  perf/imx_ddr: Add driver for DDR PMU in i.MX8MPlus
  perf/imx_ddr: Add enhanced AXI ID filter support
  bindings: perf: imx-ddr: Add new compatible string
  docs/perf: Add explanation for DDR_CAP_AXI_ID_FILTER_ENHANCED quirk
  arm64: perf: Simplify the ARMv8 PMUv3 event attributes
  drivers/perf: Add CCPI2 PMU support in ThunderX2 UNCORE driver.
  Documentation: perf: Update documentation for ThunderX2 PMU uncore driver
  Documentation: Add documentation for CCN-512 DTS binding
  perf: arm-ccn: Enable stats for CCN-512 interconnect
  perf/smmuv3: use devm_platform_ioremap_resource() to simplify code
  perf/arm-cci: use devm_platform_ioremap_resource() to simplify code
  perf/arm-ccn: use devm_platform_ioremap_resource() to simplify code
  perf: xgene: use devm_platform_ioremap_resource() to simplify code
  perf: hisi: use devm_platform_ioremap_resource() to simplify code
2019-11-08 10:57:14 +00:00
Roger Quadros 49e19745e4 arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
Add USB0 as otg port and USB1 as host port.

Although USB0 can be used at super-speed, limit the
speed to high-speed for now till SERDES PHY support
is added.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-11-08 11:41:54 +02:00
Roger Quadros 451555c80b arm64: dts: ti: k3-j721e-main: add USB controller nodes
J721e has 2 USB super-speed controllers add them.

The USB2 PHY doesn't need any configuration.
USB3 PHY needs to be implemented using the Cadence
Sierra PHY. This support will be added later.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-11-08 11:41:54 +02:00
Dan Williams 16993c0f0a arm/efi: EFI soft reservation to memblock
UEFI 2.8 defines an EFI_MEMORY_SP attribute bit to augment the
interpretation of the EFI Memory Types as "reserved for a specific
purpose".

The proposed Linux behavior for specific purpose memory is that it is
reserved for direct-access (device-dax) by default and not available for
any kernel usage, not even as an OOM fallback.  Later, through udev
scripts or another init mechanism, these device-dax claimed ranges can
be reconfigured and hot-added to the available System-RAM with a unique
node identifier. This device-dax management scheme implements "soft" in
the "soft reserved" designation by allowing some or all of the
reservation to be recovered as typical memory. This policy can be
disabled at compile-time with CONFIG_EFI_SOFT_RESERVE=n, or runtime with
efi=nosoftreserve.

For this patch, update the ARM paths that consider
EFI_CONVENTIONAL_MEMORY to optionally take the EFI_MEMORY_SP attribute
into account as a reservation indicator. Publish the soft reservation as
IORES_DESC_SOFT_RESERVED memory, similar to x86.

(Based on an original patch by Ard)

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-11-07 15:44:19 +01:00
Catalin Marinas c1c9ea6371 Merge branch 'arm64/ftrace-with-regs' of git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux into for-next/core
FTRACE_WITH_REGS support for arm64.

* 'arm64/ftrace-with-regs' of git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux:
  arm64: ftrace: minimize ifdeffery
  arm64: implement ftrace with regs
  arm64: asm-offsets: add S_FP
  arm64: insn: add encoder for MOV (register)
  arm64: module/ftrace: intialize PLT at load time
  arm64: module: rework special section handling
  module/ftrace: handle patchable-function-entry
  ftrace: add ftrace_init_nop()
2019-11-07 11:26:54 +00:00
Nicolas Saenz Julienne bff3b04460 arm64: mm: reserve CMA and crashkernel in ZONE_DMA32
With the introduction of ZONE_DMA in arm64 we moved the default CMA and
crashkernel reservation into that area. This caused a regression on big
machines that need big CMA and crashkernel reservations. Note that
ZONE_DMA is only 1GB big.

Restore the previous behavior as the wide majority of devices are OK
with reserving these in ZONE_DMA32. The ones that need them in ZONE_DMA
will configure it explicitly.

Fixes: 1a8e1cef76 ("arm64: use both ZONE_DMA and ZONE_DMA32")
Reported-by: Qian Cai <cai@lca.pw>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-07 11:22:20 +00:00
Quentin Perret 48da6f8005 arm64: defconfig: Enable CONFIG_ENERGY_MODEL
The recently introduced Energy Model (EM) framework manages power cost
tables for the CPUs of the system. Its only user right now is the
scheduler, in the context of Energy Aware Scheduling (EAS).

However, the EM framework also offers a generic infrastructure that
could replace subsystem-specific implementations of the same concepts,
as this is the case in the thermal framework.

So, in order to prepare the migration of the thermal subsystem to use
the EM framework, enable it in the default arm64 defconfig, which is the
most commonly used architecture for IPA. This will also compile-in all
of the EAS code, although it won't be enabled by default -- EAS requires
to use the 'schedutil' CPUFreq governor while arm64 defaults to
'performance'.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Quentin Perret <qperret@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20191030151451.7961-2-qperret@google.com
2019-11-07 07:02:40 +01:00
Olof Johansson 1d16a9172c Qualcomm ARM64 Updates for v5.5
* Add thermal IRQ support on MSM8916, SDM845, MSM8996, and QCS404
 * Fix thermal HW ids for cpus on MSM8916
 * Add blsp1 UART3 and  blsp1 BAM on MSM8998
 * Add volume buttons and WCNSS for Wifi and BT on MSM8916 LongCheer-l8150
 * Fixup load on l21 for SD on apq8096-db820c
 * Enable LVS1/2, APSS watchdog, and select UFS reset gpio for SDM845
 * Disable coresight by default on MSM8998
 * Enable bluetooth and remove retention idle state on MSM8998-clamshell
 * Enable adsp, cdsp, and mpss on C630
 * Enable bluetooth on MSM8998-mtp
 * Delete zap shader on SDM845-cheza
 * Add tactile buttons and hall sensor on MSM8916-Samsung-A2015
 * Add Interconnect nodes, watchdog, and sleep clk on QCS404
 * Override Iris compatible on MSM8916-Samsung-A5U
 * Enable WCNSS Wifi and bluetooth on MSM8916-Samsung-A2015
 * Fixup cooling states for the aoss warming devices
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Merge tag 'qcom-arm64-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 Updates for v5.5

* Add thermal IRQ support on MSM8916, SDM845, MSM8996, and QCS404
* Fix thermal HW ids for cpus on MSM8916
* Add blsp1 UART3 and  blsp1 BAM on MSM8998
* Add volume buttons and WCNSS for Wifi and BT on MSM8916 LongCheer-l8150
* Fixup load on l21 for SD on apq8096-db820c
* Enable LVS1/2, APSS watchdog, and select UFS reset gpio for SDM845
* Disable coresight by default on MSM8998
* Enable bluetooth and remove retention idle state on MSM8998-clamshell
* Enable adsp, cdsp, and mpss on C630
* Enable bluetooth on MSM8998-mtp
* Delete zap shader on SDM845-cheza
* Add tactile buttons and hall sensor on MSM8916-Samsung-A2015
* Add Interconnect nodes, watchdog, and sleep clk on QCS404
* Override Iris compatible on MSM8916-Samsung-A5U
* Enable WCNSS Wifi and bluetooth on MSM8916-Samsung-A2015
* Fixup cooling states for the aoss warming devices

* tag 'qcom-arm64-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (26 commits)
  arm64: dts: qcom: db845c: Enable LVS 1 and 2
  arm64: dts: qcom: msm8998: Disable coresight by default
  arm64: dts: qcom: msm8998-clamshell: Remove retention idle state
  arm64: dts: qcom: sdm845-cheza: delete zap-shader
  arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors
  arm64: dts: sdm845: thermal: Add interrupt support
  arm64: dts: msm8996: thermal: Add interrupt support
  arm64: dts: msm8998: thermal: Add interrupt support
  arm64: dts: qcs404: thermal: Add interrupt support
  arm64: dts: qcom: sdm845: Add APSS watchdog node
  arm64: dts: qcom: c630: Enable adsp, cdsp and mpss
  arm64: dts: qcom: msm8998-clamshell: Enable bluetooth
  arm64: dts: qcom: msm8998-mtp: Enable bluetooth
  arm64: dts: qcom: msm8998: Add blsp1_uart3
  arm64: dts: qcom: msm8998: Add blsp1 BAM
  arm64: dts: msm8916-longcheer-l8150: Add Volume buttons
  arm64: dts: msm8916-longcheer-l8150: Enable WCNSS for WiFi and BT
  soc: qcom: Invert the cooling states for the aoss warming devices
  arm64: dts: apq8096-db820c: Increase load on l21 for SDCARD
  arm64: dts: msm8916-samsung-a2015: add tactile buttons and hall sensor
  ...

Link: https://lore.kernel.org/r/1573068840-13098-2-git-send-email-agross@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 14:05:01 -08:00
Neil Armstrong 87297878b5 arm64: dts: meson-gx: fix i2c compatible
This fixes the following DT schemas check errors:
meson-gxbb-nanopi-k2.dt.yaml: i2c@8500: compatible: Additional items are not allowed ('amlogic,meson-gxbb-i2c' was unexpected)
meson-gxbb-nanopi-k2.dt.yaml: i2c@8500: compatible:0: 'amlogic,meson-gx-i2c' is not one of ['amlogic,meson6-i2c', 'amlogic,meson-gxbb-i2c', 'amlogic,meson-axg-i2c']
meson-gxbb-nanopi-k2.dt.yaml: i2c@8500: compatible: ['amlogic,meson-gx-i2c', 'amlogic,meson-gxbb-i2c'] is too long

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:36:29 -08:00
Neil Armstrong b485a6a4e8 arm64: dts: meson-gx: cec node should be disabled by default
This fixes the following DT schemas check errors:
meson-gxl-s905x-hwacom-amazetv.dt.yaml: cec@100: 'hdmi-phandle' is a required property
meson-gxm-rbox-pro.dt.yaml: cec@100: 'hdmi-phandle' is a required property

because CEC is not enabled on these boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:36:29 -08:00
Neil Armstrong 409a0daa72 arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
This fixes the following DT schemas check errors:
meson-g12b-odroid-n2.dt.yaml: /: compatible: ['hardkernel,odroid-n2', 'amlogic,g12b'] is not valid under any of the given schemas

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:36:29 -08:00
Neil Armstrong 69fb3f21f8 arm64: dts: meson-gxm: fix gpu irq order
This fixes the following DT schemas check errors:
meson-gxm-khadas-vim2.dt.yaml: gpu@c0000: interrupt-names:0: 'job' was expected
meson-gxm-khadas-vim2.dt.yaml: gpu@c0000: interrupt-names:2: 'gpu' was expected

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:36:29 -08:00
Neil Armstrong 711f9cb1f1 arm64: dts: meson-g12a: fix gpu irq order
This fixes the following DT schemas check errors:
meson-g12b-s922x-khadas-vim3.dt.yaml: gpu@ffe40000: interrupt-names:0: 'job' was expected
meson-g12b-s922x-khadas-vim3.dt.yaml: gpu@ffe40000: interrupt-names:2: 'gpu' was expected

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-11-06 11:36:28 -08:00
Catalin Marinas 6767df245f arm64: Do not mask out PTE_RDONLY in pte_same()
Following commit 73e86cb03c ("arm64: Move PTE_RDONLY bit handling out
of set_pte_at()"), the PTE_RDONLY bit is no longer managed by
set_pte_at() but built into the PAGE_* attribute definitions.
Consequently, pte_same() must include this bit when checking two PTEs
for equality.

Remove the arm64-specific pte_same() function, practically reverting
commit 747a70e60b ("arm64: Fix copy-on-write referencing in HugeTLB")

Fixes: 73e86cb03c ("arm64: Move PTE_RDONLY bit handling out of set_pte_at()")
Cc: <stable@vger.kernel.org> # 4.14.x-
Cc: Will Deacon <will@kernel.org>
Cc: Steve Capper <steve.capper@arm.com>
Reported-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-11-06 19:31:56 +00:00
Olof Johansson 1f0753ea6a i.MX defconfig update for 5.5:
- Enable i.MX7ULP watchdog, DA9052 touch and USB configfs support
    in imx_v6_v7_defconfig.
  - Enable newly added S32V234 SoC and its UART driver support in arm64
    defconfig.
  - Built i.MX8QXP SCU key driver as module in arm64 defconfig.
  - Change AT803X Ethernet PHY driver from module to built-in, so that
    we can boot i.MX8MM EVK board with rootfs on NFS.
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Merge tag 'imx-defconfig-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig update for 5.5:
 - Enable i.MX7ULP watchdog, DA9052 touch and USB configfs support
   in imx_v6_v7_defconfig.
 - Enable newly added S32V234 SoC and its UART driver support in arm64
   defconfig.
 - Built i.MX8QXP SCU key driver as module in arm64 defconfig.
 - Change AT803X Ethernet PHY driver from module to built-in, so that
   we can boot i.MX8MM EVK board with rootfs on NFS.

* tag 'imx-defconfig-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: defconfig: Change CONFIG_AT803X_PHY from m to y
  ARM: imx_v6_v7_defconfig: Enable CONFIG_TOUCHSCREEN_DA9052
  arm64: defconfig: Enable configs for S32V234
  arm64: defconfig: Enable CONFIG_KEYBOARD_IMX_SC_KEY as module
  ARM: imx_v6_v7_defconfig: Build USB_CONFIGFS into kernel
  ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX7ULP_WDT by default

Link: https://lore.kernel.org/r/20191105150315.15477-7-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:49:01 -08:00
Olof Johansson 17795bf9aa LX2160A TMU support for 5.5:
- Add TMU (Thermal Monitoring Unit) device node to enable thermal
    support on LX2160A SoC.
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Merge tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

LX2160A TMU support for 5.5:
 - Add TMU (Thermal Monitoring Unit) device node to enable thermal
   support on LX2160A SoC.

* tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: lx2160a: add tmu device node
  ARM: imx_v6_v7_defconfig: Enable CONFIG_DRM_MSM
  arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mm: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mq: Use correct clock for usdhc's ipg clk
  ARM: dts: imx7s: Correct GPT's ipg clock source
  ARM: dts: vf610-zii-scu4-aib: Specify 'i2c-mux-idle-disconnect'
  ARM: dts: imx6q-logicpd: Re-Enable SNVS power key
  arm64: dts: lx2160a: Correct CPU core idle state name
  arm64: dts: zii-ultra: fix ARM regulator states
  soc: imx: imx-scu: Getting UID from SCU should have response

Link: https://lore.kernel.org/r/20191105150315.15477-6-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:48:37 -08:00
Olof Johansson 06e78df33d i.MX arm64 device tree changes for 5.5:
- Add the initial support for a new arm64 family SoC from NXP:
    S32V234 ("Treerunner") vision microprocessors which are targeted for
    high-performance, computationally intensive vision and sensor fusion
    applications that require automotive safety levels.
  - New board support: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri and
    S32V234 EVB.
  - A series of patch from Andrey Smirnov to improve zii-ultra support by
    fixing regulator and adding accelerometer, switch watchdog.
  - Add system counter device and enable cpuidle support for i.MX8MN.
  - Move usdhc clocks assignment from SoC to board level DTS for
    i.MX8 based boards.
  - Add PCA6416 on I2C3 bus for imx8mm-evk, and enable SCU key for
    imx8qxp-mek board.
  - Enable GPU passive throttling on i.MX8MQ SoC, and add DDR PMU device
    for i.MX8MN.
  - A series from Fabio Estevam to fix DTC W=1 warnings for LS1028A device.
  - Update the clock providers for the Mali DP500 and '#clock-cells' of
    DPCLK node for LS1028A SoC.
  - Misc small updates on various boards.
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Merge tag 'imx-dt64-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree changes for 5.5:
 - Add the initial support for a new arm64 family SoC from NXP:
   S32V234 ("Treerunner") vision microprocessors which are targeted for
   high-performance, computationally intensive vision and sensor fusion
   applications that require automotive safety levels.
 - New board support: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri and
   S32V234 EVB.
 - A series of patch from Andrey Smirnov to improve zii-ultra support by
   fixing regulator and adding accelerometer, switch watchdog.
 - Add system counter device and enable cpuidle support for i.MX8MN.
 - Move usdhc clocks assignment from SoC to board level DTS for
   i.MX8 based boards.
 - Add PCA6416 on I2C3 bus for imx8mm-evk, and enable SCU key for
   imx8qxp-mek board.
 - Enable GPU passive throttling on i.MX8MQ SoC, and add DDR PMU device
   for i.MX8MN.
 - A series from Fabio Estevam to fix DTC W=1 warnings for LS1028A device.
 - Update the clock providers for the Mali DP500 and '#clock-cells' of
   DPCLK node for LS1028A SoC.
 - Misc small updates on various boards.

* tag 'imx-dt64-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits)
  arm64: dts: imx8mn-evk: Remove invalid Atheros properties
  arm64: dts: freescale: add initial support for colibri imx8x
  arm64: dts: ls1028a: Fix tmu unit address
  arm64: dts: ls1028a: Move thermal-zone out of SoC
  arm64: dts: ls1028a-qds: Remove unnecessary #address-cells/#size-cells
  arm64: dts: imx8mn: Remove duplicated machine compatible
  arm64: dts: imx8mm: Remove duplicated machine compatible
  arm64: dts: imx8mq-evk: Add remote control
  arm64: dts: imx8mn: Add LPDDR4 EVK board support
  arm64: dts: imx8mn: Create EVK dtsi file for common use
  arm64: dts: imx8mn: Move usdhc clocks assignment to board DT
  arm64: dts: imx8mm: Move usdhc clocks assignment to board DT
  arm64: dts: imx8mq: Move usdhc clocks assignment to board DT
  arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT
  arm64: dts: fsl: Add device tree for S32V234-EVB
  arm64: dts: imx8mm-evk: Assigned clocks for audio plls
  arm64: dts: zii-ultra: Add node for switch watchdog
  arm64: dts: zii-ultra: Add node for accelerometer
  arm64: dts: zii-ultra: Fix regulator-3p3-main's name
  arm64: dts: zii-ultra: Fix regulator-vsd-3v3's vin-supply
  ...

Link: https://lore.kernel.org/r/20191105150315.15477-5-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:47:57 -08:00
Olof Johansson 0f3dac6110 i.MX SoC update for 5.5:
- Add arm64 Kconfig option for the NXP S32 platform.
  - Drop imx_anatop_usb_chrg_detect_disable() function which becomes
    unneeded, since all the necessary charger setup is done by the USB
    PHY driver now.
  - Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC
    unique ID from OCOTP block.
  - Replace i.MX machine specific coherency exit implementation using
    the generic v7_exit_coherency_flush() function.
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Merge tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC update for 5.5:
 - Add arm64 Kconfig option for the NXP S32 platform.
 - Drop imx_anatop_usb_chrg_detect_disable() function which becomes
   unneeded, since all the necessary charger setup is done by the USB
   PHY driver now.
 - Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC
   unique ID from OCOTP block.
 - Replace i.MX machine specific coherency exit implementation using
   the generic v7_exit_coherency_flush() function.

* tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: use generic function to exit coherency
  ARM: imx: Add serial number support for i.MX6/7 SoCs
  ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
  arm64: Introduce config for S32

Link: https://lore.kernel.org/r/20191105150315.15477-2-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:46:42 -08:00
Olof Johansson ea21768a8a A few more DT patches for 5.5, mostly:
- USB3 support for the H6
   - Deinterlacer support for the H3
   - eDP Bridge support on the Teres-I
   - More DT cleanups thanks to the validation
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Merge tag 'sunxi-dt-for-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

A few more DT patches for 5.5, mostly:
  - USB3 support for the H6
  - Deinterlacer support for the H3
  - eDP Bridge support on the Teres-I
  - More DT cleanups thanks to the validation

* tag 'sunxi-dt-for-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h6: Remove useless reset name
  ARM: dts: sun6i: Remove useless reset-names
  arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support
  arm64: dts: allwinner: h6: add USB3 device nodes
  dt-bindings: Add ANX6345 DP/eDP transmitter binding
  arm64: dts: allwinner: a64: enable ANX6345 bridge on Teres-I
  dts: arm: sun8i: h3: Enable deinterlace unit
  ARM: dts: sunxi: h3/h5: Add MBUS controller node
  dt-bindings: bus: sunxi: Add H3 MBUS compatible

Link: https://lore.kernel.org/r/58ad00a8-9579-4811-969a-a74e331ee9a2.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:42:04 -08:00
Olof Johansson f129230b8c One patch to add back the PMU node that was removed because the
interrupts were improper in a previous fixes PR.
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Merge tag 'sunxi-fixes-for-5.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

One patch to add back the PMU node that was removed because the
interrupts were improper in a previous fixes PR.

* tag 'sunxi-fixes-for-5.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: a64: Re-add PMU node
  ARM: sunxi: Fix CPU powerdown on A83T
  ARM: dts: sun8i-a83t-tbs-a711: Fix WiFi resume from suspend
  ARM: dts: sun7i: Drop the module clock from the device tree
  dt-bindings: media: sun4i-csi: Drop the module clock
  media: dt-bindings: Fix building error for dt_binding_check
  arm64: dts: allwinner: a64: sopine-baseboard: Add PHY regulator delay
  arm64: dts: allwinner: a64: Drop PMU node
  arm64: dts: allwinner: a64: pine64-plus: Add PHY regulator delay

Link: https://lore.kernel.org/r/45023fa6-b2bc-4934-b85c-3e7841dde0b1.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:41:31 -08:00
Mark Rutland 7f08ae53a7 arm64: ftrace: minimize ifdeffery
Now that we no longer refer to mod->arch.ftrace_trampolines in the body
of ftrace_make_call(), we can use IS_ENABLED() rather than ifdeffery,
and make the code easier to follow. Likewise in ftrace_make_nop().

Let's do so.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:36 +00:00
Torsten Duwe 3b23e4991f arm64: implement ftrace with regs
This patch implements FTRACE_WITH_REGS for arm64, which allows a traced
function's arguments (and some other registers) to be captured into a
struct pt_regs, allowing these to be inspected and/or modified. This is
a building block for live-patching, where a function's arguments may be
forwarded to another function. This is also necessary to enable ftrace
and in-kernel pointer authentication at the same time, as it allows the
LR value to be captured and adjusted prior to signing.

Using GCC's -fpatchable-function-entry=N option, we can have the
compiler insert a configurable number of NOPs between the function entry
point and the usual prologue. This also ensures functions are AAPCS
compliant (e.g. disabling inter-procedural register allocation).

For example, with -fpatchable-function-entry=2, GCC 8.1.0 compiles the
following:

| unsigned long bar(void);
|
| unsigned long foo(void)
| {
|         return bar() + 1;
| }

... to:

| <foo>:
|         nop
|         nop
|         stp     x29, x30, [sp, #-16]!
|         mov     x29, sp
|         bl      0 <bar>
|         add     x0, x0, #0x1
|         ldp     x29, x30, [sp], #16
|         ret

This patch builds the kernel with -fpatchable-function-entry=2,
prefixing each function with two NOPs. To trace a function, we replace
these NOPs with a sequence that saves the LR into a GPR, then calls an
ftrace entry assembly function which saves this and other relevant
registers:

| mov	x9, x30
| bl	<ftrace-entry>

Since patchable functions are AAPCS compliant (and the kernel does not
use x18 as a platform register), x9-x18 can be safely clobbered in the
patched sequence and the ftrace entry code.

There are now two ftrace entry functions, ftrace_regs_entry (which saves
all GPRs), and ftrace_entry (which saves the bare minimum). A PLT is
allocated for each within modules.

Signed-off-by: Torsten Duwe <duwe@suse.de>
[Mark: rework asm, comments, PLTs, initialization, commit message]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Julien Thierry <jthierry@redhat.com>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:35 +00:00
Mark Rutland 1f377e043b arm64: asm-offsets: add S_FP
So that assembly code can more easily manipulate the FP (x29) within a
pt_regs, add an S_FP asm-offsets definition.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:34 +00:00
Mark Rutland e3bf8a67f7 arm64: insn: add encoder for MOV (register)
For FTRACE_WITH_REGS, we're going to want to generate a MOV (register)
instruction as part of the callsite intialization. As MOV (register) is
an alias for ORR (shifted register), we can generate this with
aarch64_insn_gen_logical_shifted_reg(), but it's somewhat verbose and
difficult to read in-context.

Add a aarch64_insn_gen_move_reg() wrapper for this case so that we can
write callers in a more straightforward way.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:33 +00:00
Mark Rutland f1a54ae9af arm64: module/ftrace: intialize PLT at load time
Currently we lazily-initialize a module's ftrace PLT at runtime when we
install the first ftrace call. To do so we have to apply a number of
sanity checks, transiently mark the module text as RW, and perform an
IPI as part of handling Neoverse-N1 erratum #1542419.

We only expect the ftrace trampoline to point at ftrace_caller() (AKA
FTRACE_ADDR), so let's simplify all of this by intializing the PLT at
module load time, before the module loader marks the module RO and
performs the intial I-cache maintenance for the module.

Thus we can rely on the module having been correctly intialized, and can
simplify the runtime work necessary to install an ftrace call in a
module. This will also allow for the removal of module_disable_ro().

Tested by forcing ftrace_make_call() to use the module PLT, and then
loading up a module after setting up ftrace with:

| echo ":mod:<module-name>" > set_ftrace_filter;
| echo function > current_tracer;
| modprobe <module-name>

Since FTRACE_ADDR is only defined when CONFIG_DYNAMIC_FTRACE is
selected, we wrap its use along with most of module_init_ftrace_plt()
with ifdeffery rather than using IS_ENABLED().

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:32 +00:00
Mark Rutland bd8b21d3dd arm64: module: rework special section handling
When we load a module, we have to perform some special work for a couple
of named sections. To do this, we iterate over all of the module's
sections, and perform work for each section we recognize.

To make it easier to handle the unexpected absence of a section, and to
make the section-specific logic easer to read, let's factor the section
search into a helper. Similar is already done in the core module loader,
and other architectures (and ideally we'd unify these in future).

If we expect a module to have an ftrace trampoline section, but it
doesn't have one, we'll now reject loading the module. When
ARM64_MODULE_PLTS is selected, any correctly built module should have
one (and this is assumed by arm64's ftrace PLT code) and the absence of
such a section implies something has gone wrong at build time.

Subsequent patches will make use of the new helper.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Tested-by: Torsten Duwe <duwe@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
2019-11-06 14:17:31 +00:00
Andre Przywara 6b832a1487
arm64: dts: allwinner: a64: Re-add PMU node
As it was found recently, the Performance Monitoring Unit (PMU) on the
Allwinner A64 SoC was not generating (the right) interrupts. With the
SPI numbers from the manual the kernel did not receive any overflow
interrupts, so perf was not happy at all.
It turns out that the numbers were just off by 4, so the PMU interrupts
are from 148 to 151, not from 152 to 155 as the manual describes.

This was found by playing around with U-Boot, which typically does not
use interrupts, so the GIC is fully available for experimentation:
With *every* PPI and SPI enabled, an overflowing PMU cycle counter was
found to set a bit in one of the GICD_ISPENDR registers, with careful
counting this was determined to be number 148.

Tested with perf record and perf top on a Pine64-LTS. Also tested with
tasksetting to every core to confirm the assignment between IRQs and
cores.

This somewhat "revert-fixes" commit ed3e9406bc ("arm64: dts: allwinner:
a64: Drop PMU node").

Fixes: 34a97fcc71 ("arm64: dts: allwinner: a64: Add PMU node")
Fixes: ed3e9406bc ("arm64: dts: allwinner: a64: Drop PMU node")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-06 13:07:30 +01:00
Rich Wiley 918e1946c8 arm64: kpti: Add NVIDIA's Carmel core to the KPTI whitelist
NVIDIA Carmel CPUs don't implement ID_AA64PFR0_EL1.CSV3 but
aren't susceptible to Meltdown, so add Carmel to kpti_safe_list[].

Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-06 11:31:03 +00:00
Bhupesh Sharma 218564b164 arm64: mm: Remove MAX_USER_VA_BITS definition
commit 9b31cf493f ("arm64: mm: Introduce MAX_USER_VA_BITS definition")
introduced the MAX_USER_VA_BITS definition, which was used to support
the arm64 mm use-cases where the user-space could use 52-bit virtual
addresses whereas the kernel-space would still could a maximum of 48-bit
virtual addressing.

But, now with commit b6d00d47e8 ("arm64: mm: Introduce 52-bit Kernel
VAs"), we removed the 52-bit user/48-bit kernel kconfig option and hence
there is no longer any scenario where user VA != kernel VA size
(even with CONFIG_ARM64_FORCE_52BIT enabled, the same is true).

Hence we can do away with the MAX_USER_VA_BITS macro as it is equal to
VA_BITS (maximum VA space size) in all possible use-cases. Note that
even though the 'vabits_actual' value would be 48 for arm64 hardware
which don't support LVA-8.2 extension (even when CONFIG_ARM64_VA_BITS_52
is enabled), VA_BITS would still be set to a value 52. Hence this change
would be safe in all possible VA address space combinations.

Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Steve Capper <steve.capper@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: linux-kernel@vger.kernel.org
Cc: kexec@lists.infradead.org
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Bhupesh Sharma <bhsharma@redhat.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-06 11:19:25 +00:00
Masahiro Yamada 32d1870877 arm64: mm: simplify the page end calculation in __create_pgd_mapping()
Calculate the page-aligned end address more simply.

The local variable, "length" is unneeded.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-11-06 11:17:09 +00:00
Andy Yan 4403e1237b arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc
ROC-RK3308-CC is a rk3308 based board designed by Firelfy,
with eMMC and 256MB DDR3 and RTL8188 Wifi on board.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20191030072811.29882-1-andy.yan@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-05 20:44:43 +01:00
Markus Reichl f00736e38e arm64: dts: rockchip: Rework voltage supplies for regulators on rk3399-roc-pc
Correct the voltage supplies according to the board schematics
ROC-3399-PC-V10-A-20180804.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/22b56700-3c9e-0f60-cd74-7ff24d4f1a23@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-05 20:44:43 +01:00
Markus Reichl 88e0b7822d arm64: dts: rockchip: Add vcc_sys enable pin on rk3399-roc-pc
rk3399-roc-pc has vcc_sys 5V supply for USB and other peripherals.
Add the GPIO pin to enable the regulator.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/c72db0ad-c261-af4f-efe6-22bbcf4a0b7b@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-05 20:44:43 +01:00
Markus Reichl 389989270e arm64: dts: rockchip: Add nodes for buttons on rk3399-roc-pc
rk3399-roc-pc has a power and a recovery button, enable them.

Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/1ce152cc-bd6b-63af-7892-221e084d087f@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-11-05 20:44:43 +01:00
Heiko Stuebner 0815dc22c2 arm64: dts: rockchip: enable usb2phy on px30-evb
Enable the phy node ion the px30 evb board.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20190917082659.25549-13-heiko@sntech.de
2019-11-05 20:44:43 +01:00
Heiko Stuebner f952b45bf3 arm64: dts: rockchip: add usb2phy for px30
Add the usb2phy node on the px30 and hook it up to the usb controllers
it supplies.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20190917082659.25549-12-heiko@sntech.de
2019-11-05 20:44:43 +01:00
Heiko Stuebner 7272d6e03d arm64: dts: rockchip: remove px30 default optee node
Having a default optee node in a soc devicetree is not really good.
For one there is no guarantee that any tee got loaded and there's even
the possibility that a completely different TEE got loaded.

OP-Tee however will insert relevant nodes to the devicetree (firmware
+reserved memory sections) during its own startup, so there really is
no need to provide a default node.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20191023224409.3550-1-heiko@sntech.de
2019-11-05 20:44:38 +01:00
Heiko Stuebner 2e7f8764dc arm64: dts: rockchip: enable gpu on rk3399-puma
Set the supplying regulator and enable the gpu node on the rk3399-puma som.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20191023223954.3139-1-heiko@sntech.de
2019-11-05 20:44:35 +01:00
Heiko Stuebner fbb78418c8 arm64: dts: rockchip: add px30 otp controller
The px30 soc contains a controller for one-time-programmable memory,
so add the necessary node for it and the fields defined in it by default.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20191023224113.3268-1-heiko@sntech.de
2019-11-05 20:44:31 +01:00
Maxime Ripard 74ab6d9d7d
arm64: dts: allwinner: h6: Remove useless reset name
The TCON TOP node in the H6 DTSI has a reset name that isn't described in
the binding. Remove it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-05 13:12:12 +01:00
Ondrej Jirman b5d84ff8ae
arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support
Enable Allwinner's USB 3.0 phy and the host controller. Orange Pi 3
board has GL3510 USB 3.0 4-port hub connected to the SoC's USB 3.0
port. All four ports are exposed via USB3-A connectors. VBUS is
always on, since it's powered directly from DCIN (VCC-5V) and
not switchable.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-05 11:44:45 +01:00
Icenowy Zheng 0b6f7014ad
arm64: dts: allwinner: h6: add USB3 device nodes
Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and
a custom PHY.

Add device tree nodes for them.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-05 11:44:42 +01:00
Torsten Duwe 79bc02f122
arm64: dts: allwinner: a64: enable ANX6345 bridge on Teres-I
Teres-I has an anx6345 bridge connected to the RGB666 LCD output, and
the I2C controlling signals are connected to I2C0 bus.

Enable it in the device tree, and enable the display engine, video mixer
and tcon0 as well.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Torsten Duwe <duwe@suse.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-05 11:36:12 +01:00
Huacai Chen 52338415cf timekeeping/vsyscall: Update VDSO data unconditionally
The update of the VDSO data is depending on __arch_use_vsyscall() returning
True. This is a leftover from the attempt to map the features of various
architectures 1:1 into generic code.

The usage of __arch_use_vsyscall() in the actual vsyscall implementations
got dropped and replaced by the requirement for the architecture code to
return U64_MAX if the global clocksource is not usable in the VDSO.

But the __arch_use_vsyscall() check in the update code stayed which causes
the VDSO data to be stale or invalid when an architecture actually
implements that function and returns False when the current clocksource is
not usable in the VDSO.

As a consequence the VDSO implementations of clock_getres(), time(),
clock_gettime(CLOCK_.*_COARSE) operate on invalid data and return bogus
information.

Remove the __arch_use_vsyscall() check from the VDSO update function and
update the VDSO data unconditionally.

[ tglx: Massaged changelog and removed the now useless implementations in
  	asm-generic/ARM64/MIPS ]

Fixes: 44f57d788e ("timekeeping: Provide a generic update_vsyscall() implementation")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1571887709-11447-1-git-send-email-chenhc@lemote.com
2019-11-04 23:02:53 +01:00
Olof Johansson 3a82cd4484 i.MX fixes for 5.4, 3rd round:
- Fix the GPIO number that is controlling core voltage on
    imx8mq-zii-ultra board.
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Merge tag 'imx-fixes-5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.4, 3rd round:
 - Fix the GPIO number that is controlling core voltage on
   imx8mq-zii-ultra board.

* tag 'imx-fixes-5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: zii-ultra: fix ARM regulator GPIO handle

Link: https://lore.kernel.org/r/20191104084513.GW24620@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-04 10:06:41 -08:00
Kees Cook 19f6bc32c6 arm64: Move EXCEPTION_TABLE to RO_DATA segment
Since the EXCEPTION_TABLE is read-only, collapse it into RO_DATA. Also
removes the redundant ALIGN, which is already present at the end of the
RO_DATA macro.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Will Deacon <will@kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux-alpha@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-c6x-dev@linux-c6x.org
Cc: linux-ia64@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s390@vger.kernel.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Peter Collingbourne <pcc@google.com>
Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
Cc: Segher Boessenkool <segher@kernel.crashing.org>
Cc: x86-ml <x86@kernel.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Link: https://lkml.kernel.org/r/20191029211351.13243-19-keescook@chromium.org
2019-11-04 18:02:35 +01:00
Kees Cook c9174047b4 vmlinux.lds.h: Replace RW_DATA_SECTION with RW_DATA
Rename RW_DATA_SECTION to RW_DATA. (Calling this a "section" is a lie,
since it's multiple sections and section flags cannot be applied to
the macro.)

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> # s390
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> # m68k
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: linux-alpha@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-c6x-dev@linux-c6x.org
Cc: linux-ia64@vger.kernel.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
Cc: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Will Deacon <will@kernel.org>
Cc: x86-ml <x86@kernel.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Link: https://lkml.kernel.org/r/20191029211351.13243-14-keescook@chromium.org
2019-11-04 15:57:41 +01:00
Kees Cook eaf937075c vmlinux.lds.h: Move NOTES into RO_DATA
The .notes section should be non-executable read-only data. As such,
move it to the RO_DATA macro instead of being per-architecture defined.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> # s390
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: linux-alpha@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-c6x-dev@linux-c6x.org
Cc: linux-ia64@vger.kernel.org
Cc: linux-s390@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
Cc: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Will Deacon <will@kernel.org>
Cc: x86-ml <x86@kernel.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Link: https://lkml.kernel.org/r/20191029211351.13243-11-keescook@chromium.org
2019-11-04 15:34:41 +01:00
Fabio Estevam 227125fe72 arm64: dts: imx8mn-evk: Remove invalid Atheros properties
None of these at803x properties are documented anywhere, so just
remove them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04 16:00:56 +08:00
Peng Fan c7cb7c96f3 arm64: defconfig: Change CONFIG_AT803X_PHY from m to y
With phy-reset-gpios are enabled for i.MX8MM-EVK board, phy
will be reset. Without CONFIG_AT803X_PHY as y, board will stop
booting in NFS DHCP, because phy is not ready. So mark
CONFIG_AT803X_PHY from m to y to make board boot when using nfs rootfs.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04 15:25:55 +08:00
Lucas Stach f852497c9a arm64: dts: zii-ultra: fix ARM regulator GPIO handle
The GPIO handle is referencing the wrong GPIO, so the voltage did not
actually change as intended. The pinmux is already correct, so just
correct the GPIO number.

Fixes: 4a13b3bec3 (arm64: dts: imx: add Zii Ultra board support)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04 15:12:23 +08:00
Bjorn Andersson 915603b106 arm64: dts: qcom: db845c: Enable LVS 1 and 2
vreg_lvs1a_1p8 and vreg_lvs2a_1p8 are both feeding pins in the low speed
connectors and should as such alway be on, so enable them.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-11-03 20:49:00 -08:00
Olof Johansson e315c7b3da mvebu dt64 for 5.5 (part 1)
- Add new Marvell CN9130 SoC support (CN9130 is made of one AP807 and
    one internal CP115, similar to the Armada 7K/8K using AP806 and
    CP110).
  - Reorganize EspressoBin device tree to add new variant of the boards
    (Armada 3270 based)
  - Add firmware node for turris Mox (Armada 3720 based)
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Merge tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.5 (part 1)

 - Add new Marvell CN9130 SoC support (CN9130 is made of one AP807 and
   one internal CP115, similar to the Armada 7K/8K using AP806 and
   CP110).
 - Reorganize EspressoBin device tree to add new variant of the boards
   (Armada 3270 based)
 - Add firmware node for turris Mox (Armada 3720 based)

* tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu: (23 commits)
  arm64: dts: armada-3720-turris-mox: add firmware node
  arm64: dts: marvell: add ESPRESSObin variants
  arm64: dts: marvell: Add support for Marvell CN9132-DB
  arm64: dts: marvell: Add support for Marvell CN9131-DB
  arm64: dts: marvell: Add support for Marvell CN9130-DB
  arm64: dts: marvell: Add support for Marvell CN9130 SoC support
  arm64: dts: marvell: Add support for CP115
  arm64: dts: marvell: Externalize PCIe macros from CP11x file
  arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
  arm64: dts: marvell: Prepare the introduction of CP115
  arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment
  arm64: dts: marvell: Add AP807-quad cache description
  arm64: dts: marvell: Add AP806-quad cache description
  arm64: dts: marvell: Add AP806-dual cache description
  arm64: dts: marvell: Add support for AP807/AP807-quad
  dt-bindings: marvell: Declare the CN913x SoC compatibles
  dt-bindings: marvell: Convert the SoC compatibles description to YAML
  arm64: dts: marvell: Move clocks to AP806 specific file
  arm64: dts: marvell: Prepare the introduction of AP807 based SoCs
  MAINTAINERS: Add new Marvell CN9130-based files to track
  ...

Link: https://lore.kernel.org/r/87zhhc3bo6.fsf@FE-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 17:32:26 -08:00
Olof Johansson fc711fdf06 arm64: tegra: Device tree changes for v5.5-rc1
Adds support for DP and XUSB on various boards, enables SMMU support for
 more devices and fixes a couple of DTC warnings and inconsistencies that
 are reported at runtime.
 
 These changes along with some of the driver changes in other branches
 allow suspend/resume support on Tegra210 devices (e.g. Jetson TX1 and
 Jetson Nano).
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Merge tag 'tegra-for-5.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.5-rc1

Adds support for DP and XUSB on various boards, enables SMMU support for
more devices and fixes a couple of DTC warnings and inconsistencies that
are reported at runtime.

These changes along with some of the driver changes in other branches
allow suspend/resume support on Tegra210 devices (e.g. Jetson TX1 and
Jetson Nano).

* tag 'tegra-for-5.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
  arm64: tegra: Add Jetson Nano SC7 timings
  arm64: tegra: Add Jetson TX1 SC7 timings
  arm64: tegra: Enable wake from deep sleep on RTC alarm
  arm64: tegra: Add PMU on Tegra210
  arm64: tegra: Add blank lines for better readability
  arm64: tegra: Enable DisplayPort on Jetson AGX Xavier
  arm64: tegra: p2888: Rename regulators for consistency
  arm64: tegra: Enable DP support on Jetson TX2
  arm64: tegra: Fix compatible for SOR1
  arm64: tegra: Enable DP support on Jetson Nano
  arm64: tegra: Add SOR0_OUT clock on Tegra210
  arm64: tegra: Assume no CLKREQ presence by default
  arm64: tegra: Enable SMMU for VIC on Tegra186
  arm64: tegra: Enable XUSB host controller on Jetson TX2
  arm64: tegra: Enable SMMU for XUSB host on Tegra186
  arm64: tegra: Enable XUSB pad controller on Jetson TX2
  arm64: tegra: Add ethernet alias on Jetson AGX Xavier
  arm64: tegra: Fix compatible string for EQOS on Tegra194
  arm64: tegra: Hook up edp interrupt on Tegra210 SOCTHERM
  arm64: tegra: Fix base address for SOR1 on Tegra194
  ...

Link: https://lore.kernel.org/r/20191102144521.3863321-8-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 17:31:22 -08:00
Marcel Ziswiler ba5a5615d5 arm64: dts: freescale: add initial support for colibri imx8x
This patch adds the device tree to support Toradex Colibri iMX8X a
computer on module which can be used on different carrier boards.

The module consists of an NXP i.MX 8X family SoC (either i.MX 8DualX or
8QuadXPlus), a PF8100 PMIC, a FastEthernet PHY, 1 or 2 GB of LPDDR4
RAM, some level shifters, a Micron eMMC, a USB hub, an AD7879 resistive
touch controller, an SGTL5000 audio codec and on-module CSI as well as
DSI-LVDS FFC receptacles plus an optional Bluetooth/Wi-Fi module.

Anything that is not self-contained on the module is disabled by
default.

The device tree for the Colibri Evaluation Board includes the module's
device tree and enables the supported peripherals of the carrier board
(the Colibri Evaluation Board supports almost all of them).

So far there is no display or USB functionality supported at all but
basic console UART, eMMC and Ethernet functionality work fine.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04 09:28:07 +08:00
Olof Johansson fcdc437224 One new patch to the arm64 defconfig to enable the new crypto engine
driver.
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Merge tag 'sunxi-config64-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig

One new patch to the arm64 defconfig to enable the new crypto engine
driver.

* tag 'sunxi-config64-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: defconfig: add new Allwinner crypto options

Link: https://lore.kernel.org/r/539241d6-9b2e-4d5b-bd63-f912cf6ebf96.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 17:08:26 -08:00
Olof Johansson 42a5718b8c Our usual bunch of DT patches, with this time mostly:
- Mali GPU support for the H6
  - Two new crypto drivers enablement
  - A few fixes to our DTs, fixed through the validation effort
  - New boards: NanoPi Duo2
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Merge tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual bunch of DT patches, with this time mostly:
 - Mali GPU support for the H6
 - Two new crypto drivers enablement
 - A few fixes to our DTs, fixed through the validation effort
 - New boards: NanoPi Duo2

* tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (22 commits)
  dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2
  ARM: dts: sun8i: add FriendlyARM NanoPi Duo2
  arm64: allwinner: h6: Enable GPU node for Tanix TX6
  arm64: dts: allwinner: bluetooth for Emlid Neutis N5
  ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins
  ARM: dts: sun9i: a80: Add Security System node
  ARM: dts: sun8i: a83t: Add Security System node
  arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6
  arm64: dts: allwinner: sun50i: Add crypto engine node on H5
  arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64
  ARM: dts: sun8i: H3: Add Crypto Engine node
  ARM: dts: sun8i: R40: add crypto engine node
  dt-bindings: crypto: Add DT bindings documentation for sun8i-ce Crypto Engine
  arm64: dts: allwinner: Add mali GPU supply for H6 boards
  arm64: dts: allwinner: Add ARM Mali GPU node for H6
  ARM: dts: sun8i: a83t: a711: Add touchscreen node
  ARM: dts: sun5i: olinuxino micro: Fix AT24 node name
  ARM: dts: sun9i: Add missing watchdog clocks
  arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3
  arm64: dts: allwinner: orange-pi-3: Enable UART1 / Bluetooth
  ...

Link: https://lore.kernel.org/r/1bf18c83-f41d-4353-9ca2-9585b8693df2.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 17:07:52 -08:00
Geert Uytterhoeven 09612c9337 arm64: dts: lg1313: DT fix s/#interrupts-cells/#interrupt-cells/
The standard DT property is called "#interrupt-cells".

Link: https://lore.kernel.org/r/20191101160356.32034-2-geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Chanho Min <chanho.min@lge.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03 17:06:43 -08:00