Граф коммитов

37 Коммитов

Автор SHA1 Сообщение Дата
Linus Torvalds 2981436374 hte: New subsystem for v5.19-rc1
This contains the new HTE subsystem that has been in the works for a
 couple of months now. The infrastructure provided allows for drivers to
 register as hardware timestamp providers, while consumers will be able
 to request events that they are interested in (such as GPIOs and IRQs)
 to be timestamped by the hardware providers.
 
 Note that this currently supports only one provider, but there seems to
 be enough interest in this functionality and we expect to see more
 drivers added once this is merged.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmKZ77ATHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTgVD/4tdJptbwblr8CCP5jklb81quuKBFu4
 2VaUpyGo4TDD4g0jchmAkmB0JsjO7mauURZ/vwWUfDx+uvsOJyf79smY/4OvL0v6
 MdYFeXb1rqDX8SiZSnpa+PKNI96l9/l1sbkbj1PPIod8hJSgXsASRP4lF21U97ZY
 QTI7u3kMJsUEvZhbEs9E2TXPAUO4+M8HfogJuEoaVRyHdwVHY1+Z+jlUsVXRd1qU
 XpIaKKMWF07FWrs2QUAbdqIUc8cITlcP+ExCc35PMwZnemWHnVwvk0mVyC0XD39P
 PHGlQOR2zTwJmijCwFkKTwuhGufE6bbvKvdns6gyTUlbzpQ4vcjPfVubt9ehX3dp
 acEJp5WdJFUhFU4dhjsLGVVzwE/L7vsZ3RPPh1j/Hjt0wYPg/EYPLr/wz+0wbIxt
 z4AtQZBLwrXSxXUuGkzl139kx0lTEtQZvfiziwi8BWrl6aqeBcGSNYHFLs2rDUTh
 sap+aEYRQ4cGWYfLMhv3yRLkkTlGxDMmEPM9VWGJb96osBcfidvgT+SE5qwoz6yg
 yJyMWwCrjYvYl+ZHwfKE3pEE4z9mrs7VLgcW9yWOF4UwFLuH0DyIEtCx/I4Uk+QG
 7F1HuV3mYZNlOwgJMZooSJ5Z9uzrn+eGzivhw4klJibFZBXqICCQjL5KvQ8wyuY7
 60Ns9+912HV/tQ==
 =sOJn
 -----END PGP SIGNATURE-----

Merge tag 'hte/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

Pull hardware timestamping subsystem from Thierry Reding:
 "This contains the new HTE (hardware timestamping engine) subsystem
  that has been in the works for a couple of months now.

  The infrastructure provided allows for drivers to register as hardware
  timestamp providers, while consumers will be able to request events
  that they are interested in (such as GPIOs and IRQs) to be timestamped
  by the hardware providers.

  Note that this currently supports only one provider, but there seems
  to be enough interest in this functionality and we expect to see more
  drivers added once this is merged"

[ Linus Walleij mentions the Intel PMC in the Elkhart and Tiger Lake
  platforms as another future timestamp provider ]

* tag 'hte/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: timestamp: Correct id path
  dt-bindings: Renamed hte directory to timestamp
  hte: Uninitialized variable in hte_ts_get()
  hte: Fix off by one in hte_push_ts_ns()
  hte: Fix possible use-after-free in tegra_hte_test_remove()
  hte: Remove unused including <linux/version.h>
  MAINTAINERS: Add HTE Subsystem
  hte: Add Tegra HTE test driver
  tools: gpio: Add new hardware clock type
  gpiolib: cdev: Add hardware timestamp clock type
  gpio: tegra186: Add HTE support
  gpiolib: Add HTE support
  dt-bindings: Add HTE bindings
  hte: Add Tegra194 HTE kernel provider
  drivers: Add hardware timestamp engine (HTE) subsystem
  Documentation: Add HTE subsystem guide
2022-06-05 09:12:28 -07:00
Dipen Patel 10e4afd6cc gpio: tegra186: Add HTE support
Tegra194 AON GPIO controller with the use of its internal hardware
timestamping engine (HTE), also known as GTE, can timestamp GPIO lines
through system counter. This patch implements enable/disable callbacks
for the GPIO controller. In enable call, it will set timestamp function
bit and GPIO line rising/falling edges in the config register. In
disable call, it restores the state.

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:06:13 +02:00
Marc Zyngier bba00555ed gpio: tegra186: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising
the irq_chip structure as immutable, making it const, and adding
the various calls that gpiolib relies upon.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220419141846.598305-5-maz@kernel.org
2022-04-19 15:22:26 +01:00
Akhil R 5f84e73f9a gpio: tegra186: Add IRQ per bank for Tegra241
Add the number of interrupts per bank for Tegra241 (Grace) to
fix the probe failure.

Fixes: d1056b771d ("gpio: tegra186: Add support for Tegra241")
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-03-07 15:25:27 +01:00
Marc Zyngier d1e972ace4 gpio: tegra186: Fix chip_data type confusion
The tegra186 GPIO driver makes the assumption that the pointer
returned by irq_data_get_irq_chip_data() is a pointer to a
tegra_gpio structure. Unfortunately, it is actually a pointer
to the inner gpio_chip structure, as mandated by the gpiolib
infrastructure. Nice try.

The saving grace is that the gpio_chip is the first member of
tegra_gpio, so the bug has gone undetected since... forever.

Fix it by performing a container_of() on the pointer. This results
in no additional code, and makes it possible to understand how
the whole thing works.

Fixes: 5b2b135a87 ("gpio: Add Tegra186 support")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Link: https://lore.kernel.org/r/20220211093904.1112679-1-maz@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-19 01:51:24 +01:00
Akhil R d1056b771d gpio: tegra186: Add support for Tegra241
Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra241 (Grace). While the programming model
remains the same, the number of pins has slightly changed.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-23 17:12:26 +01:00
Andy Shevchenko 448cf90513 gpio: Get rid of duplicate of_node assignment in the drivers
GPIO library does copy the of_node from the parent device of
the GPIO chip, there is no need to repeat this in the individual
drivers. Remove these assignment all at once.

For the details one may look into the of_gpio_dev_init() implementation.

While at it, remove duplicate parent device assignment where it is the case.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-By: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17 17:39:35 +01:00
Prathamesh Shete 1db9b241bb gpio: tegra186: Add support for Tegra234
Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra234. While the programming model remains
the same, the number of pins has slightly changed.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17 12:26:13 +01:00
Thierry Reding 2103868047 gpio: tegra186: Support multiple interrupts per bank
Tegra194 and later support more than a single interrupt per bank. This
is primarily useful for virtualization but can also be helpful for more
fine-grained CPU affinity control. To keep things simple for now, route
all pins to the first interrupt.

For backwards-compatibility, support old device trees that specify only
one interrupt per bank by counting the interrupts at probe time.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-09-22 11:26:12 +02:00
Thierry Reding ca03874806 gpio: tegra186: Force one interrupt per bank
Newer chips support up to 8 interrupts per bank, which can be useful to
balance the load and decrease latency. However, it also required a very
complicated interrupt routing to be set up. To keep things simple for
now, ensure that a single interrupt per bank is enforced, even if all
possible interrupts are described in device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-09-22 11:26:04 +02:00
Linus Torvalds 5e6a5845dd gpio updates for v5.15
- new driver: gpio-virtio allowing a guest VM running linux to access
   GPIO lines provided by the host
 - split the GPIO driver out of the rockchip pin control driver
 - add support for a new model to gpio-aspeed-sgpio, refactor the driver
   and use generic device property interfaces, improve property sanitization
 - add ACPI support to gpio-tegra186
 - improve the code setting the line names to support multiple GPIO banks
   per device
 - constify a bunch of OF functions in the core GPIO code and make the
   declaration for one of the core OF functions we use consistent within its
   header
 - use software nodes in intel_quark_i2c_gpio
 - add support for the gpio-line-names property in gpio-mt7621
 - use the standard GPIO function for setting the GPIO names in gpio-brcmstb
 - fix a bunch of leaks and other bugs in gpio-mpc8xxx
 - use generic pm callbacks in gpio-ml-ioh
 - improve resource management and PM handling in gpio-mlxbf2
 - modernize and improve the gpio-dwapb driver
 - coding style improvements in gpio-rcar
 - documentation fixes and improvements
 - update the MAINTAINERS entry for gpio-zynq
 - minor tweaks in several drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmE3ItgACgkQEacuoBRx
 13LKqA//Q2E9QYJx0lLO0C15JKzJjqYGyVqSm73Huo8pKWRSKr9YuB4/tBPKz5Ya
 pg/h7wbsk+mtQ0pqot/SEGVLo1rK6ZcPiCDkYkuaVsY9pS0zX7A/Sb2N7xKML+Nj
 wTFuhSZH2byxH6QgUrX3RLMagW4p/owlDvFjZ6Z6Vh8Ulsnb0pdL3nYg5L017GMT
 A1ySzbP79NK3LfOLTqdqgALv4EF2x+paolyEpI/Jv0naBYkIP4AcbOBQEVMpoCY/
 XEcIdPvqMyPm4PdYSy3iCqtkf7jclDbV030SHlir2bKHjI79l8ARy0Tu6hvISRSG
 8XMwt6ke40GYnPkESZTkWlqeVHYzli84FxYXYLnqFa/21c4qswHk/aZZq5h83fn8
 7aonkEQQuHfQM00MvLu0mhtKXYdLbqv7jjd0CYChwxQSpu0iu7IQSWW8c2YmGvvt
 vqfM8TdKyGNPAmSl2/enPKOr+LugG4rcgMehU9/p6QvHbB6y2SxC1MykldPOdC6d
 53PeDeNP6XOp2s10zVPWh6P0rbrMaEtv/GZ143kUw9bhb1g3woX5SaS7W76cOXhE
 kty6g1e8xNaKDZbJ++UAh7G9IGQdtz0xRCXDUHFUc89uCThc9RcHowNPtzMMnmgM
 ucWJ81XnGDSDyzzG/f7uhcOtszWYCOtFmteooaMGB36/pH2CG9Y=
 =y/RY
 -----END PGP SIGNATURE-----

Merge tag 'gpio-updates-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We mostly have various improvements and refactoring all over the place
  but also some interesting new features - like the virtio GPIO driver
  that allows guest VMs to use host's GPIOs. We also have a new/old GPIO
  driver for rockchip - this one has been split out of the pinctrl
  driver.

  Summary:

   - new driver: gpio-virtio allowing a guest VM running linux to access
     GPIO lines provided by the host

   - split the GPIO driver out of the rockchip pin control driver

   - add support for a new model to gpio-aspeed-sgpio, refactor the
     driver and use generic device property interfaces, improve property
     sanitization

   - add ACPI support to gpio-tegra186

   - improve the code setting the line names to support multiple GPIO
     banks per device

   - constify a bunch of OF functions in the core GPIO code and make the
     declaration for one of the core OF functions we use consistent
     within its header

   - use software nodes in intel_quark_i2c_gpio

   - add support for the gpio-line-names property in gpio-mt7621

   - use the standard GPIO function for setting the GPIO names in
     gpio-brcmstb

   - fix a bunch of leaks and other bugs in gpio-mpc8xxx

   - use generic pm callbacks in gpio-ml-ioh

   - improve resource management and PM handling in gpio-mlxbf2

   - modernize and improve the gpio-dwapb driver

   - coding style improvements in gpio-rcar

   - documentation fixes and improvements

   - update the MAINTAINERS entry for gpio-zynq

   - minor tweaks in several drivers"

* tag 'gpio-updates-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (35 commits)
  gpio: mpc8xxx: Use 'devm_gpiochip_add_data()' to simplify the code and avoid a leak
  gpio: mpc8xxx: Fix a potential double iounmap call in 'mpc8xxx_probe()'
  gpio: mpc8xxx: Fix a resources leak in the error handling path of 'mpc8xxx_probe()'
  gpio: viperboard: remove platform_set_drvdata() call in probe
  gpio: virtio: Add missing mailings lists in MAINTAINERS entry
  gpio: virtio: Fix sparse warnings
  gpio: remove the obsolete MX35 3DS BOARD MC9S08DZ60 GPIO functions
  gpio: max730x: Use the right include
  gpio: Add virtio-gpio driver
  gpio: mlxbf2: Use DEFINE_RES_MEM_NAMED() helper macro
  gpio: mlxbf2: Use devm_platform_ioremap_resource()
  gpio: mlxbf2: Drop wrong use of ACPI_PTR()
  gpio: mlxbf2: Convert to device PM ops
  gpio: dwapb: Get rid of legacy platform data
  mfd: intel_quark_i2c_gpio: Convert GPIO to use software nodes
  gpio: dwapb: Read GPIO base from gpio-base property
  gpio: dwapb: Unify ACPI enumeration checks in get_irq() and configure_irqs()
  gpiolib: Deduplicate forward declaration in the consumer.h header
  MAINTAINERS: update gpio-zynq.yaml reference
  gpio: tegra186: Add ACPI support
  ...
2021-09-07 12:27:27 -07:00
Marc Zyngier dbd1c54fc8 gpio: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-08-12 11:39:38 +01:00
Akhil R 2606e7c9f5 gpio: tegra186: Add ACPI support
Add ACPI module ID to probe the driver from the ACPI based bootloader
firmware.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-08-05 21:30:32 +02:00
Linus Torvalds b805259942 gpio: updates for v5.14
- new driver for the IDT 79RC3243x GPIO controller
 - device tree bindings coversion to YAML for the following drivers:
   gpio-rk3328-grf, gpio-omap, gpio-davinci, gpio-zynq, gpio-stp, gpio-pcf857x
 - cleanup of probe functions in many drivers from Alexandru Ardelean, mostly
   dropping unnecessary calls to platform_set_drvdata() and removing error
   messages where none are needed (handled by the subsystem already)
 - several improvements to the core gpiolib and the sysfs interface code from
   Andy Shevchenko
 - conversion of the gpio-xilinx driver to using the bitmap API + improvements
   of suspend/resume handling + minor tweaks
 - convert the gpio-stmpe to using devres helpers exclusively in probe for
   improved robustness
 - updates for the generic gpio-regmap driver
 - updates for the gpio-dwapb driver
 - support for a new model in gpio-pca953x
 - cleanups in gpio-tegra186, gpio-104-idio-16, gpio-mxs & gpio-xgene
 - slight code refactoring of the gpio-zynq driver
 - documentation fixes from Mauro Carvalho Chehab
 - a bunch of minor tweaks and improvements all over the place
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmDiz88ACgkQEacuoBRx
 13JIaxAAhM0kWMBCs14BT79ZteLQj+QvtA/EvNvC3yfAkrlzCc75yHP4ocV21O9E
 BIdbBqvA5RdOcL8akdL8V895wjM3CdUlFpjfkdVGeN7wZzagVEpb9z8j7Ba1YwSu
 dUzrvuPsiDigxDCMGDwHybrNxis54J61HV9mAw0LxXPERHQwbCUMdx4pbdBLUKcu
 qVX+mK2hzzgORkt9ntlnYQSKsnSiWan8g4q8zntdQOjJAVN473WySXmhfONlXkAV
 OH88/moDBk7Y3QdtUNAB7h/fu23F7Y++NoiStN2uilgrJ38/3PWi0eASK4XWx1jr
 LOx5PIRTRQNU+AHQ+EVP23XFH/1EKjPXGyZwcpprS5BkpJaBnUVCMnhoHdLX4LqV
 axxbszaMATxpTNt7lcLrklvzVb0D/zvvNtwuMyjWvPZ/GMLDyPfaVMFUqSGcFwQ+
 ufdHAeIPAwU/AA9tF3OjiijsGWV+nnOWunfh2TdioHRzFM6LTM5lkcruoFmqjQxp
 2IMTNGbhsr8xv6y64x3Cq/03k7hV5lwgn/J4CJL7LGa9VHI+VgGEKMluoINRxfc/
 qIN9MT1iVu81ttCwTokSL08Le6ijqpP3LC8hMTRSCJpxZBna5KWbMm8gppYrXE1r
 EAGnEpnihM36Px9hPj4zJQYU/Ly8SIpYB4BHWs4F8eMOxgFKuWo=
 =IF0T
 -----END PGP SIGNATURE-----

Merge tag 'gpio-updates-for-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "One new driver, support for new models in existing ones, dt-bindings
  conversions for several modules and improvements all over the place.

  Summary:

   - new driver for the IDT 79RC3243x GPIO controller

   - device tree bindings coversion to YAML for the following drivers:
     gpio-rk3328-grf, gpio-omap, gpio-davinci, gpio-zynq, gpio-stp,
     gpio-pcf857x

   - cleanup of probe functions in many drivers from Alexandru Ardelean,
     mostly dropping unnecessary calls to platform_set_drvdata() and
     removing error messages where none are needed (handled by the
     subsystem already)

   - several improvements to the core gpiolib and the sysfs interface
     code from Andy Shevchenko

   - conversion of the gpio-xilinx driver to using the bitmap API +
     improvements of suspend/resume handling + minor tweaks

   - convert the gpio-stmpe to using devres helpers exclusively in probe
     for improved robustness

   - updates for the generic gpio-regmap driver

   - updates for the gpio-dwapb driver

   - support for a new model in gpio-pca953x

   - cleanups in gpio-tegra186, gpio-104-idio-16, gpio-mxs & gpio-xgene

   - slight code refactoring of the gpio-zynq driver

   - documentation fixes from Mauro Carvalho Chehab

   - a bunch of minor tweaks and improvements all over the place"

* tag 'gpio-updates-for-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (57 commits)
  docs: driver-api: gpio: using-gpio.rst: avoid using ReST :doc:`foo` markup
  dt-bindings: gpio: pcf857x: Convert to json-schema
  gpio: mxs: Prefer unsigned int to bare use of unsigned
  dt-bindings: gpio: stp: convert to json-schema
  dt-bindings: gpio: zynq: convert bindings to YAML
  dt-bindings: gpio: gpio-davinci: Convert to json-schema
  gpio: pca953x: Add support for the On Semi pca9655
  gpio: gpio-xilinx: update on suspend and resume calls
  gpio: zynq: Check return value of irq_get_irq_data
  gpio: zynq: Check return value of pm_runtime_get_sync
  gpio: zynq: use module_platform_driver to simplify the code
  gpio: idt3243x: Fix return value check in idt_gpio_probe()
  MAINTAINERS: update ti,omap-gpio.yaml reference
  dt-bindings: gpio: Add devicetree binding for IDT 79RC32434 GPIO controller
  gpio: Add support for IDT 79RC3243x GPIO controller
  gpio: regmap: move drvdata to config data
  gpio-dwapb: Drop unused headers and sort the rest
  gpio: gpio-regmap: Use devm_add_action_or_reset()
  gpio: dwapb: Switch to use fwnode_irq_get()
  gpio: dwapb: Drop redundant check in dwapb_irq_set_type()
  ...
2021-07-05 11:48:14 -07:00
Alexandru Ardelean 6e153938b7 gpio: gpio-tegra186: remove platform_set_drvdata() + cleanup probe
The platform_set_drvdata() call is only useful if we need to retrieve back
the private information.
Since the driver doesn't do that, it's not useful to have it.

If this is removed, we can also just do a direct return on
devm_gpiochip_add_data(). We don't need to print that this call failed as
there are other ways to log/see this during probe.

Signed-off-by: Alexandru Ardelean <aardelean@deviqon.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-05-23 20:35:17 +02:00
Alexandru Ardelean 10a476164b gpio: gpio-tegra186: remove empty remove hook
The tegra186_gpio_remove hook simply does a return 0.
Not defining it yields pretty much the same result.
So, this can be removed.

Signed-off-by: Alexandru Ardelean <aardelean@deviqon.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-05-23 20:34:53 +02:00
Jon Hunter bdbe871ef0 gpio: tegra186: Don't set parent IRQ affinity
When hotplugging CPUs on Tegra186 and Tegra194 errors such as the
following are seen ...

 IRQ63: set affinity failed(-22).
 IRQ65: set affinity failed(-22).
 IRQ66: set affinity failed(-22).
 IRQ67: set affinity failed(-22).

Looking at the /proc/interrupts the above are all interrupts associated
with GPIOs. The reason why these error messages occur is because there
is no 'parent_data' associated with any of the GPIO interrupts and so
tegra186_irq_set_affinity() simply returns -EINVAL.

To understand why there is no 'parent_data' it is first necessary to
understand that in addition to the GPIO interrupts being routed to the
interrupt controller (GIC), the interrupts for some GPIOs are also
routed to the Tegra Power Management Controller (PMC) to wake up the
system from low power states. In order to configure GPIO events as
wake events in the PMC, the PMC is configured as IRQ parent domain
for the GPIO IRQ domain. Originally the GIC was the IRQ parent domain
of the PMC and although this was working, this started causing issues
once commit 64a267e9a4 ("irqchip/gic: Configure SGIs as standard
interrupts") was added, because technically, the GIC is not a parent
of the PMC. Commit c351ab7bf2 ("soc/tegra: pmc: Don't create fake
interrupt hierarchy levels") fixed this by severing the IRQ domain
hierarchy for the Tegra GPIOs and hence, there may be no IRQ parent
domain for the GPIOs.

The GPIO controllers on Tegra186 and Tegra194 have either one or six
interrupt lines to the interrupt controller. For GPIO controllers with
six interrupts, the mapping of the GPIO interrupt to the controller
interrupt is configurable within the GPIO controller. Currently a
default mapping is used, however, it could be possible to use the
set affinity callback for the Tegra186 GPIO driver to do something a
bit more interesting. Currently, because interrupts for all GPIOs are
have the same mapping and any attempts to configure the affinity for
a given GPIO can conflict with another that shares the same IRQ, for
now it is simpler to just remove set affinity support and this avoids
the above warnings being seen.

Cc: <stable@vger.kernel.org>
Fixes: c4e1f7d92c ("gpio: tegra186: Set affinity callback to parent")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-05-12 13:56:43 +02:00
Zheng Yongjun 7de2e5fc51 gpio: tegra186: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-02-15 11:43:29 +01:00
Linus Walleij c4e1f7d92c gpio: tegra186: Set affinity callback to parent
This assigns the .irq_set_affinity to the parent callback.
I assume the Tegra186 is an SMP system so this would be
beneficial.

I used the pattern making the hirerarchy tolerant for missing
parent as in Marc's earlier patch.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
Link: https://lore.kernel.org/r/20201117213351.249668-2-linus.walleij@linaro.org
2020-12-04 09:05:12 +01:00
Marc Zyngier 986ec63d44 gpio: tegra186: Allow optional irq parent callbacks
Make the tegra186 GPIO driver resistent to variable depth
interrupt hierarchy, which we are about to introduce.

No functionnal change yet.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-10-10 12:12:10 +01:00
Mian Yousaf Kaukab fef2d3bb2d gpio: tegra186: export MODULE_DEVICE_TABLE
Export MODULE_DEVICE_TABLE since the driver can be built as a module.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2020-05-05 18:18:38 +02:00
Thierry Reding ffa91e7ca1 gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1
The GG.0 and GG.1 GPIOs serve as CLKREQ and RST pins, respectively, for
PCIe controller 5 on Tegra194. When this controller is configured in
endpoint mode, these pins need to be used as GPIOs by the PCIe endpoint
driver. Typically the mode programming of these pins (GPIO vs. SFIO) is
performed by early boot firmware to ensure that the configuration is
consistent.

However, the GG.0 and GG.1 pins are part of a special power partition
that is not enabled during early boot, and hence the early boot firmware
cannot program these pins to be GPIOs (they are SFIO by default). Adding
them as pin ranges for the pin controller allows the pin controller to
be involved when these pins are requested as GPIOs and allows the proper
programming to take place.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-4-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:38:21 +01:00
Thierry Reding b64d6c9a6a gpio: tegra186: Add support for pin ranges
Add support for Tegra SoC generations to specify a list of pin ranges
that map GPIOs to ranges of pins in the pin controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-3-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:37:31 +01:00
Kevin Hao 2425876167 gpiolib: Add support for the irqdomain which doesn't use irq_fwspec as arg
Some gpio's parent irqdomain may not use the struct irq_fwspec as
argument, such as msi irqdomain. So rename the callback
populate_parent_fwspec() to populate_parent_alloc_arg() and make it
allocate and populate the specific struct which is needed by the
parent irqdomain.

Signed-off-by: Kevin Hao <haokexin@gmail.com>
Link: https://lore.kernel.org/r/20200114082821.14015-3-haokexin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-15 11:17:44 +01:00
Thierry Reding adce118393 gpio: tegra186: Add debounce support
The GPIO controller found on Tegra186 and later supports debouncing for
inputs for up to 255 ms.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-11-12 16:31:17 +01:00
Thierry Reding 22635ed8a2 gpio: tegra186: Program interrupt route mapping
The controls for the GG port on Tegra194 resides in the power partition
of the C5 PCIe controller and its interrupt route mapping can therefore
not be programmed by early boot firmware along with that of the other
ports.

Detect this generically by looking at which controls have already been
locked down using the security registers and fill in default values for
controls that are unlocked.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-11-12 16:31:06 +01:00
Thierry Reding 13a62a56aa gpio: tegra186: Derive register offsets from bank/port
The register offsets for a given bank and port can be easily derived
from the bank and port indices. Update the port descriptors to list only
the bank and port numbers to simplify this.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-11-12 16:30:56 +01:00
Bartosz Golaszewski a6e191963f Merge remote-tracking branch 'driver-core/driver-core-next' into gpio/for-next 2019-11-12 16:30:17 +01:00
Matti Vaittinen e42615ec23 gpio: Use new GPIO_LINE_DIRECTION
It's hard for occasional GPIO code reader/writer to know if values 0/1
equal to IN or OUT. Use defined GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT to help them out.

NOTE - for gpio-amd-fch and gpio-bd9571mwv:
This commit also changes the return value for direction get to equal 1
for direction INPUT. Prior this commit these drivers might have
returned some other positive value but 1 for INPUT.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Acked-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-07 09:27:48 +01:00
Bartosz Golaszewski cc4c831811 gpio: tegra186: use devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191022084318.22256-9-brgl@bgdev.pl
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-11-05 18:33:14 +01:00
Thierry Reding 2a36550567 gpio: tegra186: Implement wake event support
The GPIO controller doesn't have any controls to enable the system to
wake up from low power states based on activity on GPIO pins. An extra
hardware block that is part of the power management controller (PMC)
contains these controls. In order for the GPIO controller to be able
to cooperate with the PMC, obtain a reference to the PMC's IRQ domain
and make it a parent to the GPIO controller's IRQ domain. This way the
PMC gets an opportunity to program the additional registers required
to enable wakeup sources on suspend.

Based on additional work by Bitan Biswas <bbiswas@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20191002144502.156393-2-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-05 00:07:06 +02:00
Thomas Gleixner ac1dc6b2e7 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 233
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 6 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.720704315@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:06 +02:00
Thierry Reding 6911845227 gpio: tegra186: Use TEGRA186_ prefix for GPIO names
The new prefix allows the GPIOs to be uniquely identified on a per-chip
basis, which makes it easier to distinguish Tegra186 specific GPIOs from
those of later chips such as Tegra194 which supports a very different
set of GPIOs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-02-14 15:14:38 +01:00
Thierry Reding 3a2fa906c0 gpio: tegra186: Rename flow variable to type
The IRQ core code refers to the interrupt type by that name, whereas the
term flow is almost never used. Some GPIO controllers use the term
flow_type, but it is most consistent to just go with the IRQ core
terminology.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-14 14:34:10 +01:00
Mikko Perttunen bac5c3b829 gpio: tegra186: Add support for Tegra194
Add support for the Tegra194 GPIO bank configuration.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-02 16:01:02 +02:00
Axel Lin 24f0966c3e gpio: tegra186: Remove tegra186_gpio_lock_class
This is no longer required after commit 959bc7b22b
("gpio: Automatically add lockdep keys")

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-13 11:43:10 +01:00
Thierry Reding 5b2b135a87 gpio: Add Tegra186 support
Tegra186 has two GPIO controllers that are largely register compatible
between one another but are completely different from the controller
found on earlier generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 14:14:51 +01:00